LXR qemu/include/hw/ide/ahci.h

   1/*
   2 * QEMU AHCI Emulation
   3 *
   4 * Copyright (c) 2010 qiaochong@loongson.cn
   5 * Copyright (c) 2010 Roland Elek <elek.roland@gmail.com>
   6 * Copyright (c) 2010 Sebastian Herbszt <herbszt@gmx.de>
   7 * Copyright (c) 2010 Alexander Graf <agraf@suse.de>
   8 *
   9 * This library is free software; you can redistribute it and/or
  10 * modify it under the terms of the GNU Lesser General Public
  11 * License as published by the Free Software Foundation; either
  12 * version 2 of the License, or (at your option) any later version.
  13 *
  14 * This library is distributed in the hope that it will be useful,
  15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17 * Lesser General Public License for more details.
  18 *
  19 * You should have received a copy of the GNU Lesser General Public
  20 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  21 *
  22 */
  23
  24#ifndef HW_IDE_AHCI_H
  25#define HW_IDE_AHCI_H
  26
  27#include "hw/sysbus.h"
  28
  29typedef struct AHCIDevice AHCIDevice;
  30
  31typedef struct AHCIControlRegs {
  32    uint32_t    cap;
  33    uint32_t    ghc;
  34    uint32_t    irqstatus;
  35    uint32_t    impl;
  36    uint32_t    version;
  37} AHCIControlRegs;
  38
  39typedef struct AHCIState {
  40    DeviceState *container;
  41
  42    AHCIDevice *dev;
  43    AHCIControlRegs control_regs;
  44    MemoryRegion mem;
  45    MemoryRegion idp;       /* Index-Data Pair I/O port space */
  46    unsigned idp_offset;    /* Offset of index in I/O port space */
  47    uint32_t idp_index;     /* Current IDP index */
  48    int32_t ports;
  49    qemu_irq irq;
  50    AddressSpace *as;
  51} AHCIState;
  52
  53typedef struct AHCIPCIState AHCIPCIState;
  54
  55#define TYPE_ICH9_AHCI "ich9-ahci"
  56
  57int32_t ahci_get_num_ports(PCIDevice *dev);
  58void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd);
  59
  60#define TYPE_SYSBUS_AHCI "sysbus-ahci"
  61
  62typedef struct SysbusAHCIState {
  63    /*< private >*/
  64    SysBusDevice parent_obj;
  65    /*< public >*/
  66
  67    AHCIState ahci;
  68    uint32_t num_ports;
  69} SysbusAHCIState;
  70
  71#define TYPE_ALLWINNER_AHCI "allwinner-ahci"
  72
  73#define ALLWINNER_AHCI_MMIO_OFF  0x80
  74#define ALLWINNER_AHCI_MMIO_SIZE 0x80
  75
  76struct AllwinnerAHCIState {
  77    /*< private >*/
  78    SysbusAHCIState parent_obj;
  79    /*< public >*/
  80
  81    MemoryRegion mmio;
  82    uint32_t regs[ALLWINNER_AHCI_MMIO_SIZE/4];
  83};
  84
  85#endif /* HW_IDE_AHCI_H */
  86