1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2/* 3 * VFIO API definition 4 * 5 * Copyright (C) 2012 Red Hat, Inc. All rights reserved. 6 * Author: Alex Williamson <alex.williamson@redhat.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12#ifndef VFIO_H 13#define VFIO_H 14 15#include <linux/types.h> 16#include <linux/ioctl.h> 17 18#define VFIO_API_VERSION 0 19 20 21/* Kernel & User level defines for VFIO IOCTLs. */ 22 23/* Extensions */ 24 25#define VFIO_TYPE1_IOMMU 1 26#define VFIO_SPAPR_TCE_IOMMU 2 27#define VFIO_TYPE1v2_IOMMU 3 28/* 29 * IOMMU enforces DMA cache coherence (ex. PCIe NoSnoop stripping). This 30 * capability is subject to change as groups are added or removed. 31 */ 32#define VFIO_DMA_CC_IOMMU 4 33 34/* Check if EEH is supported */ 35#define VFIO_EEH 5 36 37/* Two-stage IOMMU */ 38#define VFIO_TYPE1_NESTING_IOMMU 6 /* Implies v2 */ 39 40#define VFIO_SPAPR_TCE_v2_IOMMU 7 41 42/* 43 * The No-IOMMU IOMMU offers no translation or isolation for devices and 44 * supports no ioctls outside of VFIO_CHECK_EXTENSION. Use of VFIO's No-IOMMU 45 * code will taint the host kernel and should be used with extreme caution. 46 */ 47#define VFIO_NOIOMMU_IOMMU 8 48 49/* 50 * The IOCTL interface is designed for extensibility by embedding the 51 * structure length (argsz) and flags into structures passed between 52 * kernel and userspace. We therefore use the _IO() macro for these 53 * defines to avoid implicitly embedding a size into the ioctl request. 54 * As structure fields are added, argsz will increase to match and flag 55 * bits will be defined to indicate additional fields with valid data. 56 * It's *always* the caller's responsibility to indicate the size of 57 * the structure passed by setting argsz appropriately. 58 */ 59 60#define VFIO_TYPE (';') 61#define VFIO_BASE 100 62 63/* 64 * For extension of INFO ioctls, VFIO makes use of a capability chain 65 * designed after PCI/e capabilities. A flag bit indicates whether 66 * this capability chain is supported and a field defined in the fixed 67 * structure defines the offset of the first capability in the chain. 68 * This field is only valid when the corresponding bit in the flags 69 * bitmap is set. This offset field is relative to the start of the 70 * INFO buffer, as is the next field within each capability header. 71 * The id within the header is a shared address space per INFO ioctl, 72 * while the version field is specific to the capability id. The 73 * contents following the header are specific to the capability id. 74 */ 75struct vfio_info_cap_header { 76 __u16 id; /* Identifies capability */ 77 __u16 version; /* Version specific to the capability ID */ 78 __u32 next; /* Offset of next capability */ 79}; 80 81/* 82 * Callers of INFO ioctls passing insufficiently sized buffers will see 83 * the capability chain flag bit set, a zero value for the first capability 84 * offset (if available within the provided argsz), and argsz will be 85 * updated to report the necessary buffer size. For compatibility, the 86 * INFO ioctl will not report error in this case, but the capability chain 87 * will not be available. 88 */ 89 90/* -------- IOCTLs for VFIO file descriptor (/dev/vfio/vfio) -------- */ 91 92/** 93 * VFIO_GET_API_VERSION - _IO(VFIO_TYPE, VFIO_BASE + 0) 94 * 95 * Report the version of the VFIO API. This allows us to bump the entire 96 * API version should we later need to add or change features in incompatible 97 * ways. 98 * Return: VFIO_API_VERSION 99 * Availability: Always 100 */ 101#define VFIO_GET_API_VERSION _IO(VFIO_TYPE, VFIO_BASE + 0) 102 103/** 104 * VFIO_CHECK_EXTENSION - _IOW(VFIO_TYPE, VFIO_BASE + 1, __u32) 105 * 106 * Check whether an extension is supported. 107 * Return: 0 if not supported, 1 (or some other positive integer) if supported. 108 * Availability: Always 109 */ 110#define VFIO_CHECK_EXTENSION _IO(VFIO_TYPE, VFIO_BASE + 1) 111 112/** 113 * VFIO_SET_IOMMU - _IOW(VFIO_TYPE, VFIO_BASE + 2, __s32) 114 * 115 * Set the iommu to the given type. The type must be supported by an 116 * iommu driver as verified by calling CHECK_EXTENSION using the same 117 * type. A group must be set to this file descriptor before this 118 * ioctl is available. The IOMMU interfaces enabled by this call are 119 * specific to the value set. 120 * Return: 0 on success, -errno on failure 121 * Availability: When VFIO group attached 122 */ 123#define VFIO_SET_IOMMU _IO(VFIO_TYPE, VFIO_BASE + 2) 124 125/* -------- IOCTLs for GROUP file descriptors (/dev/vfio/$GROUP) -------- */ 126 127/** 128 * VFIO_GROUP_GET_STATUS - _IOR(VFIO_TYPE, VFIO_BASE + 3, 129 * struct vfio_group_status) 130 * 131 * Retrieve information about the group. Fills in provided 132 * struct vfio_group_info. Caller sets argsz. 133 * Return: 0 on succes, -errno on failure. 134 * Availability: Always 135 */ 136struct vfio_group_status { 137 __u32 argsz; 138 __u32 flags; 139#define VFIO_GROUP_FLAGS_VIABLE (1 << 0) 140#define VFIO_GROUP_FLAGS_CONTAINER_SET (1 << 1) 141}; 142#define VFIO_GROUP_GET_STATUS _IO(VFIO_TYPE, VFIO_BASE + 3) 143 144/** 145 * VFIO_GROUP_SET_CONTAINER - _IOW(VFIO_TYPE, VFIO_BASE + 4, __s32) 146 * 147 * Set the container for the VFIO group to the open VFIO file 148 * descriptor provided. Groups may only belong to a single 149 * container. Containers may, at their discretion, support multiple 150 * groups. Only when a container is set are all of the interfaces 151 * of the VFIO file descriptor and the VFIO group file descriptor 152 * available to the user. 153 * Return: 0 on success, -errno on failure. 154 * Availability: Always 155 */ 156#define VFIO_GROUP_SET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 4) 157 158/** 159 * VFIO_GROUP_UNSET_CONTAINER - _IO(VFIO_TYPE, VFIO_BASE + 5) 160 * 161 * Remove the group from the attached container. This is the 162 * opposite of the SET_CONTAINER call and returns the group to 163 * an initial state. All device file descriptors must be released 164 * prior to calling this interface. When removing the last group 165 * from a container, the IOMMU will be disabled and all state lost, 166 * effectively also returning the VFIO file descriptor to an initial 167 * state. 168 * Return: 0 on success, -errno on failure. 169 * Availability: When attached to container 170 */ 171#define VFIO_GROUP_UNSET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 5) 172 173/** 174 * VFIO_GROUP_GET_DEVICE_FD - _IOW(VFIO_TYPE, VFIO_BASE + 6, char) 175 * 176 * Return a new file descriptor for the device object described by 177 * the provided string. The string should match a device listed in 178 * the devices subdirectory of the IOMMU group sysfs entry. The 179 * group containing the device must already be added to this context. 180 * Return: new file descriptor on success, -errno on failure. 181 * Availability: When attached to container 182 */ 183#define VFIO_GROUP_GET_DEVICE_FD _IO(VFIO_TYPE, VFIO_BASE + 6) 184 185/* --------------- IOCTLs for DEVICE file descriptors --------------- */ 186 187/** 188 * VFIO_DEVICE_GET_INFO - _IOR(VFIO_TYPE, VFIO_BASE + 7, 189 * struct vfio_device_info) 190 * 191 * Retrieve information about the device. Fills in provided 192 * struct vfio_device_info. Caller sets argsz. 193 * Return: 0 on success, -errno on failure. 194 */ 195struct vfio_device_info { 196 __u32 argsz; 197 __u32 flags; 198#define VFIO_DEVICE_FLAGS_RESET (1 << 0) /* Device supports reset */ 199#define VFIO_DEVICE_FLAGS_PCI (1 << 1) /* vfio-pci device */ 200#define VFIO_DEVICE_FLAGS_PLATFORM (1 << 2) /* vfio-platform device */ 201#define VFIO_DEVICE_FLAGS_AMBA (1 << 3) /* vfio-amba device */ 202#define VFIO_DEVICE_FLAGS_CCW (1 << 4) /* vfio-ccw device */ 203 __u32 num_regions; /* Max region index + 1 */ 204 __u32 num_irqs; /* Max IRQ index + 1 */ 205}; 206#define VFIO_DEVICE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 7) 207 208/* 209 * Vendor driver using Mediated device framework should provide device_api 210 * attribute in supported type attribute groups. Device API string should be one 211 * of the following corresponding to device flags in vfio_device_info structure. 212 */ 213 214#define VFIO_DEVICE_API_PCI_STRING "vfio-pci" 215#define VFIO_DEVICE_API_PLATFORM_STRING "vfio-platform" 216#define VFIO_DEVICE_API_AMBA_STRING "vfio-amba" 217#define VFIO_DEVICE_API_CCW_STRING "vfio-ccw" 218 219/** 220 * VFIO_DEVICE_GET_REGION_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 8, 221 * struct vfio_region_info) 222 * 223 * Retrieve information about a device region. Caller provides 224 * struct vfio_region_info with index value set. Caller sets argsz. 225 * Implementation of region mapping is bus driver specific. This is 226 * intended to describe MMIO, I/O port, as well as bus specific 227 * regions (ex. PCI config space). Zero sized regions may be used 228 * to describe unimplemented regions (ex. unimplemented PCI BARs). 229 * Return: 0 on success, -errno on failure. 230 */ 231struct vfio_region_info { 232 __u32 argsz; 233 __u32 flags; 234#define VFIO_REGION_INFO_FLAG_READ (1 << 0) /* Region supports read */ 235#define VFIO_REGION_INFO_FLAG_WRITE (1 << 1) /* Region supports write */ 236#define VFIO_REGION_INFO_FLAG_MMAP (1 << 2) /* Region supports mmap */ 237#define VFIO_REGION_INFO_FLAG_CAPS (1 << 3) /* Info supports caps */ 238 __u32 index; /* Region index */ 239 __u32 cap_offset; /* Offset within info struct of first cap */ 240 __u64 size; /* Region size (bytes) */ 241 __u64 offset; /* Region offset from start of device fd */ 242}; 243#define VFIO_DEVICE_GET_REGION_INFO _IO(VFIO_TYPE, VFIO_BASE + 8) 244 245/* 246 * The sparse mmap capability allows finer granularity of specifying areas 247 * within a region with mmap support. When specified, the user should only 248 * mmap the offset ranges specified by the areas array. mmaps outside of the 249 * areas specified may fail (such as the range covering a PCI MSI-X table) or 250 * may result in improper device behavior. 251 * 252 * The structures below define version 1 of this capability. 253 */ 254#define VFIO_REGION_INFO_CAP_SPARSE_MMAP 1 255 256struct vfio_region_sparse_mmap_area { 257 __u64 offset; /* Offset of mmap'able area within region */ 258 __u64 size; /* Size of mmap'able area */ 259}; 260 261struct vfio_region_info_cap_sparse_mmap { 262 struct vfio_info_cap_header header; 263 __u32 nr_areas; 264 __u32 reserved; 265 struct vfio_region_sparse_mmap_area areas[]; 266}; 267 268/* 269 * The device specific type capability allows regions unique to a specific 270 * device or class of devices to be exposed. This helps solve the problem for 271 * vfio bus drivers of defining which region indexes correspond to which region 272 * on the device, without needing to resort to static indexes, as done by 273 * vfio-pci. For instance, if we were to go back in time, we might remove 274 * VFIO_PCI_VGA_REGION_INDEX and let vfio-pci simply define that all indexes 275 * greater than or equal to VFIO_PCI_NUM_REGIONS are device specific and we'd 276 * make a "VGA" device specific type to describe the VGA access space. This 277 * means that non-VGA devices wouldn't need to waste this index, and thus the 278 * address space associated with it due to implementation of device file 279 * descriptor offsets in vfio-pci. 280 * 281 * The current implementation is now part of the user ABI, so we can't use this 282 * for VGA, but there are other upcoming use cases, such as opregions for Intel 283 * IGD devices and framebuffers for vGPU devices. We missed VGA, but we'll 284 * use this for future additions. 285 * 286 * The structure below defines version 1 of this capability. 287 */ 288#define VFIO_REGION_INFO_CAP_TYPE 2 289 290struct vfio_region_info_cap_type { 291 struct vfio_info_cap_header header; 292 __u32 type; /* global per bus driver */ 293 __u32 subtype; /* type specific */ 294}; 295 296#define VFIO_REGION_TYPE_PCI_VENDOR_TYPE (1 << 31) 297#define VFIO_REGION_TYPE_PCI_VENDOR_MASK (0xffff) 298 299/* 8086 Vendor sub-types */ 300#define VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION (1) 301#define VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG (2) 302#define VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG (3) 303 304/* 305 * The MSIX mappable capability informs that MSIX data of a BAR can be mmapped 306 * which allows direct access to non-MSIX registers which happened to be within 307 * the same system page. 308 * 309 * Even though the userspace gets direct access to the MSIX data, the existing 310 * VFIO_DEVICE_SET_IRQS interface must still be used for MSIX configuration. 311 */ 312#define VFIO_REGION_INFO_CAP_MSIX_MAPPABLE 3 313 314/** 315 * VFIO_DEVICE_GET_IRQ_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 9, 316 * struct vfio_irq_info) 317 * 318 * Retrieve information about a device IRQ. Caller provides 319 * struct vfio_irq_info with index value set. Caller sets argsz. 320 * Implementation of IRQ mapping is bus driver specific. Indexes 321 * using multiple IRQs are primarily intended to support MSI-like 322 * interrupt blocks. Zero count irq blocks may be used to describe 323 * unimplemented interrupt types. 324 * 325 * The EVENTFD flag indicates the interrupt index supports eventfd based 326 * signaling. 327 * 328 * The MASKABLE flags indicates the index supports MASK and UNMASK 329 * actions described below. 330 * 331 * AUTOMASKED indicates that after signaling, the interrupt line is 332 * automatically masked by VFIO and the user needs to unmask the line 333 * to receive new interrupts. This is primarily intended to distinguish 334 * level triggered interrupts. 335 * 336 * The NORESIZE flag indicates that the interrupt lines within the index 337 * are setup as a set and new subindexes cannot be enabled without first 338 * disabling the entire index. This is used for interrupts like PCI MSI 339 * and MSI-X where the driver may only use a subset of the available 340 * indexes, but VFIO needs to enable a specific number of vectors 341 * upfront. In the case of MSI-X, where the user can enable MSI-X and 342 * then add and unmask vectors, it's up to userspace to make the decision 343 * whether to allocate the maximum supported number of vectors or tear 344 * down setup and incrementally increase the vectors as each is enabled. 345 */ 346struct vfio_irq_info { 347 __u32 argsz; 348 __u32 flags; 349#define VFIO_IRQ_INFO_EVENTFD (1 << 0) 350#define VFIO_IRQ_INFO_MASKABLE (1 << 1) 351#define VFIO_IRQ_INFO_AUTOMASKED (1 << 2) 352#define VFIO_IRQ_INFO_NORESIZE (1 << 3) 353 __u32 index; /* IRQ index */ 354 __u32 count; /* Number of IRQs within this index */ 355}; 356#define VFIO_DEVICE_GET_IRQ_INFO _IO(VFIO_TYPE, VFIO_BASE + 9) 357 358/** 359 * VFIO_DEVICE_SET_IRQS - _IOW(VFIO_TYPE, VFIO_BASE + 10, struct vfio_irq_set) 360 * 361 * Set signaling, masking, and unmasking of interrupts. Caller provides 362 * struct vfio_irq_set with all fields set. 'start' and 'count' indicate 363 * the range of subindexes being specified. 364 * 365 * The DATA flags specify the type of data provided. If DATA_NONE, the 366 * operation performs the specified action immediately on the specified 367 * interrupt(s). For example, to unmask AUTOMASKED interrupt [0,0]: 368 * flags = (DATA_NONE|ACTION_UNMASK), index = 0, start = 0, count = 1. 369 * 370 * DATA_BOOL allows sparse support for the same on arrays of interrupts. 371 * For example, to mask interrupts [0,1] and [0,3] (but not [0,2]): 372 * flags = (DATA_BOOL|ACTION_MASK), index = 0, start = 1, count = 3, 373 * data = {1,0,1} 374 * 375 * DATA_EVENTFD binds the specified ACTION to the provided __s32 eventfd. 376 * A value of -1 can be used to either de-assign interrupts if already 377 * assigned or skip un-assigned interrupts. For example, to set an eventfd 378 * to be trigger for interrupts [0,0] and [0,2]: 379 * flags = (DATA_EVENTFD|ACTION_TRIGGER), index = 0, start = 0, count = 3, 380 * data = {fd1, -1, fd2} 381 * If index [0,1] is previously set, two count = 1 ioctls calls would be 382 * required to set [0,0] and [0,2] without changing [0,1]. 383 * 384 * Once a signaling mechanism is set, DATA_BOOL or DATA_NONE can be used 385 * with ACTION_TRIGGER to perform kernel level interrupt loopback testing 386 * from userspace (ie. simulate hardware triggering). 387 * 388 * Setting of an event triggering mechanism to userspace for ACTION_TRIGGER 389 * enables the interrupt index for the device. Individual subindex interrupts 390 * can be disabled using the -1 value for DATA_EVENTFD or the index can be 391 * disabled as a whole with: flags = (DATA_NONE|ACTION_TRIGGER), count = 0. 392 * 393 * Note that ACTION_[UN]MASK specify user->kernel signaling (irqfds) while 394 * ACTION_TRIGGER specifies kernel->user signaling. 395 */ 396struct vfio_irq_set { 397 __u32 argsz; 398 __u32 flags; 399#define VFIO_IRQ_SET_DATA_NONE (1 << 0) /* Data not present */ 400#define VFIO_IRQ_SET_DATA_BOOL (1 << 1) /* Data is bool (u8) */ 401#define VFIO_IRQ_SET_DATA_EVENTFD (1 << 2) /* Data is eventfd (s32) */ 402#define VFIO_IRQ_SET_ACTION_MASK (1 << 3) /* Mask interrupt */ 403#define VFIO_IRQ_SET_ACTION_UNMASK (1 << 4) /* Unmask interrupt */ 404#define VFIO_IRQ_SET_ACTION_TRIGGER (1 << 5) /* Trigger interrupt */ 405 __u32 index; 406 __u32 start; 407 __u32 count; 408 __u8 data[]; 409}; 410#define VFIO_DEVICE_SET_IRQS _IO(VFIO_TYPE, VFIO_BASE + 10) 411 412#define VFIO_IRQ_SET_DATA_TYPE_MASK (VFIO_IRQ_SET_DATA_NONE | \ 413 VFIO_IRQ_SET_DATA_BOOL | \ 414 VFIO_IRQ_SET_DATA_EVENTFD) 415#define VFIO_IRQ_SET_ACTION_TYPE_MASK (VFIO_IRQ_SET_ACTION_MASK | \ 416 VFIO_IRQ_SET_ACTION_UNMASK | \ 417 VFIO_IRQ_SET_ACTION_TRIGGER) 418/** 419 * VFIO_DEVICE_RESET - _IO(VFIO_TYPE, VFIO_BASE + 11) 420 * 421 * Reset a device. 422 */ 423#define VFIO_DEVICE_RESET _IO(VFIO_TYPE, VFIO_BASE + 11) 424 425/* 426 * The VFIO-PCI bus driver makes use of the following fixed region and 427 * IRQ index mapping. Unimplemented regions return a size of zero. 428 * Unimplemented IRQ types return a count of zero. 429 */ 430 431enum { 432 VFIO_PCI_BAR0_REGION_INDEX, 433 VFIO_PCI_BAR1_REGION_INDEX, 434 VFIO_PCI_BAR2_REGION_INDEX, 435 VFIO_PCI_BAR3_REGION_INDEX, 436 VFIO_PCI_BAR4_REGION_INDEX, 437 VFIO_PCI_BAR5_REGION_INDEX, 438 VFIO_PCI_ROM_REGION_INDEX, 439 VFIO_PCI_CONFIG_REGION_INDEX, 440 /* 441 * Expose VGA regions defined for PCI base class 03, subclass 00. 442 * This includes I/O port ranges 0x3b0 to 0x3bb and 0x3c0 to 0x3df 443 * as well as the MMIO range 0xa0000 to 0xbffff. Each implemented 444 * range is found at it's identity mapped offset from the region 445 * offset, for example 0x3b0 is region_info.offset + 0x3b0. Areas 446 * between described ranges are unimplemented. 447 */ 448 VFIO_PCI_VGA_REGION_INDEX, 449 VFIO_PCI_NUM_REGIONS = 9 /* Fixed user ABI, region indexes >=9 use */ 450 /* device specific cap to define content. */ 451}; 452 453enum { 454 VFIO_PCI_INTX_IRQ_INDEX, 455 VFIO_PCI_MSI_IRQ_INDEX, 456 VFIO_PCI_MSIX_IRQ_INDEX, 457 VFIO_PCI_ERR_IRQ_INDEX, 458 VFIO_PCI_REQ_IRQ_INDEX, 459 VFIO_PCI_NUM_IRQS 460}; 461 462/* 463 * The vfio-ccw bus driver makes use of the following fixed region and 464 * IRQ index mapping. Unimplemented regions return a size of zero. 465 * Unimplemented IRQ types return a count of zero. 466 */ 467 468enum { 469 VFIO_CCW_CONFIG_REGION_INDEX, 470 VFIO_CCW_NUM_REGIONS 471}; 472 473enum { 474 VFIO_CCW_IO_IRQ_INDEX, 475 VFIO_CCW_NUM_IRQS 476}; 477 478/** 479 * VFIO_DEVICE_GET_PCI_HOT_RESET_INFO - _IORW(VFIO_TYPE, VFIO_BASE + 12, 480 * struct vfio_pci_hot_reset_info) 481 * 482 * Return: 0 on success, -errno on failure: 483 * -enospc = insufficient buffer, -enodev = unsupported for device. 484 */ 485struct vfio_pci_dependent_device { 486 __u32 group_id; 487 __u16 segment; 488 __u8 bus; 489 __u8 devfn; /* Use PCI_SLOT/PCI_FUNC */ 490}; 491 492struct vfio_pci_hot_reset_info { 493 __u32 argsz; 494 __u32 flags; 495 __u32 count; 496 struct vfio_pci_dependent_device devices[]; 497}; 498 499#define VFIO_DEVICE_GET_PCI_HOT_RESET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12) 500 501/** 502 * VFIO_DEVICE_PCI_HOT_RESET - _IOW(VFIO_TYPE, VFIO_BASE + 13, 503 * struct vfio_pci_hot_reset) 504 * 505 * Return: 0 on success, -errno on failure. 506 */ 507struct vfio_pci_hot_reset { 508 __u32 argsz; 509 __u32 flags; 510 __u32 count; 511 __s32 group_fds[]; 512}; 513 514#define VFIO_DEVICE_PCI_HOT_RESET _IO(VFIO_TYPE, VFIO_BASE + 13) 515 516/** 517 * VFIO_DEVICE_QUERY_GFX_PLANE - _IOW(VFIO_TYPE, VFIO_BASE + 14, 518 * struct vfio_device_query_gfx_plane) 519 * 520 * Set the drm_plane_type and flags, then retrieve the gfx plane info. 521 * 522 * flags supported: 523 * - VFIO_GFX_PLANE_TYPE_PROBE and VFIO_GFX_PLANE_TYPE_DMABUF are set 524 * to ask if the mdev supports dma-buf. 0 on support, -EINVAL on no 525 * support for dma-buf. 526 * - VFIO_GFX_PLANE_TYPE_PROBE and VFIO_GFX_PLANE_TYPE_REGION are set 527 * to ask if the mdev supports region. 0 on support, -EINVAL on no 528 * support for region. 529 * - VFIO_GFX_PLANE_TYPE_DMABUF or VFIO_GFX_PLANE_TYPE_REGION is set 530 * with each call to query the plane info. 531 * - Others are invalid and return -EINVAL. 532 * 533 * Note: 534 * 1. Plane could be disabled by guest. In that case, success will be 535 * returned with zero-initialized drm_format, size, width and height 536 * fields. 537 * 2. x_hot/y_hot is set to 0xFFFFFFFF if no hotspot information available 538 * 539 * Return: 0 on success, -errno on other failure. 540 */ 541struct vfio_device_gfx_plane_info { 542 __u32 argsz; 543 __u32 flags; 544#define VFIO_GFX_PLANE_TYPE_PROBE (1 << 0) 545#define VFIO_GFX_PLANE_TYPE_DMABUF (1 << 1) 546#define VFIO_GFX_PLANE_TYPE_REGION (1 << 2) 547 /* in */ 548 __u32 drm_plane_type; /* type of plane: DRM_PLANE_TYPE_* */ 549 /* out */ 550 __u32 drm_format; /* drm format of plane */ 551 __u64 drm_format_mod; /* tiled mode */ 552 __u32 width; /* width of plane */ 553 __u32 height; /* height of plane */ 554 __u32 stride; /* stride of plane */ 555 __u32 size; /* size of plane in bytes, align on page*/ 556 __u32 x_pos; /* horizontal position of cursor plane */ 557 __u32 y_pos; /* vertical position of cursor plane*/ 558 __u32 x_hot; /* horizontal position of cursor hotspot */ 559 __u32 y_hot; /* vertical position of cursor hotspot */ 560 union { 561 __u32 region_index; /* region index */ 562 __u32 dmabuf_id; /* dma-buf id */ 563 }; 564}; 565 566#define VFIO_DEVICE_QUERY_GFX_PLANE _IO(VFIO_TYPE, VFIO_BASE + 14) 567 568/** 569 * VFIO_DEVICE_GET_GFX_DMABUF - _IOW(VFIO_TYPE, VFIO_BASE + 15, __u32) 570 * 571 * Return a new dma-buf file descriptor for an exposed guest framebuffer 572 * described by the provided dmabuf_id. The dmabuf_id is returned from VFIO_ 573 * DEVICE_QUERY_GFX_PLANE as a token of the exposed guest framebuffer. 574 */ 575 576#define VFIO_DEVICE_GET_GFX_DMABUF _IO(VFIO_TYPE, VFIO_BASE + 15) 577 578/** 579 * VFIO_DEVICE_IOEVENTFD - _IOW(VFIO_TYPE, VFIO_BASE + 16, 580 * struct vfio_device_ioeventfd) 581 * 582 * Perform a write to the device at the specified device fd offset, with 583 * the specified data and width when the provided eventfd is triggered. 584 * vfio bus drivers may not support this for all regions, for all widths, 585 * or at all. vfio-pci currently only enables support for BAR regions, 586 * excluding the MSI-X vector table. 587 * 588 * Return: 0 on success, -errno on failure. 589 */ 590struct vfio_device_ioeventfd { 591 __u32 argsz; 592 __u32 flags; 593#define VFIO_DEVICE_IOEVENTFD_8 (1 << 0) /* 1-byte write */ 594#define VFIO_DEVICE_IOEVENTFD_16 (1 << 1) /* 2-byte write */ 595#define VFIO_DEVICE_IOEVENTFD_32 (1 << 2) /* 4-byte write */ 596#define VFIO_DEVICE_IOEVENTFD_64 (1 << 3) /* 8-byte write */ 597#define VFIO_DEVICE_IOEVENTFD_SIZE_MASK (0xf) 598 __u64 offset; /* device fd offset of write */ 599 __u64 data; /* data to be written */ 600 __s32 fd; /* -1 for de-assignment */ 601}; 602 603#define VFIO_DEVICE_IOEVENTFD _IO(VFIO_TYPE, VFIO_BASE + 16) 604 605/* -------- API for Type1 VFIO IOMMU -------- */ 606 607/** 608 * VFIO_IOMMU_GET_INFO - _IOR(VFIO_TYPE, VFIO_BASE + 12, struct vfio_iommu_info) 609 * 610 * Retrieve information about the IOMMU object. Fills in provided 611 * struct vfio_iommu_info. Caller sets argsz. 612 * 613 * XXX Should we do these by CHECK_EXTENSION too? 614 */ 615struct vfio_iommu_type1_info { 616 __u32 argsz; 617 __u32 flags; 618#define VFIO_IOMMU_INFO_PGSIZES (1 << 0) /* supported page sizes info */ 619 __u64 iova_pgsizes; /* Bitmap of supported page sizes */ 620}; 621 622#define VFIO_IOMMU_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12) 623 624/** 625 * VFIO_IOMMU_MAP_DMA - _IOW(VFIO_TYPE, VFIO_BASE + 13, struct vfio_dma_map) 626 * 627 * Map process virtual addresses to IO virtual addresses using the 628 * provided struct vfio_dma_map. Caller sets argsz. READ &/ WRITE required. 629 */ 630struct vfio_iommu_type1_dma_map { 631 __u32 argsz; 632 __u32 flags; 633#define VFIO_DMA_MAP_FLAG_READ (1 << 0) /* readable from device */ 634#define VFIO_DMA_MAP_FLAG_WRITE (1 << 1) /* writable from device */ 635 __u64 vaddr; /* Process virtual address */ 636 __u64 iova; /* IO virtual address */ 637 __u64 size; /* Size of mapping (bytes) */ 638}; 639 640#define VFIO_IOMMU_MAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 13) 641 642/** 643 * VFIO_IOMMU_UNMAP_DMA - _IOWR(VFIO_TYPE, VFIO_BASE + 14, 644 * struct vfio_dma_unmap) 645 * 646 * Unmap IO virtual addresses using the provided struct vfio_dma_unmap. 647 * Caller sets argsz. The actual unmapped size is returned in the size 648 * field. No guarantee is made to the user that arbitrary unmaps of iova 649 * or size different from those used in the original mapping call will 650 * succeed. 651 */ 652struct vfio_iommu_type1_dma_unmap { 653 __u32 argsz; 654 __u32 flags; 655 __u64 iova; /* IO virtual address */ 656 __u64 size; /* Size of mapping (bytes) */ 657}; 658 659#define VFIO_IOMMU_UNMAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 14) 660 661/* 662 * IOCTLs to enable/disable IOMMU container usage. 663 * No parameters are supported. 664 */ 665#define VFIO_IOMMU_ENABLE _IO(VFIO_TYPE, VFIO_BASE + 15) 666#define VFIO_IOMMU_DISABLE _IO(VFIO_TYPE, VFIO_BASE + 16) 667 668/* -------- Additional API for SPAPR TCE (Server POWERPC) IOMMU -------- */ 669 670/* 671 * The SPAPR TCE DDW info struct provides the information about 672 * the details of Dynamic DMA window capability. 673 * 674 * @pgsizes contains a page size bitmask, 4K/64K/16M are supported. 675 * @max_dynamic_windows_supported tells the maximum number of windows 676 * which the platform can create. 677 * @levels tells the maximum number of levels in multi-level IOMMU tables; 678 * this allows splitting a table into smaller chunks which reduces 679 * the amount of physically contiguous memory required for the table. 680 */ 681struct vfio_iommu_spapr_tce_ddw_info { 682 __u64 pgsizes; /* Bitmap of supported page sizes */ 683 __u32 max_dynamic_windows_supported; 684 __u32 levels; 685}; 686 687/* 688 * The SPAPR TCE info struct provides the information about the PCI bus 689 * address ranges available for DMA, these values are programmed into 690 * the hardware so the guest has to know that information. 691 * 692 * The DMA 32 bit window start is an absolute PCI bus address. 693 * The IOVA address passed via map/unmap ioctls are absolute PCI bus 694 * addresses too so the window works as a filter rather than an offset 695 * for IOVA addresses. 696 * 697 * Flags supported: 698 * - VFIO_IOMMU_SPAPR_INFO_DDW: informs the userspace that dynamic DMA windows 699 * (DDW) support is present. @ddw is only supported when DDW is present. 700 */ 701struct vfio_iommu_spapr_tce_info { 702 __u32 argsz; 703 __u32 flags; 704#define VFIO_IOMMU_SPAPR_INFO_DDW (1 << 0) /* DDW supported */ 705 __u32 dma32_window_start; /* 32 bit window start (bytes) */ 706 __u32 dma32_window_size; /* 32 bit window size (bytes) */ 707 struct vfio_iommu_spapr_tce_ddw_info ddw; 708}; 709 710#define VFIO_IOMMU_SPAPR_TCE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12) 711 712/* 713 * EEH PE operation struct provides ways to: 714 * - enable/disable EEH functionality; 715 * - unfreeze IO/DMA for frozen PE; 716 * - read PE state; 717 * - reset PE; 718 * - configure PE; 719 * - inject EEH error. 720 */ 721struct vfio_eeh_pe_err { 722 __u32 type; 723 __u32 func; 724 __u64 addr; 725 __u64 mask; 726}; 727 728struct vfio_eeh_pe_op { 729 __u32 argsz; 730 __u32 flags; 731 __u32 op; 732 union { 733 struct vfio_eeh_pe_err err; 734 }; 735}; 736 737#define VFIO_EEH_PE_DISABLE 0 /* Disable EEH functionality */ 738#define VFIO_EEH_PE_ENABLE 1 /* Enable EEH functionality */ 739#define VFIO_EEH_PE_UNFREEZE_IO 2 /* Enable IO for frozen PE */ 740#define VFIO_EEH_PE_UNFREEZE_DMA 3 /* Enable DMA for frozen PE */ 741#define VFIO_EEH_PE_GET_STATE 4 /* PE state retrieval */ 742#define VFIO_EEH_PE_STATE_NORMAL 0 /* PE in functional state */ 743#define VFIO_EEH_PE_STATE_RESET 1 /* PE reset in progress */ 744#define VFIO_EEH_PE_STATE_STOPPED 2 /* Stopped DMA and IO */ 745#define VFIO_EEH_PE_STATE_STOPPED_DMA 4 /* Stopped DMA only */ 746#define VFIO_EEH_PE_STATE_UNAVAIL 5 /* State unavailable */ 747#define VFIO_EEH_PE_RESET_DEACTIVATE 5 /* Deassert PE reset */ 748#define VFIO_EEH_PE_RESET_HOT 6 /* Assert hot reset */ 749#define VFIO_EEH_PE_RESET_FUNDAMENTAL 7 /* Assert fundamental reset */ 750#define VFIO_EEH_PE_CONFIGURE 8 /* PE configuration */ 751#define VFIO_EEH_PE_INJECT_ERR 9 /* Inject EEH error */ 752 753#define VFIO_EEH_PE_OP _IO(VFIO_TYPE, VFIO_BASE + 21) 754 755/** 756 * VFIO_IOMMU_SPAPR_REGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 17, struct vfio_iommu_spapr_register_memory) 757 * 758 * Registers user space memory where DMA is allowed. It pins 759 * user pages and does the locked memory accounting so 760 * subsequent VFIO_IOMMU_MAP_DMA/VFIO_IOMMU_UNMAP_DMA calls 761 * get faster. 762 */ 763struct vfio_iommu_spapr_register_memory { 764 __u32 argsz; 765 __u32 flags; 766 __u64 vaddr; /* Process virtual address */ 767 __u64 size; /* Size of mapping (bytes) */ 768}; 769#define VFIO_IOMMU_SPAPR_REGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 17) 770 771/** 772 * VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 18, struct vfio_iommu_spapr_register_memory) 773 * 774 * Unregisters user space memory registered with 775 * VFIO_IOMMU_SPAPR_REGISTER_MEMORY. 776 * Uses vfio_iommu_spapr_register_memory for parameters. 777 */ 778#define VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 18) 779 780/** 781 * VFIO_IOMMU_SPAPR_TCE_CREATE - _IOWR(VFIO_TYPE, VFIO_BASE + 19, struct vfio_iommu_spapr_tce_create) 782 * 783 * Creates an additional TCE table and programs it (sets a new DMA window) 784 * to every IOMMU group in the container. It receives page shift, window 785 * size and number of levels in the TCE table being created. 786 * 787 * It allocates and returns an offset on a PCI bus of the new DMA window. 788 */ 789struct vfio_iommu_spapr_tce_create { 790 __u32 argsz; 791 __u32 flags; 792 /* in */ 793 __u32 page_shift; 794 __u32 __resv1; 795 __u64 window_size; 796 __u32 levels; 797 __u32 __resv2; 798 /* out */ 799 __u64 start_addr; 800}; 801#define VFIO_IOMMU_SPAPR_TCE_CREATE _IO(VFIO_TYPE, VFIO_BASE + 19) 802 803/** 804 * VFIO_IOMMU_SPAPR_TCE_REMOVE - _IOW(VFIO_TYPE, VFIO_BASE + 20, struct vfio_iommu_spapr_tce_remove) 805 * 806 * Unprograms a TCE table from all groups in the container and destroys it. 807 * It receives a PCI bus offset as a window id. 808 */ 809struct vfio_iommu_spapr_tce_remove { 810 __u32 argsz; 811 __u32 flags; 812 /* in */ 813 __u64 start_addr; 814}; 815#define VFIO_IOMMU_SPAPR_TCE_REMOVE _IO(VFIO_TYPE, VFIO_BASE + 20) 816 817/* ***************************************************************** */ 818 819#endif /* VFIO_H */ 820