1@node Implementation notes 2@appendix Implementation notes 3 4@menu 5* CPU emulation:: 6* Translator Internals:: 7* QEMU compared to other emulators:: 8* Managed start up options:: 9* Bibliography:: 10@end menu 11 12@node CPU emulation 13@section CPU emulation 14 15@menu 16* x86:: x86 and x86-64 emulation 17* ARM:: ARM emulation 18* MIPS:: MIPS emulation 19* PPC:: PowerPC emulation 20* SPARC:: Sparc32 and Sparc64 emulation 21* Xtensa:: Xtensa emulation 22@end menu 23 24@node x86 25@subsection x86 and x86-64 emulation 26 27QEMU x86 target features: 28 29@itemize 30 31@item The virtual x86 CPU supports 16 bit and 32 bit addressing with segmentation. 32LDT/GDT and IDT are emulated. VM86 mode is also supported to run 33DOSEMU. There is some support for MMX/3DNow!, SSE, SSE2, SSE3, SSSE3, 34and SSE4 as well as x86-64 SVM. 35 36@item Support of host page sizes bigger than 4KB in user mode emulation. 37 38@item QEMU can emulate itself on x86. 39 40@item An extensive Linux x86 CPU test program is included @file{tests/test-i386}. 41It can be used to test other x86 virtual CPUs. 42 43@end itemize 44 45Current QEMU limitations: 46 47@itemize 48 49@item Limited x86-64 support. 50 51@item IPC syscalls are missing. 52 53@item The x86 segment limits and access rights are not tested at every 54memory access (yet). Hopefully, very few OSes seem to rely on that for 55normal use. 56 57@end itemize 58 59@node ARM 60@subsection ARM emulation 61 62@itemize 63 64@item Full ARM 7 user emulation. 65 66@item NWFPE FPU support included in user Linux emulation. 67 68@item Can run most ARM Linux binaries. 69 70@end itemize 71 72@node MIPS 73@subsection MIPS emulation 74 75@itemize 76 77@item The system emulation allows full MIPS32/MIPS64 Release 2 emulation, 78including privileged instructions, FPU and MMU, in both little and big 79endian modes. 80 81@item The Linux userland emulation can run many 32 bit MIPS Linux binaries. 82 83@end itemize 84 85Current QEMU limitations: 86 87@itemize 88 89@item Self-modifying code is not always handled correctly. 90 91@item 64 bit userland emulation is not implemented. 92 93@item The system emulation is not complete enough to run real firmware. 94 95@item The watchpoint debug facility is not implemented. 96 97@end itemize 98 99@node PPC 100@subsection PowerPC emulation 101 102@itemize 103 104@item Full PowerPC 32 bit emulation, including privileged instructions, 105FPU and MMU. 106 107@item Can run most PowerPC Linux binaries. 108 109@end itemize 110 111@node SPARC 112@subsection Sparc32 and Sparc64 emulation 113 114@itemize 115 116@item Full SPARC V8 emulation, including privileged 117instructions, FPU and MMU. SPARC V9 emulation includes most privileged 118and VIS instructions, FPU and I/D MMU. Alignment is fully enforced. 119 120@item Can run most 32-bit SPARC Linux binaries, SPARC32PLUS Linux binaries and 121some 64-bit SPARC Linux binaries. 122 123@end itemize 124 125Current QEMU limitations: 126 127@itemize 128 129@item IPC syscalls are missing. 130 131@item Floating point exception support is buggy. 132 133@item Atomic instructions are not correctly implemented. 134 135@item There are still some problems with Sparc64 emulators. 136 137@end itemize 138 139@node Xtensa 140@subsection Xtensa emulation 141 142@itemize 143 144@item Core Xtensa ISA emulation, including most options: code density, 145loop, extended L32R, 16- and 32-bit multiplication, 32-bit division, 146MAC16, miscellaneous operations, boolean, FP coprocessor, coprocessor 147context, debug, multiprocessor synchronization, 148conditional store, exceptions, relocatable vectors, unaligned exception, 149interrupts (including high priority and timer), hardware alignment, 150region protection, region translation, MMU, windowed registers, thread 151pointer, processor ID. 152 153@item Not implemented options: data/instruction cache (including cache 154prefetch and locking), XLMI, processor interface. Also options not 155covered by the core ISA (e.g. FLIX, wide branches) are not implemented. 156 157@item Can run most Xtensa Linux binaries. 158 159@item New core configuration that requires no additional instructions 160may be created from overlay with minimal amount of hand-written code. 161 162@end itemize 163 164@node Translator Internals 165@section Translator Internals 166 167QEMU is a dynamic translator. When it first encounters a piece of code, 168it converts it to the host instruction set. Usually dynamic translators 169are very complicated and highly CPU dependent. QEMU uses some tricks 170which make it relatively easily portable and simple while achieving good 171performances. 172 173QEMU's dynamic translation backend is called TCG, for "Tiny Code 174Generator". For more information, please take a look at @code{tcg/README}. 175 176Some notable features of QEMU's dynamic translator are: 177 178@table @strong 179 180@item CPU state optimisations: 181The target CPUs have many internal states which change the way it 182evaluates instructions. In order to achieve a good speed, the 183translation phase considers that some state information of the virtual 184CPU cannot change in it. The state is recorded in the Translation 185Block (TB). If the state changes (e.g. privilege level), a new TB will 186be generated and the previous TB won't be used anymore until the state 187matches the state recorded in the previous TB. The same idea can be applied 188to other aspects of the CPU state. For example, on x86, if the SS, 189DS and ES segments have a zero base, then the translator does not even 190generate an addition for the segment base. 191 192@item Direct block chaining: 193After each translated basic block is executed, QEMU uses the simulated 194Program Counter (PC) and other cpu state information (such as the CS 195segment base value) to find the next basic block. 196 197In order to accelerate the most common cases where the new simulated PC 198is known, QEMU can patch a basic block so that it jumps directly to the 199next one. 200 201The most portable code uses an indirect jump. An indirect jump makes 202it easier to make the jump target modification atomic. On some host 203architectures (such as x86 or PowerPC), the @code{JUMP} opcode is 204directly patched so that the block chaining has no overhead. 205 206@item Self-modifying code and translated code invalidation: 207Self-modifying code is a special challenge in x86 emulation because no 208instruction cache invalidation is signaled by the application when code 209is modified. 210 211User-mode emulation marks a host page as write-protected (if it is 212not already read-only) every time translated code is generated for a 213basic block. Then, if a write access is done to the page, Linux raises 214a SEGV signal. QEMU then invalidates all the translated code in the page 215and enables write accesses to the page. For system emulation, write 216protection is achieved through the software MMU. 217 218Correct translated code invalidation is done efficiently by maintaining 219a linked list of every translated block contained in a given page. Other 220linked lists are also maintained to undo direct block chaining. 221 222On RISC targets, correctly written software uses memory barriers and 223cache flushes, so some of the protection above would not be 224necessary. However, QEMU still requires that the generated code always 225matches the target instructions in memory in order to handle 226exceptions correctly. 227 228@item Exception support: 229longjmp() is used when an exception such as division by zero is 230encountered. 231 232The host SIGSEGV and SIGBUS signal handlers are used to get invalid 233memory accesses. QEMU keeps a map from host program counter to 234target program counter, and looks up where the exception happened 235based on the host program counter at the exception point. 236 237On some targets, some bits of the virtual CPU's state are not flushed to the 238memory until the end of the translation block. This is done for internal 239emulation state that is rarely accessed directly by the program and/or changes 240very often throughout the execution of a translation block---this includes 241condition codes on x86, delay slots on SPARC, conditional execution on 242ARM, and so on. This state is stored for each target instruction, and 243looked up on exceptions. 244 245@item MMU emulation: 246For system emulation QEMU uses a software MMU. In that mode, the MMU 247virtual to physical address translation is done at every memory 248access. 249 250QEMU uses an address translation cache (TLB) to speed up the translation. 251In order to avoid flushing the translated code each time the MMU 252mappings change, all caches in QEMU are physically indexed. This 253means that each basic block is indexed with its physical address. 254 255In order to avoid invalidating the basic block chain when MMU mappings 256change, chaining is only performed when the destination of the jump 257shares a page with the basic block that is performing the jump. 258 259The MMU can also distinguish RAM and ROM memory areas from MMIO memory 260areas. Access is faster for RAM and ROM because the translation cache also 261hosts the offset between guest address and host memory. Accessing MMIO 262memory areas instead calls out to C code for device emulation. 263Finally, the MMU helps tracking dirty pages and pages pointed to by 264translation blocks. 265@end table 266 267@node QEMU compared to other emulators 268@section QEMU compared to other emulators 269 270Like bochs [1], QEMU emulates an x86 CPU. But QEMU is much faster than 271bochs as it uses dynamic compilation. Bochs is closely tied to x86 PC 272emulation while QEMU can emulate several processors. 273 274Like Valgrind [2], QEMU does user space emulation and dynamic 275translation. Valgrind is mainly a memory debugger while QEMU has no 276support for it (QEMU could be used to detect out of bound memory 277accesses as Valgrind, but it has no support to track uninitialised data 278as Valgrind does). The Valgrind dynamic translator generates better code 279than QEMU (in particular it does register allocation) but it is closely 280tied to an x86 host and target and has no support for precise exceptions 281and system emulation. 282 283EM86 [3] is the closest project to user space QEMU (and QEMU still uses 284some of its code, in particular the ELF file loader). EM86 was limited 285to an alpha host and used a proprietary and slow interpreter (the 286interpreter part of the FX!32 Digital Win32 code translator [4]). 287 288TWIN from Willows Software was a Windows API emulator like Wine. It is less 289accurate than Wine but includes a protected mode x86 interpreter to launch 290x86 Windows executables. Such an approach has greater potential because most 291of the Windows API is executed natively but it is far more difficult to 292develop because all the data structures and function parameters exchanged 293between the API and the x86 code must be converted. 294 295User mode Linux [5] was the only solution before QEMU to launch a 296Linux kernel as a process while not needing any host kernel 297patches. However, user mode Linux requires heavy kernel patches while 298QEMU accepts unpatched Linux kernels. The price to pay is that QEMU is 299slower. 300 301The Plex86 [6] PC virtualizer is done in the same spirit as the now 302obsolete qemu-fast system emulator. It requires a patched Linux kernel 303to work (you cannot launch the same kernel on your PC), but the 304patches are really small. As it is a PC virtualizer (no emulation is 305done except for some privileged instructions), it has the potential of 306being faster than QEMU. The downside is that a complicated (and 307potentially unsafe) host kernel patch is needed. 308 309The commercial PC Virtualizers (VMWare [7], VirtualPC [8]) are faster 310than QEMU (without virtualization), but they all need specific, proprietary 311and potentially unsafe host drivers. Moreover, they are unable to 312provide cycle exact simulation as an emulator can. 313 314VirtualBox [9], Xen [10] and KVM [11] are based on QEMU. QEMU-SystemC 315[12] uses QEMU to simulate a system where some hardware devices are 316developed in SystemC. 317 318@node Managed start up options 319@section Managed start up options 320 321In system mode emulation, it's possible to create a VM in a paused state using 322the -S command line option. In this state the machine is completely initialized 323according to command line options and ready to execute VM code but VCPU threads 324are not executing any code. The VM state in this paused state depends on the way 325QEMU was started. It could be in: 326@table @asis 327@item initial state (after reset/power on state) 328@item with direct kernel loading, the initial state could be amended to execute 329code loaded by QEMU in the VM's RAM and with incoming migration 330@item with incoming migration, initial state will by amended with the migrated 331machine state after migration completes. 332@end table 333 334This paused state is typically used by users to query machine state and/or 335additionally configure the machine (by hotplugging devices) in runtime before 336allowing VM code to run. 337 338However, at the -S pause point, it's impossible to configure options that affect 339initial VM creation (like: -smp/-m/-numa ...) or cold plug devices. The 340experimental --preconfig command line option allows pausing QEMU 341before the initial VM creation, in a ``preconfig'' state, where additional 342queries and configuration can be performed via QMP before moving on to 343the resulting configuration startup. In the preconfig state, QEMU only allows 344a limited set of commands over the QMP monitor, where the commands do not 345depend on an initialized machine, including but not limited to: 346@table @asis 347@item qmp_capabilities 348@item query-qmp-schema 349@item query-commands 350@item query-status 351@item x-exit-preconfig 352@end table 353 354@node Bibliography 355@section Bibliography 356 357@table @asis 358 359@item [1] 360@url{http://bochs.sourceforge.net/}, the Bochs IA-32 Emulator Project, 361by Kevin Lawton et al. 362 363@item [2] 364@url{http://www.valgrind.org/}, Valgrind, an open-source memory debugger 365for GNU/Linux. 366 367@item [3] 368@url{http://ftp.dreamtime.org/pub/linux/Linux-Alpha/em86/v0.2/docs/em86.html}, 369the EM86 x86 emulator on Alpha-Linux. 370 371@item [4] 372@url{http://www.usenix.org/publications/library/proceedings/usenix-nt97/@/full_papers/chernoff/chernoff.pdf}, 373DIGITAL FX!32: Running 32-Bit x86 Applications on Alpha NT, by Anton 374Chernoff and Ray Hookway. 375 376@item [5] 377@url{http://user-mode-linux.sourceforge.net/}, 378The User-mode Linux Kernel. 379 380@item [6] 381@url{http://www.plex86.org/}, 382The new Plex86 project. 383 384@item [7] 385@url{http://www.vmware.com/}, 386The VMWare PC virtualizer. 387 388@item [8] 389@url{https://www.microsoft.com/download/details.aspx?id=3702}, 390The VirtualPC PC virtualizer. 391 392@item [9] 393@url{http://virtualbox.org/}, 394The VirtualBox PC virtualizer. 395 396@item [10] 397@url{http://www.xen.org/}, 398The Xen hypervisor. 399 400@item [11] 401@url{http://www.linux-kvm.org/}, 402Kernel Based Virtual Machine (KVM). 403 404@item [12] 405@url{http://www.greensocs.com/projects/QEMUSystemC}, 406QEMU-SystemC, a hardware co-simulator. 407 408@end table 409