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25#include "tcg.h"
26#include "exec/helper-proto.h"
27#include "exec/helper-gen.h"
28
29
30
31void tcg_gen_op1(TCGOpcode, TCGArg);
32void tcg_gen_op2(TCGOpcode, TCGArg, TCGArg);
33void tcg_gen_op3(TCGOpcode, TCGArg, TCGArg, TCGArg);
34void tcg_gen_op4(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg);
35void tcg_gen_op5(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
36void tcg_gen_op6(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
37
38void vec_gen_2(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg);
39void vec_gen_3(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg);
40void vec_gen_4(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg, TCGArg);
41
42static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1)
43{
44 tcg_gen_op1(opc, tcgv_i32_arg(a1));
45}
46
47static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1)
48{
49 tcg_gen_op1(opc, tcgv_i64_arg(a1));
50}
51
52static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1)
53{
54 tcg_gen_op1(opc, a1);
55}
56
57static inline void tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2)
58{
59 tcg_gen_op2(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2));
60}
61
62static inline void tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2)
63{
64 tcg_gen_op2(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2));
65}
66
67static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2)
68{
69 tcg_gen_op2(opc, tcgv_i32_arg(a1), a2);
70}
71
72static inline void tcg_gen_op2i_i64(TCGOpcode opc, TCGv_i64 a1, TCGArg a2)
73{
74 tcg_gen_op2(opc, tcgv_i64_arg(a1), a2);
75}
76
77static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2)
78{
79 tcg_gen_op2(opc, a1, a2);
80}
81
82static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1,
83 TCGv_i32 a2, TCGv_i32 a3)
84{
85 tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), tcgv_i32_arg(a3));
86}
87
88static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1,
89 TCGv_i64 a2, TCGv_i64 a3)
90{
91 tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), tcgv_i64_arg(a3));
92}
93
94static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1,
95 TCGv_i32 a2, TCGArg a3)
96{
97 tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3);
98}
99
100static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1,
101 TCGv_i64 a2, TCGArg a3)
102{
103 tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3);
104}
105
106static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val,
107 TCGv_ptr base, TCGArg offset)
108{
109 tcg_gen_op3(opc, tcgv_i32_arg(val), tcgv_ptr_arg(base), offset);
110}
111
112static inline void tcg_gen_ldst_op_i64(TCGOpcode opc, TCGv_i64 val,
113 TCGv_ptr base, TCGArg offset)
114{
115 tcg_gen_op3(opc, tcgv_i64_arg(val), tcgv_ptr_arg(base), offset);
116}
117
118static inline void tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
119 TCGv_i32 a3, TCGv_i32 a4)
120{
121 tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
122 tcgv_i32_arg(a3), tcgv_i32_arg(a4));
123}
124
125static inline void tcg_gen_op4_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
126 TCGv_i64 a3, TCGv_i64 a4)
127{
128 tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
129 tcgv_i64_arg(a3), tcgv_i64_arg(a4));
130}
131
132static inline void tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
133 TCGv_i32 a3, TCGArg a4)
134{
135 tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
136 tcgv_i32_arg(a3), a4);
137}
138
139static inline void tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
140 TCGv_i64 a3, TCGArg a4)
141{
142 tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
143 tcgv_i64_arg(a3), a4);
144}
145
146static inline void tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
147 TCGArg a3, TCGArg a4)
148{
149 tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3, a4);
150}
151
152static inline void tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
153 TCGArg a3, TCGArg a4)
154{
155 tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3, a4);
156}
157
158static inline void tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
159 TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5)
160{
161 tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
162 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5));
163}
164
165static inline void tcg_gen_op5_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
166 TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5)
167{
168 tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
169 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5));
170}
171
172static inline void tcg_gen_op5i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
173 TCGv_i32 a3, TCGv_i32 a4, TCGArg a5)
174{
175 tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
176 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5);
177}
178
179static inline void tcg_gen_op5i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
180 TCGv_i64 a3, TCGv_i64 a4, TCGArg a5)
181{
182 tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
183 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5);
184}
185
186static inline void tcg_gen_op5ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
187 TCGv_i32 a3, TCGArg a4, TCGArg a5)
188{
189 tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
190 tcgv_i32_arg(a3), a4, a5);
191}
192
193static inline void tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
194 TCGv_i64 a3, TCGArg a4, TCGArg a5)
195{
196 tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
197 tcgv_i64_arg(a3), a4, a5);
198}
199
200static inline void tcg_gen_op6_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
201 TCGv_i32 a3, TCGv_i32 a4,
202 TCGv_i32 a5, TCGv_i32 a6)
203{
204 tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
205 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5),
206 tcgv_i32_arg(a6));
207}
208
209static inline void tcg_gen_op6_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
210 TCGv_i64 a3, TCGv_i64 a4,
211 TCGv_i64 a5, TCGv_i64 a6)
212{
213 tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
214 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5),
215 tcgv_i64_arg(a6));
216}
217
218static inline void tcg_gen_op6i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
219 TCGv_i32 a3, TCGv_i32 a4,
220 TCGv_i32 a5, TCGArg a6)
221{
222 tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
223 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5), a6);
224}
225
226static inline void tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
227 TCGv_i64 a3, TCGv_i64 a4,
228 TCGv_i64 a5, TCGArg a6)
229{
230 tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
231 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5), a6);
232}
233
234static inline void tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
235 TCGv_i32 a3, TCGv_i32 a4,
236 TCGArg a5, TCGArg a6)
237{
238 tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
239 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5, a6);
240}
241
242static inline void tcg_gen_op6ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
243 TCGv_i64 a3, TCGv_i64 a4,
244 TCGArg a5, TCGArg a6)
245{
246 tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
247 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5, a6);
248}
249
250
251
252
253static inline void gen_set_label(TCGLabel *l)
254{
255 tcg_gen_op1(INDEX_op_set_label, label_arg(l));
256}
257
258static inline void tcg_gen_br(TCGLabel *l)
259{
260 tcg_gen_op1(INDEX_op_br, label_arg(l));
261}
262
263void tcg_gen_mb(TCGBar);
264
265
266
267
268
269void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
270void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2);
271void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
272void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
273void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
274void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
275void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
276void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
277void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
278void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
279void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
280void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
281void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
282void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
283void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
284void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
285void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
286void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
287void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
288void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
289void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
290void tcg_gen_clzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
291void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
292void tcg_gen_clrsb_i32(TCGv_i32 ret, TCGv_i32 arg);
293void tcg_gen_ctpop_i32(TCGv_i32 a1, TCGv_i32 a2);
294void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
295void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
296void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
297void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
298void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2,
299 unsigned int ofs, unsigned int len);
300void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg,
301 unsigned int ofs, unsigned int len);
302void tcg_gen_extract_i32(TCGv_i32 ret, TCGv_i32 arg,
303 unsigned int ofs, unsigned int len);
304void tcg_gen_sextract_i32(TCGv_i32 ret, TCGv_i32 arg,
305 unsigned int ofs, unsigned int len);
306void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *);
307void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *);
308void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret,
309 TCGv_i32 arg1, TCGv_i32 arg2);
310void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret,
311 TCGv_i32 arg1, int32_t arg2);
312void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1,
313 TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2);
314void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
315 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
316void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
317 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
318void tcg_gen_mulu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
319void tcg_gen_muls2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
320void tcg_gen_mulsu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
321void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg);
322void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg);
323void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg);
324void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg);
325void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg);
326void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg);
327void tcg_gen_smin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
328void tcg_gen_smax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
329void tcg_gen_umin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
330void tcg_gen_umax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
331
332static inline void tcg_gen_discard_i32(TCGv_i32 arg)
333{
334 tcg_gen_op1_i32(INDEX_op_discard, arg);
335}
336
337static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
338{
339 if (ret != arg) {
340 tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
341 }
342}
343
344static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
345{
346 tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg);
347}
348
349static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2,
350 tcg_target_long offset)
351{
352 tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
353}
354
355static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2,
356 tcg_target_long offset)
357{
358 tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
359}
360
361static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2,
362 tcg_target_long offset)
363{
364 tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
365}
366
367static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2,
368 tcg_target_long offset)
369{
370 tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
371}
372
373static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2,
374 tcg_target_long offset)
375{
376 tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
377}
378
379static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2,
380 tcg_target_long offset)
381{
382 tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
383}
384
385static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2,
386 tcg_target_long offset)
387{
388 tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
389}
390
391static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2,
392 tcg_target_long offset)
393{
394 tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
395}
396
397static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
398{
399 tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
400}
401
402static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
403{
404 tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
405}
406
407static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
408{
409 tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
410}
411
412static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
413{
414 tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
415}
416
417static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
418{
419 tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
420}
421
422static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
423{
424 tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
425}
426
427static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
428{
429 tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
430}
431
432static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
433{
434 tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
435}
436
437static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
438{
439 tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
440}
441
442static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
443{
444 if (TCG_TARGET_HAS_neg_i32) {
445 tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
446 } else {
447 tcg_gen_subfi_i32(ret, 0, arg);
448 }
449}
450
451static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
452{
453 if (TCG_TARGET_HAS_not_i32) {
454 tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg);
455 } else {
456 tcg_gen_xori_i32(ret, arg, -1);
457 }
458}
459
460
461
462void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
463void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2);
464void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
465void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
466void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
467void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
468void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
469void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
470void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
471void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
472void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
473void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
474void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
475void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
476void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
477void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
478void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
479void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
480void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
481void tcg_gen_clz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
482void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
483void tcg_gen_clzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
484void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
485void tcg_gen_clrsb_i64(TCGv_i64 ret, TCGv_i64 arg);
486void tcg_gen_ctpop_i64(TCGv_i64 a1, TCGv_i64 a2);
487void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
488void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
489void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
490void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
491void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2,
492 unsigned int ofs, unsigned int len);
493void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 arg,
494 unsigned int ofs, unsigned int len);
495void tcg_gen_extract_i64(TCGv_i64 ret, TCGv_i64 arg,
496 unsigned int ofs, unsigned int len);
497void tcg_gen_sextract_i64(TCGv_i64 ret, TCGv_i64 arg,
498 unsigned int ofs, unsigned int len);
499void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *);
500void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *);
501void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
502 TCGv_i64 arg1, TCGv_i64 arg2);
503void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
504 TCGv_i64 arg1, int64_t arg2);
505void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1,
506 TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2);
507void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
508 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
509void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
510 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
511void tcg_gen_mulu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
512void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
513void tcg_gen_mulsu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
514void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg);
515void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg);
516void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg);
517void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg);
518void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg);
519void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg);
520void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg);
521void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg);
522void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg);
523void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg);
524void tcg_gen_smin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
525void tcg_gen_smax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
526void tcg_gen_umin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
527void tcg_gen_umax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
528
529#if TCG_TARGET_REG_BITS == 64
530static inline void tcg_gen_discard_i64(TCGv_i64 arg)
531{
532 tcg_gen_op1_i64(INDEX_op_discard, arg);
533}
534
535static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
536{
537 if (ret != arg) {
538 tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
539 }
540}
541
542static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
543{
544 tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg);
545}
546
547static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
548 tcg_target_long offset)
549{
550 tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
551}
552
553static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
554 tcg_target_long offset)
555{
556 tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
557}
558
559static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
560 tcg_target_long offset)
561{
562 tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
563}
564
565static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
566 tcg_target_long offset)
567{
568 tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
569}
570
571static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
572 tcg_target_long offset)
573{
574 tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
575}
576
577static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
578 tcg_target_long offset)
579{
580 tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
581}
582
583static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
584 tcg_target_long offset)
585{
586 tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
587}
588
589static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
590 tcg_target_long offset)
591{
592 tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
593}
594
595static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
596 tcg_target_long offset)
597{
598 tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
599}
600
601static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
602 tcg_target_long offset)
603{
604 tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
605}
606
607static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
608 tcg_target_long offset)
609{
610 tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
611}
612
613static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
614{
615 tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
616}
617
618static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
619{
620 tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
621}
622
623static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
624{
625 tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
626}
627
628static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
629{
630 tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
631}
632
633static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
634{
635 tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
636}
637
638static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
639{
640 tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
641}
642
643static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
644{
645 tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
646}
647
648static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
649{
650 tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
651}
652
653static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
654{
655 tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
656}
657#else
658static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
659 tcg_target_long offset)
660{
661 tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
662}
663
664static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
665 tcg_target_long offset)
666{
667 tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
668}
669
670static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
671 tcg_target_long offset)
672{
673 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
674}
675
676static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
677{
678 tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
679 TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
680}
681
682static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
683{
684 tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
685 TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
686}
687
688void tcg_gen_discard_i64(TCGv_i64 arg);
689void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg);
690void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg);
691void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
692void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
693void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
694void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
695void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
696void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
697void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
698void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
699void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
700void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
701void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
702void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
703void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
704void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
705void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
706#endif
707
708static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
709{
710 if (TCG_TARGET_HAS_neg_i64) {
711 tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
712 } else {
713 tcg_gen_subfi_i64(ret, 0, arg);
714 }
715}
716
717
718
719void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
720void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
721void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high);
722void tcg_gen_extrl_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
723void tcg_gen_extrh_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
724void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
725void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg);
726
727static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
728{
729 tcg_gen_deposit_i64(ret, lo, hi, 32, 32);
730}
731
732
733
734#ifndef TARGET_LONG_BITS
735#error must include QEMU headers
736#endif
737
738#if TARGET_INSN_START_WORDS == 1
739# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
740static inline void tcg_gen_insn_start(target_ulong pc)
741{
742 tcg_gen_op1(INDEX_op_insn_start, pc);
743}
744# else
745static inline void tcg_gen_insn_start(target_ulong pc)
746{
747 tcg_gen_op2(INDEX_op_insn_start, (uint32_t)pc, (uint32_t)(pc >> 32));
748}
749# endif
750#elif TARGET_INSN_START_WORDS == 2
751# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
752static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
753{
754 tcg_gen_op2(INDEX_op_insn_start, pc, a1);
755}
756# else
757static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
758{
759 tcg_gen_op4(INDEX_op_insn_start,
760 (uint32_t)pc, (uint32_t)(pc >> 32),
761 (uint32_t)a1, (uint32_t)(a1 >> 32));
762}
763# endif
764#elif TARGET_INSN_START_WORDS == 3
765# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
766static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
767 target_ulong a2)
768{
769 tcg_gen_op3(INDEX_op_insn_start, pc, a1, a2);
770}
771# else
772static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
773 target_ulong a2)
774{
775 tcg_gen_op6(INDEX_op_insn_start,
776 (uint32_t)pc, (uint32_t)(pc >> 32),
777 (uint32_t)a1, (uint32_t)(a1 >> 32),
778 (uint32_t)a2, (uint32_t)(a2 >> 32));
779}
780# endif
781#else
782# error "Unhandled number of operands to insn_start"
783#endif
784
785
786
787
788
789
790
791
792
793
794
795
796
797void tcg_gen_exit_tb(TranslationBlock *tb, unsigned idx);
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812void tcg_gen_goto_tb(unsigned idx);
813
814
815
816
817
818
819
820
821
822
823void tcg_gen_lookup_and_goto_ptr(void);
824
825#if TARGET_LONG_BITS == 32
826#define tcg_temp_new() tcg_temp_new_i32()
827#define tcg_global_reg_new tcg_global_reg_new_i32
828#define tcg_global_mem_new tcg_global_mem_new_i32
829#define tcg_temp_local_new() tcg_temp_local_new_i32()
830#define tcg_temp_free tcg_temp_free_i32
831#define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i32
832#define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i32
833#else
834#define tcg_temp_new() tcg_temp_new_i64()
835#define tcg_global_reg_new tcg_global_reg_new_i64
836#define tcg_global_mem_new tcg_global_mem_new_i64
837#define tcg_temp_local_new() tcg_temp_local_new_i64()
838#define tcg_temp_free tcg_temp_free_i64
839#define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i64
840#define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i64
841#endif
842
843void tcg_gen_qemu_ld_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
844void tcg_gen_qemu_st_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
845void tcg_gen_qemu_ld_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
846void tcg_gen_qemu_st_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
847
848static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
849{
850 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_UB);
851}
852
853static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
854{
855 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_SB);
856}
857
858static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
859{
860 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUW);
861}
862
863static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
864{
865 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESW);
866}
867
868static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
869{
870 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUL);
871}
872
873static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
874{
875 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESL);
876}
877
878static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
879{
880 tcg_gen_qemu_ld_i64(ret, addr, mem_index, MO_TEQ);
881}
882
883static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
884{
885 tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_UB);
886}
887
888static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
889{
890 tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUW);
891}
892
893static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
894{
895 tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUL);
896}
897
898static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
899{
900 tcg_gen_qemu_st_i64(arg, addr, mem_index, MO_TEQ);
901}
902
903void tcg_gen_atomic_cmpxchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGv_i32,
904 TCGArg, TCGMemOp);
905void tcg_gen_atomic_cmpxchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGv_i64,
906 TCGArg, TCGMemOp);
907
908void tcg_gen_atomic_xchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
909void tcg_gen_atomic_xchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
910
911void tcg_gen_atomic_fetch_add_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
912void tcg_gen_atomic_fetch_add_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
913void tcg_gen_atomic_fetch_and_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
914void tcg_gen_atomic_fetch_and_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
915void tcg_gen_atomic_fetch_or_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
916void tcg_gen_atomic_fetch_or_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
917void tcg_gen_atomic_fetch_xor_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
918void tcg_gen_atomic_fetch_xor_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
919void tcg_gen_atomic_fetch_smin_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
920void tcg_gen_atomic_fetch_smin_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
921void tcg_gen_atomic_fetch_umin_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
922void tcg_gen_atomic_fetch_umin_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
923void tcg_gen_atomic_fetch_smax_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
924void tcg_gen_atomic_fetch_smax_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
925void tcg_gen_atomic_fetch_umax_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
926void tcg_gen_atomic_fetch_umax_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
927
928void tcg_gen_atomic_add_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
929void tcg_gen_atomic_add_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
930void tcg_gen_atomic_and_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
931void tcg_gen_atomic_and_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
932void tcg_gen_atomic_or_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
933void tcg_gen_atomic_or_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
934void tcg_gen_atomic_xor_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
935void tcg_gen_atomic_xor_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
936void tcg_gen_atomic_smin_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
937void tcg_gen_atomic_smin_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
938void tcg_gen_atomic_umin_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
939void tcg_gen_atomic_umin_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
940void tcg_gen_atomic_smax_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
941void tcg_gen_atomic_smax_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
942void tcg_gen_atomic_umax_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
943void tcg_gen_atomic_umax_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
944
945void tcg_gen_mov_vec(TCGv_vec, TCGv_vec);
946void tcg_gen_dup_i32_vec(unsigned vece, TCGv_vec, TCGv_i32);
947void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec, TCGv_i64);
948void tcg_gen_dup8i_vec(TCGv_vec, uint32_t);
949void tcg_gen_dup16i_vec(TCGv_vec, uint32_t);
950void tcg_gen_dup32i_vec(TCGv_vec, uint32_t);
951void tcg_gen_dup64i_vec(TCGv_vec, uint64_t);
952void tcg_gen_dupi_vec(unsigned vece, TCGv_vec, uint64_t);
953void tcg_gen_add_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
954void tcg_gen_sub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
955void tcg_gen_mul_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
956void tcg_gen_and_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
957void tcg_gen_or_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
958void tcg_gen_xor_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
959void tcg_gen_andc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
960void tcg_gen_orc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
961void tcg_gen_not_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
962void tcg_gen_neg_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
963
964void tcg_gen_shli_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
965void tcg_gen_shri_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
966void tcg_gen_sari_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
967
968void tcg_gen_cmp_vec(TCGCond cond, unsigned vece, TCGv_vec r,
969 TCGv_vec a, TCGv_vec b);
970
971void tcg_gen_ld_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset);
972void tcg_gen_st_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset);
973void tcg_gen_stl_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t);
974
975#if TARGET_LONG_BITS == 64
976#define tcg_gen_movi_tl tcg_gen_movi_i64
977#define tcg_gen_mov_tl tcg_gen_mov_i64
978#define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
979#define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
980#define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
981#define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
982#define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
983#define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
984#define tcg_gen_ld_tl tcg_gen_ld_i64
985#define tcg_gen_st8_tl tcg_gen_st8_i64
986#define tcg_gen_st16_tl tcg_gen_st16_i64
987#define tcg_gen_st32_tl tcg_gen_st32_i64
988#define tcg_gen_st_tl tcg_gen_st_i64
989#define tcg_gen_add_tl tcg_gen_add_i64
990#define tcg_gen_addi_tl tcg_gen_addi_i64
991#define tcg_gen_sub_tl tcg_gen_sub_i64
992#define tcg_gen_neg_tl tcg_gen_neg_i64
993#define tcg_gen_subfi_tl tcg_gen_subfi_i64
994#define tcg_gen_subi_tl tcg_gen_subi_i64
995#define tcg_gen_and_tl tcg_gen_and_i64
996#define tcg_gen_andi_tl tcg_gen_andi_i64
997#define tcg_gen_or_tl tcg_gen_or_i64
998#define tcg_gen_ori_tl tcg_gen_ori_i64
999#define tcg_gen_xor_tl tcg_gen_xor_i64
1000#define tcg_gen_xori_tl tcg_gen_xori_i64
1001#define tcg_gen_not_tl tcg_gen_not_i64
1002#define tcg_gen_shl_tl tcg_gen_shl_i64
1003#define tcg_gen_shli_tl tcg_gen_shli_i64
1004#define tcg_gen_shr_tl tcg_gen_shr_i64
1005#define tcg_gen_shri_tl tcg_gen_shri_i64
1006#define tcg_gen_sar_tl tcg_gen_sar_i64
1007#define tcg_gen_sari_tl tcg_gen_sari_i64
1008#define tcg_gen_brcond_tl tcg_gen_brcond_i64
1009#define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
1010#define tcg_gen_setcond_tl tcg_gen_setcond_i64
1011#define tcg_gen_setcondi_tl tcg_gen_setcondi_i64
1012#define tcg_gen_mul_tl tcg_gen_mul_i64
1013#define tcg_gen_muli_tl tcg_gen_muli_i64
1014#define tcg_gen_div_tl tcg_gen_div_i64
1015#define tcg_gen_rem_tl tcg_gen_rem_i64
1016#define tcg_gen_divu_tl tcg_gen_divu_i64
1017#define tcg_gen_remu_tl tcg_gen_remu_i64
1018#define tcg_gen_discard_tl tcg_gen_discard_i64
1019#define tcg_gen_trunc_tl_i32 tcg_gen_extrl_i64_i32
1020#define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
1021#define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
1022#define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
1023#define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
1024#define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
1025#define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
1026#define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
1027#define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
1028#define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
1029#define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
1030#define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
1031#define tcg_gen_bswap16_tl tcg_gen_bswap16_i64
1032#define tcg_gen_bswap32_tl tcg_gen_bswap32_i64
1033#define tcg_gen_bswap64_tl tcg_gen_bswap64_i64
1034#define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
1035#define tcg_gen_extr_i64_tl tcg_gen_extr32_i64
1036#define tcg_gen_andc_tl tcg_gen_andc_i64
1037#define tcg_gen_eqv_tl tcg_gen_eqv_i64
1038#define tcg_gen_nand_tl tcg_gen_nand_i64
1039#define tcg_gen_nor_tl tcg_gen_nor_i64
1040#define tcg_gen_orc_tl tcg_gen_orc_i64
1041#define tcg_gen_clz_tl tcg_gen_clz_i64
1042#define tcg_gen_ctz_tl tcg_gen_ctz_i64
1043#define tcg_gen_clzi_tl tcg_gen_clzi_i64
1044#define tcg_gen_ctzi_tl tcg_gen_ctzi_i64
1045#define tcg_gen_clrsb_tl tcg_gen_clrsb_i64
1046#define tcg_gen_ctpop_tl tcg_gen_ctpop_i64
1047#define tcg_gen_rotl_tl tcg_gen_rotl_i64
1048#define tcg_gen_rotli_tl tcg_gen_rotli_i64
1049#define tcg_gen_rotr_tl tcg_gen_rotr_i64
1050#define tcg_gen_rotri_tl tcg_gen_rotri_i64
1051#define tcg_gen_deposit_tl tcg_gen_deposit_i64
1052#define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i64
1053#define tcg_gen_extract_tl tcg_gen_extract_i64
1054#define tcg_gen_sextract_tl tcg_gen_sextract_i64
1055#define tcg_const_tl tcg_const_i64
1056#define tcg_const_local_tl tcg_const_local_i64
1057#define tcg_gen_movcond_tl tcg_gen_movcond_i64
1058#define tcg_gen_add2_tl tcg_gen_add2_i64
1059#define tcg_gen_sub2_tl tcg_gen_sub2_i64
1060#define tcg_gen_mulu2_tl tcg_gen_mulu2_i64
1061#define tcg_gen_muls2_tl tcg_gen_muls2_i64
1062#define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i64
1063#define tcg_gen_smin_tl tcg_gen_smin_i64
1064#define tcg_gen_umin_tl tcg_gen_umin_i64
1065#define tcg_gen_smax_tl tcg_gen_smax_i64
1066#define tcg_gen_umax_tl tcg_gen_umax_i64
1067#define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i64
1068#define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i64
1069#define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i64
1070#define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i64
1071#define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i64
1072#define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i64
1073#define tcg_gen_atomic_fetch_smin_tl tcg_gen_atomic_fetch_smin_i64
1074#define tcg_gen_atomic_fetch_umin_tl tcg_gen_atomic_fetch_umin_i64
1075#define tcg_gen_atomic_fetch_smax_tl tcg_gen_atomic_fetch_smax_i64
1076#define tcg_gen_atomic_fetch_umax_tl tcg_gen_atomic_fetch_umax_i64
1077#define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i64
1078#define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i64
1079#define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i64
1080#define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i64
1081#define tcg_gen_atomic_smin_fetch_tl tcg_gen_atomic_smin_fetch_i64
1082#define tcg_gen_atomic_umin_fetch_tl tcg_gen_atomic_umin_fetch_i64
1083#define tcg_gen_atomic_smax_fetch_tl tcg_gen_atomic_smax_fetch_i64
1084#define tcg_gen_atomic_umax_fetch_tl tcg_gen_atomic_umax_fetch_i64
1085#define tcg_gen_dup_tl_vec tcg_gen_dup_i64_vec
1086#else
1087#define tcg_gen_movi_tl tcg_gen_movi_i32
1088#define tcg_gen_mov_tl tcg_gen_mov_i32
1089#define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
1090#define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
1091#define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
1092#define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
1093#define tcg_gen_ld32u_tl tcg_gen_ld_i32
1094#define tcg_gen_ld32s_tl tcg_gen_ld_i32
1095#define tcg_gen_ld_tl tcg_gen_ld_i32
1096#define tcg_gen_st8_tl tcg_gen_st8_i32
1097#define tcg_gen_st16_tl tcg_gen_st16_i32
1098#define tcg_gen_st32_tl tcg_gen_st_i32
1099#define tcg_gen_st_tl tcg_gen_st_i32
1100#define tcg_gen_add_tl tcg_gen_add_i32
1101#define tcg_gen_addi_tl tcg_gen_addi_i32
1102#define tcg_gen_sub_tl tcg_gen_sub_i32
1103#define tcg_gen_neg_tl tcg_gen_neg_i32
1104#define tcg_gen_subfi_tl tcg_gen_subfi_i32
1105#define tcg_gen_subi_tl tcg_gen_subi_i32
1106#define tcg_gen_and_tl tcg_gen_and_i32
1107#define tcg_gen_andi_tl tcg_gen_andi_i32
1108#define tcg_gen_or_tl tcg_gen_or_i32
1109#define tcg_gen_ori_tl tcg_gen_ori_i32
1110#define tcg_gen_xor_tl tcg_gen_xor_i32
1111#define tcg_gen_xori_tl tcg_gen_xori_i32
1112#define tcg_gen_not_tl tcg_gen_not_i32
1113#define tcg_gen_shl_tl tcg_gen_shl_i32
1114#define tcg_gen_shli_tl tcg_gen_shli_i32
1115#define tcg_gen_shr_tl tcg_gen_shr_i32
1116#define tcg_gen_shri_tl tcg_gen_shri_i32
1117#define tcg_gen_sar_tl tcg_gen_sar_i32
1118#define tcg_gen_sari_tl tcg_gen_sari_i32
1119#define tcg_gen_brcond_tl tcg_gen_brcond_i32
1120#define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
1121#define tcg_gen_setcond_tl tcg_gen_setcond_i32
1122#define tcg_gen_setcondi_tl tcg_gen_setcondi_i32
1123#define tcg_gen_mul_tl tcg_gen_mul_i32
1124#define tcg_gen_muli_tl tcg_gen_muli_i32
1125#define tcg_gen_div_tl tcg_gen_div_i32
1126#define tcg_gen_rem_tl tcg_gen_rem_i32
1127#define tcg_gen_divu_tl tcg_gen_divu_i32
1128#define tcg_gen_remu_tl tcg_gen_remu_i32
1129#define tcg_gen_discard_tl tcg_gen_discard_i32
1130#define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
1131#define tcg_gen_trunc_i64_tl tcg_gen_extrl_i64_i32
1132#define tcg_gen_extu_i32_tl tcg_gen_mov_i32
1133#define tcg_gen_ext_i32_tl tcg_gen_mov_i32
1134#define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
1135#define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
1136#define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
1137#define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
1138#define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
1139#define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
1140#define tcg_gen_ext32u_tl tcg_gen_mov_i32
1141#define tcg_gen_ext32s_tl tcg_gen_mov_i32
1142#define tcg_gen_bswap16_tl tcg_gen_bswap16_i32
1143#define tcg_gen_bswap32_tl tcg_gen_bswap32_i32
1144#define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
1145#define tcg_gen_extr_i64_tl tcg_gen_extr_i64_i32
1146#define tcg_gen_andc_tl tcg_gen_andc_i32
1147#define tcg_gen_eqv_tl tcg_gen_eqv_i32
1148#define tcg_gen_nand_tl tcg_gen_nand_i32
1149#define tcg_gen_nor_tl tcg_gen_nor_i32
1150#define tcg_gen_orc_tl tcg_gen_orc_i32
1151#define tcg_gen_clz_tl tcg_gen_clz_i32
1152#define tcg_gen_ctz_tl tcg_gen_ctz_i32
1153#define tcg_gen_clzi_tl tcg_gen_clzi_i32
1154#define tcg_gen_ctzi_tl tcg_gen_ctzi_i32
1155#define tcg_gen_clrsb_tl tcg_gen_clrsb_i32
1156#define tcg_gen_ctpop_tl tcg_gen_ctpop_i32
1157#define tcg_gen_rotl_tl tcg_gen_rotl_i32
1158#define tcg_gen_rotli_tl tcg_gen_rotli_i32
1159#define tcg_gen_rotr_tl tcg_gen_rotr_i32
1160#define tcg_gen_rotri_tl tcg_gen_rotri_i32
1161#define tcg_gen_deposit_tl tcg_gen_deposit_i32
1162#define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i32
1163#define tcg_gen_extract_tl tcg_gen_extract_i32
1164#define tcg_gen_sextract_tl tcg_gen_sextract_i32
1165#define tcg_const_tl tcg_const_i32
1166#define tcg_const_local_tl tcg_const_local_i32
1167#define tcg_gen_movcond_tl tcg_gen_movcond_i32
1168#define tcg_gen_add2_tl tcg_gen_add2_i32
1169#define tcg_gen_sub2_tl tcg_gen_sub2_i32
1170#define tcg_gen_mulu2_tl tcg_gen_mulu2_i32
1171#define tcg_gen_muls2_tl tcg_gen_muls2_i32
1172#define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i32
1173#define tcg_gen_smin_tl tcg_gen_smin_i32
1174#define tcg_gen_umin_tl tcg_gen_umin_i32
1175#define tcg_gen_smax_tl tcg_gen_smax_i32
1176#define tcg_gen_umax_tl tcg_gen_umax_i32
1177#define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i32
1178#define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i32
1179#define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i32
1180#define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i32
1181#define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i32
1182#define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i32
1183#define tcg_gen_atomic_fetch_smin_tl tcg_gen_atomic_fetch_smin_i32
1184#define tcg_gen_atomic_fetch_umin_tl tcg_gen_atomic_fetch_umin_i32
1185#define tcg_gen_atomic_fetch_smax_tl tcg_gen_atomic_fetch_smax_i32
1186#define tcg_gen_atomic_fetch_umax_tl tcg_gen_atomic_fetch_umax_i32
1187#define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i32
1188#define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i32
1189#define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i32
1190#define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i32
1191#define tcg_gen_atomic_smin_fetch_tl tcg_gen_atomic_smin_fetch_i32
1192#define tcg_gen_atomic_umin_fetch_tl tcg_gen_atomic_umin_fetch_i32
1193#define tcg_gen_atomic_smax_fetch_tl tcg_gen_atomic_smax_fetch_i32
1194#define tcg_gen_atomic_umax_fetch_tl tcg_gen_atomic_umax_fetch_i32
1195#define tcg_gen_dup_tl_vec tcg_gen_dup_i32_vec
1196#endif
1197
1198#if UINTPTR_MAX == UINT32_MAX
1199# define PTR i32
1200# define NAT TCGv_i32
1201#else
1202# define PTR i64
1203# define NAT TCGv_i64
1204#endif
1205
1206static inline void tcg_gen_ld_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t o)
1207{
1208 glue(tcg_gen_ld_,PTR)((NAT)r, a, o);
1209}
1210
1211static inline void tcg_gen_discard_ptr(TCGv_ptr a)
1212{
1213 glue(tcg_gen_discard_,PTR)((NAT)a);
1214}
1215
1216static inline void tcg_gen_add_ptr(TCGv_ptr r, TCGv_ptr a, TCGv_ptr b)
1217{
1218 glue(tcg_gen_add_,PTR)((NAT)r, (NAT)a, (NAT)b);
1219}
1220
1221static inline void tcg_gen_addi_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t b)
1222{
1223 glue(tcg_gen_addi_,PTR)((NAT)r, (NAT)a, b);
1224}
1225
1226static inline void tcg_gen_brcondi_ptr(TCGCond cond, TCGv_ptr a,
1227 intptr_t b, TCGLabel *label)
1228{
1229 glue(tcg_gen_brcondi_,PTR)(cond, (NAT)a, b, label);
1230}
1231
1232static inline void tcg_gen_ext_i32_ptr(TCGv_ptr r, TCGv_i32 a)
1233{
1234#if UINTPTR_MAX == UINT32_MAX
1235 tcg_gen_mov_i32((NAT)r, a);
1236#else
1237 tcg_gen_ext_i32_i64((NAT)r, a);
1238#endif
1239}
1240
1241static inline void tcg_gen_trunc_i64_ptr(TCGv_ptr r, TCGv_i64 a)
1242{
1243#if UINTPTR_MAX == UINT32_MAX
1244 tcg_gen_extrl_i64_i32((NAT)r, a);
1245#else
1246 tcg_gen_mov_i64((NAT)r, a);
1247#endif
1248}
1249
1250static inline void tcg_gen_extu_ptr_i64(TCGv_i64 r, TCGv_ptr a)
1251{
1252#if UINTPTR_MAX == UINT32_MAX
1253 tcg_gen_extu_i32_i64(r, (NAT)a);
1254#else
1255 tcg_gen_mov_i64(r, (NAT)a);
1256#endif
1257}
1258
1259static inline void tcg_gen_trunc_ptr_i32(TCGv_i32 r, TCGv_ptr a)
1260{
1261#if UINTPTR_MAX == UINT32_MAX
1262 tcg_gen_mov_i32(r, (NAT)a);
1263#else
1264 tcg_gen_extrl_i64_i32(r, (NAT)a);
1265#endif
1266}
1267
1268#undef PTR
1269#undef NAT
1270
