LXR qemu/disas/i386.c

   1/* opcodes/i386-dis.c r1.126 */
   2/* Print i386 instructions for GDB, the GNU debugger.
   3   Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
   4   2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
   5
   6   This file is part of GDB.
   7
   8   This program is free software; you can redistribute it and/or modify
   9   it under the terms of the GNU General Public License as published by
  10   the Free Software Foundation; either version 2 of the License, or
  11   (at your option) any later version.
  12
  13   This program is distributed in the hope that it will be useful,
  14   but WITHOUT ANY WARRANTY; without even the implied warranty of
  15   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16   GNU General Public License for more details.
  17
  18   You should have received a copy of the GNU General Public License
  19   along with this program; if not, see <http://www.gnu.org/licenses/>. */
  20
  21/* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
  22   July 1988
  23    modified by John Hassey (hassey@dg-rtp.dg.com)
  24    x86-64 support added by Jan Hubicka (jh@suse.cz)
  25    VIA PadLock support by Michal Ludvig (mludvig@suse.cz).  */
  26
  27/* The main tables describing the instructions is essentially a copy
  28   of the "Opcode Map" chapter (Appendix A) of the Intel 80386
  29   Programmers Manual.  Usually, there is a capital letter, followed
  30   by a small letter.  The capital letter tell the addressing mode,
  31   and the small letter tells about the operand size.  Refer to
  32   the Intel manual for details.  */
  33
  34#include "qemu/osdep.h"
  35#include "disas/bfd.h"
  36#include "qemu/cutils.h"
  37
  38/* include/opcode/i386.h r1.78 */
  39
  40/* opcode/i386.h -- Intel 80386 opcode macros
  41   Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
  42   2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
  43   Free Software Foundation, Inc.
  44
  45   This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger.
  46
  47   This program is free software; you can redistribute it and/or modify
  48   it under the terms of the GNU General Public License as published by
  49   the Free Software Foundation; either version 2 of the License, or
  50   (at your option) any later version.
  51
  52   This program is distributed in the hope that it will be useful,
  53   but WITHOUT ANY WARRANTY; without even the implied warranty of
  54   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  55   GNU General Public License for more details.
  56
  57   You should have received a copy of the GNU General Public License
  58   along with this program; if not, see <http://www.gnu.org/licenses/>.  */
  59
  60/* The SystemV/386 SVR3.2 assembler, and probably all AT&T derived
  61   ix86 Unix assemblers, generate floating point instructions with
  62   reversed source and destination registers in certain cases.
  63   Unfortunately, gcc and possibly many other programs use this
  64   reversed syntax, so we're stuck with it.
  65
  66   eg. `fsub %st(3),%st' results in st = st - st(3) as expected, but
  67   `fsub %st,%st(3)' results in st(3) = st - st(3), rather than
  68   the expected st(3) = st(3) - st
  69
  70   This happens with all the non-commutative arithmetic floating point
  71   operations with two register operands, where the source register is
  72   %st, and destination register is %st(i).
  73
  74   The affected opcode map is dceX, dcfX, deeX, defX.  */
  75
  76#ifndef SYSV386_COMPAT
  77/* Set non-zero for broken, compatible instructions.  Set to zero for
  78   non-broken opcodes at your peril.  gcc generates SystemV/386
  79   compatible instructions.  */
  80#define SYSV386_COMPAT 1
  81#endif
  82#ifndef OLDGCC_COMPAT
  83/* Set non-zero to cater for old (<= 2.8.1) versions of gcc that could
  84   generate nonsense fsubp, fsubrp, fdivp and fdivrp with operands
  85   reversed.  */
  86#define OLDGCC_COMPAT SYSV386_COMPAT
  87#endif
  88
  89#define MOV_AX_DISP32 0xa0
  90#define POP_SEG_SHORT 0x07
  91#define JUMP_PC_RELATIVE 0xeb
  92#define INT_OPCODE  0xcd
  93#define INT3_OPCODE 0xcc
  94/* The opcode for the fwait instruction, which disassembler treats as a
  95   prefix when it can.  */
  96#define FWAIT_OPCODE 0x9b
  97#define ADDR_PREFIX_OPCODE 0x67
  98#define DATA_PREFIX_OPCODE 0x66
  99#define LOCK_PREFIX_OPCODE 0xf0
 100#define CS_PREFIX_OPCODE 0x2e
 101#define DS_PREFIX_OPCODE 0x3e
 102#define ES_PREFIX_OPCODE 0x26
 103#define FS_PREFIX_OPCODE 0x64
 104#define GS_PREFIX_OPCODE 0x65
 105#define SS_PREFIX_OPCODE 0x36
 106#define REPNE_PREFIX_OPCODE 0xf2
 107#define REPE_PREFIX_OPCODE  0xf3
 108
 109#define TWO_BYTE_OPCODE_ESCAPE 0x0f
 110#define NOP_OPCODE (char) 0x90
 111
 112/* register numbers */
 113#define EBP_REG_NUM 5
 114#define ESP_REG_NUM 4
 115
 116/* modrm_byte.regmem for twobyte escape */
 117#define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
 118/* index_base_byte.index for no index register addressing */
 119#define NO_INDEX_REGISTER ESP_REG_NUM
 120/* index_base_byte.base for no base register addressing */
 121#define NO_BASE_REGISTER EBP_REG_NUM
 122#define NO_BASE_REGISTER_16 6
 123
 124/* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
 125#define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
 126#define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
 127
 128/* x86-64 extension prefix.  */
 129#define REX_OPCODE      0x40
 130
 131/* Indicates 64 bit operand size.  */
 132#define REX_W   8
 133/* High extension to reg field of modrm byte.  */
 134#define REX_R   4
 135/* High extension to SIB index field.  */
 136#define REX_X   2
 137/* High extension to base field of modrm or SIB, or reg field of opcode.  */
 138#define REX_B   1
 139
 140/* max operands per insn */
 141#define MAX_OPERANDS 4
 142
 143/* max immediates per insn (lcall, ljmp, insertq, extrq) */
 144#define MAX_IMMEDIATE_OPERANDS 2
 145
 146/* max memory refs per insn (string ops) */
 147#define MAX_MEMORY_OPERANDS 2
 148
 149/* max size of insn mnemonics.  */
 150#define MAX_MNEM_SIZE 16
 151
 152/* max size of register name in insn mnemonics.  */
 153#define MAX_REG_NAME_SIZE 8
 154
 155/* opcodes/i386-dis.c r1.126 */
 156#include "qemu-common.h"
 157
 158static int fetch_data2(struct disassemble_info *, bfd_byte *);
 159static int fetch_data(struct disassemble_info *, bfd_byte *);
 160static void ckprefix (void);
 161static const char *prefix_name (int, int);
 162static int print_insn (bfd_vma, disassemble_info *);
 163static void dofloat (int);
 164static void OP_ST (int, int);
 165static void OP_STi (int, int);
 166static int putop (const char *, int);
 167static void oappend (const char *);
 168static void append_seg (void);
 169static void OP_indirE (int, int);
 170static void print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp);
 171static void print_displacement (char *, bfd_vma);
 172static void OP_E (int, int);
 173static void OP_G (int, int);
 174static void OP_vvvv (int, int);
 175static bfd_vma get64 (void);
 176static bfd_signed_vma get32 (void);
 177static bfd_signed_vma get32s (void);
 178static int get16 (void);
 179static void set_op (bfd_vma, int);
 180static void OP_REG (int, int);
 181static void OP_IMREG (int, int);
 182static void OP_I (int, int);
 183static void OP_I64 (int, int);
 184static void OP_sI (int, int);
 185static void OP_J (int, int);
 186static void OP_SEG (int, int);
 187static void OP_DIR (int, int);
 188static void OP_OFF (int, int);
 189static void OP_OFF64 (int, int);
 190static void ptr_reg (int, int);
 191static void OP_ESreg (int, int);
 192static void OP_DSreg (int, int);
 193static void OP_C (int, int);
 194static void OP_D (int, int);
 195static void OP_T (int, int);
 196static void OP_R (int, int);
 197static void OP_MMX (int, int);
 198static void OP_XMM (int, int);
 199static void OP_EM (int, int);
 200static void OP_EX (int, int);
 201static void OP_EMC (int,int);
 202static void OP_MXC (int,int);
 203static void OP_MS (int, int);
 204static void OP_XS (int, int);
 205static void OP_M (int, int);
 206static void OP_VMX (int, int);
 207static void OP_0fae (int, int);
 208static void OP_0f07 (int, int);
 209static void NOP_Fixup1 (int, int);
 210static void NOP_Fixup2 (int, int);
 211static void OP_3DNowSuffix (int, int);
 212static void OP_SIMD_Suffix (int, int);
 213static void SIMD_Fixup (int, int);
 214static void PNI_Fixup (int, int);
 215static void SVME_Fixup (int, int);
 216static void INVLPG_Fixup (int, int);
 217static void BadOp (void);
 218static void VMX_Fixup (int, int);
 219static void REP_Fixup (int, int);
 220static void CMPXCHG8B_Fixup (int, int);
 221static void XMM_Fixup (int, int);
 222static void CRC32_Fixup (int, int);
 223
 224struct dis_private {
 225  /* Points to first byte not fetched.  */
 226  bfd_byte *max_fetched;
 227  bfd_byte the_buffer[MAX_MNEM_SIZE];
 228  bfd_vma insn_start;
 229  int orig_sizeflag;
 230  sigjmp_buf bailout;
 231};
 232
 233enum address_mode
 234{
 235  mode_16bit,
 236  mode_32bit,
 237  mode_64bit
 238};
 239
 240static enum address_mode address_mode;
 241
 242/* Flags for the prefixes for the current instruction.  See below.  */
 243static int prefixes;
 244
 245/* REX prefix the current instruction.  See below.  */
 246static int rex;
 247/* Bits of REX we've already used.  */
 248static int rex_used;
 249/* Mark parts used in the REX prefix.  When we are testing for
 250   empty prefix (for 8bit register REX extension), just mask it
 251   out.  Otherwise test for REX bit is excuse for existence of REX
 252   only in case value is nonzero.  */
 253#define USED_REX(value)                                 \
 254  {                                                     \
 255    if (value)                                          \
 256      {                                                 \
 257        if ((rex & value))                              \
 258          rex_used |= (value) | REX_OPCODE;             \
 259      }                                                 \
 260    else                                                \
 261      rex_used |= REX_OPCODE;                           \
 262  }
 263
 264/* Flags for prefixes which we somehow handled when printing the
 265   current instruction.  */
 266static int used_prefixes;
 267
 268/* The VEX.vvvv register, unencoded.  */
 269static int vex_reg;
 270
 271/* Flags stored in PREFIXES.  */
 272#define PREFIX_REPZ 1
 273#define PREFIX_REPNZ 2
 274#define PREFIX_LOCK 4
 275#define PREFIX_CS 8
 276#define PREFIX_SS 0x10
 277#define PREFIX_DS 0x20
 278#define PREFIX_ES 0x40
 279#define PREFIX_FS 0x80
 280#define PREFIX_GS 0x100
 281#define PREFIX_DATA 0x200
 282#define PREFIX_ADDR 0x400
 283#define PREFIX_FWAIT 0x800
 284
 285#define PREFIX_VEX_0F    0x1000
 286#define PREFIX_VEX_0F38  0x2000
 287#define PREFIX_VEX_0F3A  0x4000
 288
 289/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
 290   to ADDR (exclusive) are valid.  Returns 1 for success, longjmps
 291   on error.  */
 292static int
 293fetch_data2(struct disassemble_info *info, bfd_byte *addr)
 294{
 295  int status;
 296  struct dis_private *priv = (struct dis_private *) info->private_data;
 297  bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
 298
 299  if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
 300    status = (*info->read_memory_func) (start,
 301                                        priv->max_fetched,
 302                                        addr - priv->max_fetched,
 303                                        info);
 304  else
 305    status = -1;
 306  if (status != 0)
 307    {
 308      /* If we did manage to read at least one byte, then
 309         print_insn_i386 will do something sensible.  Otherwise, print
 310         an error.  We do that here because this is where we know
 311         STATUS.  */
 312      if (priv->max_fetched == priv->the_buffer)
 313        (*info->memory_error_func) (status, start, info);
 314      siglongjmp(priv->bailout, 1);
 315    }
 316  else
 317    priv->max_fetched = addr;
 318  return 1;
 319}
 320
 321static int
 322fetch_data(struct disassemble_info *info, bfd_byte *addr)
 323{
 324    if (addr <= ((struct dis_private *) (info->private_data))->max_fetched) {
 325        return 1;
 326    } else {
 327        return fetch_data2(info, addr);
 328    }
 329}
 330
 331
 332#define XX { NULL, 0 }
 333
 334#define Bv { OP_vvvv, v_mode }
 335#define Eb { OP_E, b_mode }
 336#define Ev { OP_E, v_mode }
 337#define Ed { OP_E, d_mode }
 338#define Edq { OP_E, dq_mode }
 339#define Edqw { OP_E, dqw_mode }
 340#define Edqb { OP_E, dqb_mode }
 341#define Edqd { OP_E, dqd_mode }
 342#define indirEv { OP_indirE, stack_v_mode }
 343#define indirEp { OP_indirE, f_mode }
 344#define stackEv { OP_E, stack_v_mode }
 345#define Em { OP_E, m_mode }
 346#define Ew { OP_E, w_mode }
 347#define M { OP_M, 0 }           /* lea, lgdt, etc. */
 348#define Ma { OP_M, v_mode }
 349#define Mp { OP_M, f_mode }             /* 32 or 48 bit memory operand for LDS, LES etc */
 350#define Mq { OP_M, q_mode }
 351#define Gb { OP_G, b_mode }
 352#define Gv { OP_G, v_mode }
 353#define Gd { OP_G, d_mode }
 354#define Gdq { OP_G, dq_mode }
 355#define Gm { OP_G, m_mode }
 356#define Gw { OP_G, w_mode }
 357#define Rd { OP_R, d_mode }
 358#define Rm { OP_R, m_mode }
 359#define Ib { OP_I, b_mode }
 360#define sIb { OP_sI, b_mode }   /* sign extended byte */
 361#define Iv { OP_I, v_mode }
 362#define Iq { OP_I, q_mode }
 363#define Iv64 { OP_I64, v_mode }
 364#define Iw { OP_I, w_mode }
 365#define I1 { OP_I, const_1_mode }
 366#define Jb { OP_J, b_mode }
 367#define Jv { OP_J, v_mode }
 368#define Cm { OP_C, m_mode }
 369#define Dm { OP_D, m_mode }
 370#define Td { OP_T, d_mode }
 371
 372#define RMeAX { OP_REG, eAX_reg }
 373#define RMeBX { OP_REG, eBX_reg }
 374#define RMeCX { OP_REG, eCX_reg }
 375#define RMeDX { OP_REG, eDX_reg }
 376#define RMeSP { OP_REG, eSP_reg }
 377#define RMeBP { OP_REG, eBP_reg }
 378#define RMeSI { OP_REG, eSI_reg }
 379#define RMeDI { OP_REG, eDI_reg }
 380#define RMrAX { OP_REG, rAX_reg }
 381#define RMrBX { OP_REG, rBX_reg }
 382#define RMrCX { OP_REG, rCX_reg }
 383#define RMrDX { OP_REG, rDX_reg }
 384#define RMrSP { OP_REG, rSP_reg }
 385#define RMrBP { OP_REG, rBP_reg }
 386#define RMrSI { OP_REG, rSI_reg }
 387#define RMrDI { OP_REG, rDI_reg }
 388#define RMAL { OP_REG, al_reg }
 389#define RMAL { OP_REG, al_reg }
 390#define RMCL { OP_REG, cl_reg }
 391#define RMDL { OP_REG, dl_reg }
 392#define RMBL { OP_REG, bl_reg }
 393#define RMAH { OP_REG, ah_reg }
 394#define RMCH { OP_REG, ch_reg }
 395#define RMDH { OP_REG, dh_reg }
 396#define RMBH { OP_REG, bh_reg }
 397#define RMAX { OP_REG, ax_reg }
 398#define RMDX { OP_REG, dx_reg }
 399
 400#define eAX { OP_IMREG, eAX_reg }
 401#define eBX { OP_IMREG, eBX_reg }
 402#define eCX { OP_IMREG, eCX_reg }
 403#define eDX { OP_IMREG, eDX_reg }
 404#define eSP { OP_IMREG, eSP_reg }
 405#define eBP { OP_IMREG, eBP_reg }
 406#define eSI { OP_IMREG, eSI_reg }
 407#define eDI { OP_IMREG, eDI_reg }
 408#define AL { OP_IMREG, al_reg }
 409#define CL { OP_IMREG, cl_reg }
 410#define DL { OP_IMREG, dl_reg }
 411#define BL { OP_IMREG, bl_reg }
 412#define AH { OP_IMREG, ah_reg }
 413#define CH { OP_IMREG, ch_reg }
 414#define DH { OP_IMREG, dh_reg }
 415#define BH { OP_IMREG, bh_reg }
 416#define AX { OP_IMREG, ax_reg }
 417#define DX { OP_IMREG, dx_reg }
 418#define zAX { OP_IMREG, z_mode_ax_reg }
 419#define indirDX { OP_IMREG, indir_dx_reg }
 420
 421#define Sw { OP_SEG, w_mode }
 422#define Sv { OP_SEG, v_mode }
 423#define Ap { OP_DIR, 0 }
 424#define Ob { OP_OFF64, b_mode }
 425#define Ov { OP_OFF64, v_mode }
 426#define Xb { OP_DSreg, eSI_reg }
 427#define Xv { OP_DSreg, eSI_reg }
 428#define Xz { OP_DSreg, eSI_reg }
 429#define Yb { OP_ESreg, eDI_reg }
 430#define Yv { OP_ESreg, eDI_reg }
 431#define DSBX { OP_DSreg, eBX_reg }
 432
 433#define es { OP_REG, es_reg }
 434#define ss { OP_REG, ss_reg }
 435#define cs { OP_REG, cs_reg }
 436#define ds { OP_REG, ds_reg }
 437#define fs { OP_REG, fs_reg }
 438#define gs { OP_REG, gs_reg }
 439
 440#define MX { OP_MMX, 0 }
 441#define XM { OP_XMM, 0 }
 442#define EM { OP_EM, v_mode }
 443#define EMd { OP_EM, d_mode }
 444#define EMq { OP_EM, q_mode }
 445#define EXd { OP_EX, d_mode }
 446#define EXq { OP_EX, q_mode }
 447#define EXx { OP_EX, x_mode }
 448#define MS { OP_MS, v_mode }
 449#define XS { OP_XS, v_mode }
 450#define EMC { OP_EMC, v_mode }
 451#define MXC { OP_MXC, 0 }
 452#define VM { OP_VMX, q_mode }
 453#define OPSUF { OP_3DNowSuffix, 0 }
 454#define OPSIMD { OP_SIMD_Suffix, 0 }
 455#define XMM0 { XMM_Fixup, 0 }
 456
 457/* Used handle "rep" prefix for string instructions.  */
 458#define Xbr { REP_Fixup, eSI_reg }
 459#define Xvr { REP_Fixup, eSI_reg }
 460#define Ybr { REP_Fixup, eDI_reg }
 461#define Yvr { REP_Fixup, eDI_reg }
 462#define Yzr { REP_Fixup, eDI_reg }
 463#define indirDXr { REP_Fixup, indir_dx_reg }
 464#define ALr { REP_Fixup, al_reg }
 465#define eAXr { REP_Fixup, eAX_reg }
 466
 467#define cond_jump_flag { NULL, cond_jump_mode }
 468#define loop_jcxz_flag { NULL, loop_jcxz_mode }
 469
 470/* bits in sizeflag */
 471#define SUFFIX_ALWAYS 4
 472#define AFLAG 2
 473#define DFLAG 1
 474
 475#define b_mode 1  /* byte operand */
 476#define v_mode 2  /* operand size depends on prefixes */
 477#define w_mode 3  /* word operand */
 478#define d_mode 4  /* double word operand  */
 479#define q_mode 5  /* quad word operand */
 480#define t_mode 6  /* ten-byte operand */
 481#define x_mode 7  /* 16-byte XMM operand */
 482#define m_mode 8  /* d_mode in 32bit, q_mode in 64bit mode.  */
 483#define cond_jump_mode 9
 484#define loop_jcxz_mode 10
 485#define dq_mode 11 /* operand size depends on REX prefixes.  */
 486#define dqw_mode 12 /* registers like dq_mode, memory like w_mode.  */
 487#define f_mode 13 /* 4- or 6-byte pointer operand */
 488#define const_1_mode 14
 489#define stack_v_mode 15 /* v_mode for stack-related opcodes.  */
 490#define z_mode 16 /* non-quad operand size depends on prefixes */
 491#define o_mode 17  /* 16-byte operand */
 492#define dqb_mode 18 /* registers like dq_mode, memory like b_mode.  */
 493#define dqd_mode 19 /* registers like dq_mode, memory like d_mode.  */
 494
 495#define es_reg 100
 496#define cs_reg 101
 497#define ss_reg 102
 498#define ds_reg 103
 499#define fs_reg 104
 500#define gs_reg 105
 501
 502#define eAX_reg 108
 503#define eCX_reg 109
 504#define eDX_reg 110
 505#define eBX_reg 111
 506#define eSP_reg 112
 507#define eBP_reg 113
 508#define eSI_reg 114
 509#define eDI_reg 115
 510
 511#define al_reg 116
 512#define cl_reg 117
 513#define dl_reg 118
 514#define bl_reg 119
 515#define ah_reg 120
 516#define ch_reg 121
 517#define dh_reg 122
 518#define bh_reg 123
 519
 520#define ax_reg 124
 521#define cx_reg 125
 522#define dx_reg 126
 523#define bx_reg 127
 524#define sp_reg 128
 525#define bp_reg 129
 526#define si_reg 130
 527#define di_reg 131
 528
 529#define rAX_reg 132
 530#define rCX_reg 133
 531#define rDX_reg 134
 532#define rBX_reg 135
 533#define rSP_reg 136
 534#define rBP_reg 137
 535#define rSI_reg 138
 536#define rDI_reg 139
 537
 538#define z_mode_ax_reg 149
 539#define indir_dx_reg 150
 540
 541#define FLOATCODE 1
 542#define USE_GROUPS 2
 543#define USE_PREFIX_USER_TABLE 3
 544#define X86_64_SPECIAL 4
 545#define IS_3BYTE_OPCODE 5
 546
 547#define FLOAT     NULL, { { NULL, FLOATCODE } }
 548
 549#define GRP1a     NULL, { { NULL, USE_GROUPS }, { NULL,  0 } }
 550#define GRP1b     NULL, { { NULL, USE_GROUPS }, { NULL,  1 } }
 551#define GRP1S     NULL, { { NULL, USE_GROUPS }, { NULL,  2 } }
 552#define GRP1Ss    NULL, { { NULL, USE_GROUPS }, { NULL,  3 } }
 553#define GRP2b     NULL, { { NULL, USE_GROUPS }, { NULL,  4 } }
 554#define GRP2S     NULL, { { NULL, USE_GROUPS }, { NULL,  5 } }
 555#define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL,  6 } }
 556#define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL,  7 } }
 557#define GRP2b_cl  NULL, { { NULL, USE_GROUPS }, { NULL,  8 } }
 558#define GRP2S_cl  NULL, { { NULL, USE_GROUPS }, { NULL,  9 } }
 559#define GRP3b     NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
 560#define GRP3S     NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
 561#define GRP4      NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
 562#define GRP5      NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
 563#define GRP6      NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
 564#define GRP7      NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
 565#define GRP8      NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
 566#define GRP9      NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
 567#define GRP11_C6  NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
 568#define GRP11_C7  NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
 569#define GRP12     NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
 570#define GRP13     NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
 571#define GRP14     NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
 572#define GRP15     NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
 573#define GRP16     NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
 574#define GRPAMD    NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
 575#define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
 576#define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
 577
 578#define PREGRP0   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  0 } }
 579#define PREGRP1   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  1 } }
 580#define PREGRP2   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  2 } }
 581#define PREGRP3   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  3 } }
 582#define PREGRP4   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  4 } }
 583#define PREGRP5   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  5 } }
 584#define PREGRP6   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  6 } }
 585#define PREGRP7   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  7 } }
 586#define PREGRP8   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  8 } }
 587#define PREGRP9   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  9 } }
 588#define PREGRP10  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
 589#define PREGRP11  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
 590#define PREGRP12  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
 591#define PREGRP13  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
 592#define PREGRP14  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
 593#define PREGRP15  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
 594#define PREGRP16  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
 595#define PREGRP17  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
 596#define PREGRP18  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
 597#define PREGRP19  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
 598#define PREGRP20  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
 599#define PREGRP21  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
 600#define PREGRP22  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
 601#define PREGRP23  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
 602#define PREGRP24  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
 603#define PREGRP25  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
 604#define PREGRP26  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
 605#define PREGRP27  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
 606#define PREGRP28  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
 607#define PREGRP29  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
 608#define PREGRP30  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
 609#define PREGRP31  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
 610#define PREGRP32  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
 611#define PREGRP33  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
 612#define PREGRP34  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
 613#define PREGRP35  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
 614#define PREGRP36  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
 615#define PREGRP37  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
 616#define PREGRP38  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
 617#define PREGRP39  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
 618#define PREGRP40  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
 619#define PREGRP41  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
 620#define PREGRP42  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
 621#define PREGRP43  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
 622#define PREGRP44  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
 623#define PREGRP45  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
 624#define PREGRP46  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
 625#define PREGRP47  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
 626#define PREGRP48  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
 627#define PREGRP49  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
 628#define PREGRP50  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
 629#define PREGRP51  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
 630#define PREGRP52  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
 631#define PREGRP53  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
 632#define PREGRP54  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
 633#define PREGRP55  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
 634#define PREGRP56  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
 635#define PREGRP57  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
 636#define PREGRP58  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
 637#define PREGRP59  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
 638#define PREGRP60  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
 639#define PREGRP61  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
 640#define PREGRP62  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
 641#define PREGRP63  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
 642#define PREGRP64  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
 643#define PREGRP65  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
 644#define PREGRP66  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
 645#define PREGRP67  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
 646#define PREGRP68  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
 647#define PREGRP69  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
 648#define PREGRP70  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
 649#define PREGRP71  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
 650#define PREGRP72  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
 651#define PREGRP73  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
 652#define PREGRP74  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
 653#define PREGRP75  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
 654#define PREGRP76  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
 655#define PREGRP77  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
 656#define PREGRP78  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
 657#define PREGRP79  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
 658#define PREGRP80  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
 659#define PREGRP81  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
 660#define PREGRP82  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
 661#define PREGRP83  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
 662#define PREGRP84  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
 663#define PREGRP85  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
 664#define PREGRP86  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
 665#define PREGRP87  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
 666#define PREGRP88  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
 667#define PREGRP89  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
 668#define PREGRP90  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
 669#define PREGRP91  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
 670#define PREGRP92  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
 671#define PREGRP93  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
 672#define PREGRP94  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
 673#define PREGRP95  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
 674#define PREGRP96  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
 675#define PREGRP97  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
 676#define PREGRP98  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } }
 677#define PREGRP99  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } }
 678#define PREGRP100 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 100 } }
 679#define PREGRP101 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 101 } }
 680#define PREGRP102 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 102 } }
 681#define PREGRP103 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 103 } }
 682#define PREGRP104 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 104 } }
 683#define PREGRP105 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 105 } }
 684#define PREGRP106 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 106 } }
 685#define PREGRP107 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 107 } }
 686#define PREGRP108 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 108 } }
 687#define PREGRP109 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 109 } }
 688
 689#define X86_64_0  NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
 690#define X86_64_1  NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
 691#define X86_64_2  NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
 692#define X86_64_3  NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
 693
 694#define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
 695#define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
 696
 697typedef void (*op_rtn) (int bytemode, int sizeflag);
 698
 699struct dis386 {
 700  const char *name;
 701  struct
 702    {
 703      op_rtn rtn;
 704      int bytemode;
 705    } op[MAX_OPERANDS];
 706};
 707
 708/* Upper case letters in the instruction names here are macros.
 709   'A' => print 'b' if no register operands or suffix_always is true
 710   'B' => print 'b' if suffix_always is true
 711   'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
 712   .      size prefix
 713   'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
 714   .      suffix_always is true
 715   'E' => print 'e' if 32-bit form of jcxz
 716   'F' => print 'w' or 'l' depending on address size prefix (loop insns)
 717   'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
 718   'H' => print ",pt" or ",pn" branch hint
 719   'I' => honor following macro letter even in Intel mode (implemented only
 720   .      for some of the macro letters)
 721   'J' => print 'l'
 722   'K' => print 'd' or 'q' if rex prefix is present.
 723   'L' => print 'l' if suffix_always is true
 724   'N' => print 'n' if instruction has no wait "prefix"
 725   'O' => print 'd' or 'o' (or 'q' in Intel mode)
 726   'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
 727   .      or suffix_always is true.  print 'q' if rex prefix is present.
 728   'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
 729   .      is true
 730   'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
 731   'S' => print 'w', 'l' or 'q' if suffix_always is true
 732   'T' => print 'q' in 64bit mode and behave as 'P' otherwise
 733   'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
 734   'V' => print 'q' in 64bit mode and behave as 'S' otherwise
 735   'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
 736   'X' => print 's', 'd' depending on data16 prefix (for XMM)
 737   'Y' => 'q' if instruction has an REX 64bit overwrite prefix
 738   'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
 739
 740   Many of the above letters print nothing in Intel mode.  See "putop"
 741   for the details.
 742
 743   Braces '{' and '}', and vertical bars '|', indicate alternative
 744   mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
 745   modes.  In cases where there are only two alternatives, the X86_64
 746   instruction is reserved, and "(bad)" is printed.
 747*/
 748
 749static const struct dis386 dis386[] = {
 750  /* 00 */
 751  { "addB",             { Eb, Gb } },
 752  { "addS",             { Ev, Gv } },
 753  { "addB",             { Gb, Eb } },
 754  { "addS",             { Gv, Ev } },
 755  { "addB",             { AL, Ib } },
 756  { "addS",             { eAX, Iv } },
 757  { "push{T|}",         { es } },
 758  { "pop{T|}",          { es } },
 759  /* 08 */
 760  { "orB",              { Eb, Gb } },
 761  { "orS",              { Ev, Gv } },
 762  { "orB",              { Gb, Eb } },
 763  { "orS",              { Gv, Ev } },
 764  { "orB",              { AL, Ib } },
 765  { "orS",              { eAX, Iv } },
 766  { "push{T|}",         { cs } },
 767  { "(bad)",            { XX } },       /* 0x0f extended opcode escape */
 768  /* 10 */
 769  { "adcB",             { Eb, Gb } },
 770  { "adcS",             { Ev, Gv } },
 771  { "adcB",             { Gb, Eb } },
 772  { "adcS",             { Gv, Ev } },
 773  { "adcB",             { AL, Ib } },
 774  { "adcS",             { eAX, Iv } },
 775  { "push{T|}",         { ss } },
 776  { "pop{T|}",          { ss } },
 777  /* 18 */
 778  { "sbbB",             { Eb, Gb } },
 779  { "sbbS",             { Ev, Gv } },
 780  { "sbbB",             { Gb, Eb } },
 781  { "sbbS",             { Gv, Ev } },
 782  { "sbbB",             { AL, Ib } },
 783  { "sbbS",             { eAX, Iv } },
 784  { "push{T|}",         { ds } },
 785  { "pop{T|}",          { ds } },
 786  /* 20 */
 787  { "andB",             { Eb, Gb } },
 788  { "andS",             { Ev, Gv } },
 789  { "andB",             { Gb, Eb } },
 790  { "andS",             { Gv, Ev } },
 791  { "andB",             { AL, Ib } },
 792  { "andS",             { eAX, Iv } },
 793  { "(bad)",            { XX } },       /* SEG ES prefix */
 794  { "daa{|}",           { XX } },
 795  /* 28 */
 796  { "subB",             { Eb, Gb } },
 797  { "subS",             { Ev, Gv } },
 798  { "subB",             { Gb, Eb } },
 799  { "subS",             { Gv, Ev } },
 800  { "subB",             { AL, Ib } },
 801  { "subS",             { eAX, Iv } },
 802  { "(bad)",            { XX } },       /* SEG CS prefix */
 803  { "das{|}",           { XX } },
 804  /* 30 */
 805  { "xorB",             { Eb, Gb } },
 806  { "xorS",             { Ev, Gv } },
 807  { "xorB",             { Gb, Eb } },
 808  { "xorS",             { Gv, Ev } },
 809  { "xorB",             { AL, Ib } },
 810  { "xorS",             { eAX, Iv } },
 811  { "(bad)",            { XX } },       /* SEG SS prefix */
 812  { "aaa{|}",           { XX } },
 813  /* 38 */
 814  { "cmpB",             { Eb, Gb } },
 815  { "cmpS",             { Ev, Gv } },
 816  { "cmpB",             { Gb, Eb } },
 817  { "cmpS",             { Gv, Ev } },
 818  { "cmpB",             { AL, Ib } },
 819  { "cmpS",             { eAX, Iv } },
 820  { "(bad)",            { XX } },       /* SEG DS prefix */
 821  { "aas{|}",           { XX } },
 822  /* 40 */
 823  { "inc{S|}",          { RMeAX } },
 824  { "inc{S|}",          { RMeCX } },
 825  { "inc{S|}",          { RMeDX } },
 826  { "inc{S|}",          { RMeBX } },
 827  { "inc{S|}",          { RMeSP } },
 828  { "inc{S|}",          { RMeBP } },
 829  { "inc{S|}",          { RMeSI } },
 830  { "inc{S|}",          { RMeDI } },
 831  /* 48 */
 832  { "dec{S|}",          { RMeAX } },
 833  { "dec{S|}",          { RMeCX } },
 834  { "dec{S|}",          { RMeDX } },
 835  { "dec{S|}",          { RMeBX } },
 836  { "dec{S|}",          { RMeSP } },
 837  { "dec{S|}",          { RMeBP } },
 838  { "dec{S|}",          { RMeSI } },
 839  { "dec{S|}",          { RMeDI } },
 840  /* 50 */
 841  { "pushV",            { RMrAX } },
 842  { "pushV",            { RMrCX } },
 843  { "pushV",            { RMrDX } },
 844  { "pushV",            { RMrBX } },
 845  { "pushV",            { RMrSP } },
 846  { "pushV",            { RMrBP } },
 847  { "pushV",            { RMrSI } },
 848  { "pushV",            { RMrDI } },
 849  /* 58 */
 850  { "popV",             { RMrAX } },
 851  { "popV",             { RMrCX } },
 852  { "popV",             { RMrDX } },
 853  { "popV",             { RMrBX } },
 854  { "popV",             { RMrSP } },
 855  { "popV",             { RMrBP } },
 856  { "popV",             { RMrSI } },
 857  { "popV",             { RMrDI } },
 858  /* 60 */
 859  { X86_64_0 },
 860  { X86_64_1 },
 861  { X86_64_2 },
 862  { X86_64_3 },
 863  { "(bad)",            { XX } },       /* seg fs */
 864  { "(bad)",            { XX } },       /* seg gs */
 865  { "(bad)",            { XX } },       /* op size prefix */
 866  { "(bad)",            { XX } },       /* adr size prefix */
 867  /* 68 */
 868  { "pushT",            { Iq } },
 869  { "imulS",            { Gv, Ev, Iv } },
 870  { "pushT",            { sIb } },
 871  { "imulS",            { Gv, Ev, sIb } },
 872  { "ins{b||b|}",       { Ybr, indirDX } },
 873  { "ins{R||G|}",       { Yzr, indirDX } },
 874  { "outs{b||b|}",      { indirDXr, Xb } },
 875  { "outs{R||G|}",      { indirDXr, Xz } },
 876  /* 70 */
 877  { "joH",              { Jb, XX, cond_jump_flag } },
 878  { "jnoH",             { Jb, XX, cond_jump_flag } },
 879  { "jbH",              { Jb, XX, cond_jump_flag } },
 880  { "jaeH",             { Jb, XX, cond_jump_flag } },
 881  { "jeH",              { Jb, XX, cond_jump_flag } },
 882  { "jneH",             { Jb, XX, cond_jump_flag } },
 883  { "jbeH",             { Jb, XX, cond_jump_flag } },
 884  { "jaH",              { Jb, XX, cond_jump_flag } },
 885  /* 78 */
 886  { "jsH",              { Jb, XX, cond_jump_flag } },
 887  { "jnsH",             { Jb, XX, cond_jump_flag } },
 888  { "jpH",              { Jb, XX, cond_jump_flag } },
 889  { "jnpH",             { Jb, XX, cond_jump_flag } },
 890  { "jlH",              { Jb, XX, cond_jump_flag } },
 891  { "jgeH",             { Jb, XX, cond_jump_flag } },
 892  { "jleH",             { Jb, XX, cond_jump_flag } },
 893  { "jgH",              { Jb, XX, cond_jump_flag } },
 894  /* 80 */
 895  { GRP1b },
 896  { GRP1S },
 897  { "(bad)",            { XX } },
 898  { GRP1Ss },
 899  { "testB",            { Eb, Gb } },
 900  { "testS",            { Ev, Gv } },
 901  { "xchgB",            { Eb, Gb } },
 902  { "xchgS",            { Ev, Gv } },
 903  /* 88 */
 904  { "movB",             { Eb, Gb } },
 905  { "movS",             { Ev, Gv } },
 906  { "movB",             { Gb, Eb } },
 907  { "movS",             { Gv, Ev } },
 908  { "movD",             { Sv, Sw } },
 909  { "leaS",             { Gv, M } },
 910  { "movD",             { Sw, Sv } },
 911  { GRP1a },
 912  /* 90 */
 913  { PREGRP38 },
 914  { "xchgS",            { RMeCX, eAX } },
 915  { "xchgS",            { RMeDX, eAX } },
 916  { "xchgS",            { RMeBX, eAX } },
 917  { "xchgS",            { RMeSP, eAX } },
 918  { "xchgS",            { RMeBP, eAX } },
 919  { "xchgS",            { RMeSI, eAX } },
 920  { "xchgS",            { RMeDI, eAX } },
 921  /* 98 */
 922  { "cW{t||t|}R",       { XX } },
 923  { "cR{t||t|}O",       { XX } },
 924  { "Jcall{T|}",        { Ap } },
 925  { "(bad)",            { XX } },       /* fwait */
 926  { "pushfT",           { XX } },
 927  { "popfT",            { XX } },
 928  { "sahf{|}",          { XX } },
 929  { "lahf{|}",          { XX } },
 930  /* a0 */
 931  { "movB",             { AL, Ob } },
 932  { "movS",             { eAX, Ov } },
 933  { "movB",             { Ob, AL } },
 934  { "movS",             { Ov, eAX } },
 935  { "movs{b||b|}",      { Ybr, Xb } },
 936  { "movs{R||R|}",      { Yvr, Xv } },
 937  { "cmps{b||b|}",      { Xb, Yb } },
 938  { "cmps{R||R|}",      { Xv, Yv } },
 939  /* a8 */
 940  { "testB",            { AL, Ib } },
 941  { "testS",            { eAX, Iv } },
 942  { "stosB",            { Ybr, AL } },
 943  { "stosS",            { Yvr, eAX } },
 944  { "lodsB",            { ALr, Xb } },
 945  { "lodsS",            { eAXr, Xv } },
 946  { "scasB",            { AL, Yb } },
 947  { "scasS",            { eAX, Yv } },
 948  /* b0 */
 949  { "movB",             { RMAL, Ib } },
 950  { "movB",             { RMCL, Ib } },
 951  { "movB",             { RMDL, Ib } },
 952  { "movB",             { RMBL, Ib } },
 953  { "movB",             { RMAH, Ib } },
 954  { "movB",             { RMCH, Ib } },
 955  { "movB",             { RMDH, Ib } },
 956  { "movB",             { RMBH, Ib } },
 957  /* b8 */
 958  { "movS",             { RMeAX, Iv64 } },
 959  { "movS",             { RMeCX, Iv64 } },
 960  { "movS",             { RMeDX, Iv64 } },
 961  { "movS",             { RMeBX, Iv64 } },
 962  { "movS",             { RMeSP, Iv64 } },
 963  { "movS",             { RMeBP, Iv64 } },
 964  { "movS",             { RMeSI, Iv64 } },
 965  { "movS",             { RMeDI, Iv64 } },
 966  /* c0 */
 967  { GRP2b },
 968  { GRP2S },
 969  { "retT",             { Iw } },
 970  { "retT",             { XX } },
 971  { "les{S|}",          { Gv, Mp } },
 972  { "ldsS",             { Gv, Mp } },
 973  { GRP11_C6 },
 974  { GRP11_C7 },
 975  /* c8 */
 976  { "enterT",           { Iw, Ib } },
 977  { "leaveT",           { XX } },
 978  { "lretP",            { Iw } },
 979  { "lretP",            { XX } },
 980  { "int3",             { XX } },
 981  { "int",              { Ib } },
 982  { "into{|}",          { XX } },
 983  { "iretP",            { XX } },
 984  /* d0 */
 985  { GRP2b_one },
 986  { GRP2S_one },
 987  { GRP2b_cl },
 988  { GRP2S_cl },
 989  { "aam{|}",           { sIb } },
 990  { "aad{|}",           { sIb } },
 991  { "(bad)",            { XX } },
 992  { "xlat",             { DSBX } },
 993  /* d8 */
 994  { FLOAT },
 995  { FLOAT },
 996  { FLOAT },
 997  { FLOAT },
 998  { FLOAT },
 999  { FLOAT },
1000  { FLOAT },

1001  { FLOAT },
1002  /* e0 */
1003  { "loopneFH",         { Jb, XX, loop_jcxz_flag } },
1004  { "loopeFH",          { Jb, XX, loop_jcxz_flag } },
1005  { "loopFH",           { Jb, XX, loop_jcxz_flag } },
1006  { "jEcxzH",           { Jb, XX, loop_jcxz_flag } },
1007  { "inB",              { AL, Ib } },
1008  { "inG",              { zAX, Ib } },
1009  { "outB",             { Ib, AL } },
1010  { "outG",             { Ib, zAX } },
1011  /* e8 */
1012  { "callT",            { Jv } },
1013  { "jmpT",             { Jv } },
1014  { "Jjmp{T|}",         { Ap } },
1015  { "jmp",              { Jb } },
1016  { "inB",              { AL, indirDX } },
1017  { "inG",              { zAX, indirDX } },
1018  { "outB",             { indirDX, AL } },
1019  { "outG",             { indirDX, zAX } },
1020  /* f0 */
1021  { "(bad)",            { XX } },       /* lock prefix */
1022  { "icebp",            { XX } },
1023  { "(bad)",            { XX } },       /* repne */
1024  { "(bad)",            { XX } },       /* repz */
1025  { "hlt",              { XX } },
1026  { "cmc",              { XX } },
1027  { GRP3b },
1028  { GRP3S },
1029  /* f8 */
1030  { "clc",              { XX } },
1031  { "stc",              { XX } },
1032  { "cli",              { XX } },
1033  { "sti",              { XX } },
1034  { "cld",              { XX } },
1035  { "std",              { XX } },
1036  { GRP4 },
1037  { GRP5 },
1038};
1039
1040static const struct dis386 dis386_twobyte[] = {
1041  /* 00 */
1042  { GRP6 },
1043  { GRP7 },
1044  { "larS",             { Gv, Ew } },
1045  { "lslS",             { Gv, Ew } },
1046  { "(bad)",            { XX } },
1047  { "syscall",          { XX } },
1048  { "clts",             { XX } },
1049  { "sysretP",          { XX } },
1050  /* 08 */
1051  { "invd",             { XX } },
1052  { "wbinvd",           { XX } },
1053  { "(bad)",            { XX } },
1054  { "ud2a",             { XX } },
1055  { "(bad)",            { XX } },
1056  { GRPAMD },
1057  { "femms",            { XX } },
1058  { "",                 { MX, EM, OPSUF } }, /* See OP_3DNowSuffix.  */
1059  /* 10 */
1060  { PREGRP8 },
1061  { PREGRP9 },
1062  { PREGRP30 },
1063  { "movlpX",           { EXq, XM, { SIMD_Fixup, 'h' } } },
1064  { "unpcklpX",         { XM, EXq } },
1065  { "unpckhpX",         { XM, EXq } },
1066  { PREGRP31 },
1067  { "movhpX",           { EXq, XM, { SIMD_Fixup, 'l' } } },
1068  /* 18 */
1069  { GRP16 },
1070  { "(bad)",            { XX } },
1071  { "(bad)",            { XX } },
1072  { "(bad)",            { XX } },
1073  { "(bad)",            { XX } },
1074  { "(bad)",            { XX } },
1075  { "(bad)",            { XX } },
1076  { "nopQ",             { Ev } },
1077  /* 20 */
1078  { "movZ",             { Rm, Cm } },
1079  { "movZ",             { Rm, Dm } },
1080  { "movZ",             { Cm, Rm } },
1081  { "movZ",             { Dm, Rm } },
1082  { "movL",             { Rd, Td } },
1083  { "(bad)",            { XX } },
1084  { "movL",             { Td, Rd } },
1085  { "(bad)",            { XX } },
1086  /* 28 */
1087  { "movapX",           { XM, EXx } },
1088  { "movapX",           { EXx,  XM } },
1089  { PREGRP2 },
1090  { PREGRP33 },
1091  { PREGRP4 },
1092  { PREGRP3 },
1093  { PREGRP93 },
1094  { PREGRP94 },
1095  /* 30 */
1096  { "wrmsr",            { XX } },
1097  { "rdtsc",            { XX } },
1098  { "rdmsr",            { XX } },
1099  { "rdpmc",            { XX } },
1100  { "sysenter",         { XX } },
1101  { "sysexit",          { XX } },
1102  { "(bad)",            { XX } },
1103  { "(bad)",            { XX } },
1104  /* 38 */
1105  { THREE_BYTE_0 },
1106  { "(bad)",            { XX } },
1107  { THREE_BYTE_1 },
1108  { "(bad)",            { XX } },
1109  { "(bad)",            { XX } },
1110  { "(bad)",            { XX } },
1111  { "(bad)",            { XX } },
1112  { "(bad)",            { XX } },
1113  /* 40 */
1114  { "cmovo",            { Gv, Ev } },
1115  { "cmovno",           { Gv, Ev } },
1116  { "cmovb",            { Gv, Ev } },
1117  { "cmovae",           { Gv, Ev } },
1118  { "cmove",            { Gv, Ev } },
1119  { "cmovne",           { Gv, Ev } },
1120  { "cmovbe",           { Gv, Ev } },
1121  { "cmova",            { Gv, Ev } },
1122  /* 48 */
1123  { "cmovs",            { Gv, Ev } },
1124  { "cmovns",           { Gv, Ev } },
1125  { "cmovp",            { Gv, Ev } },
1126  { "cmovnp",           { Gv, Ev } },
1127  { "cmovl",            { Gv, Ev } },
1128  { "cmovge",           { Gv, Ev } },
1129  { "cmovle",           { Gv, Ev } },
1130  { "cmovg",            { Gv, Ev } },
1131  /* 50 */
1132  { "movmskpX",         { Gdq, XS } },
1133  { PREGRP13 },
1134  { PREGRP12 },
1135  { PREGRP11 },
1136  { "andpX",            { XM, EXx } },
1137  { "andnpX",           { XM, EXx } },
1138  { "orpX",             { XM, EXx } },
1139  { "xorpX",            { XM, EXx } },
1140  /* 58 */
1141  { PREGRP0 },
1142  { PREGRP10 },
1143  { PREGRP17 },
1144  { PREGRP16 },
1145  { PREGRP14 },
1146  { PREGRP7 },
1147  { PREGRP5 },
1148  { PREGRP6 },
1149  /* 60 */
1150  { PREGRP95 },
1151  { PREGRP96 },
1152  { PREGRP97 },
1153  { "packsswb",         { MX, EM } },
1154  { "pcmpgtb",          { MX, EM } },
1155  { "pcmpgtw",          { MX, EM } },
1156  { "pcmpgtd",          { MX, EM } },
1157  { "packuswb",         { MX, EM } },
1158  /* 68 */
1159  { "punpckhbw",        { MX, EM } },
1160  { "punpckhwd",        { MX, EM } },
1161  { "punpckhdq",        { MX, EM } },
1162  { "packssdw",         { MX, EM } },
1163  { PREGRP26 },
1164  { PREGRP24 },
1165  { "movd",             { MX, Edq } },
1166  { PREGRP19 },
1167  /* 70 */
1168  { PREGRP22 },
1169  { GRP12 },
1170  { GRP13 },
1171  { GRP14 },
1172  { "pcmpeqb",          { MX, EM } },
1173  { "pcmpeqw",          { MX, EM } },
1174  { "pcmpeqd",          { MX, EM } },
1175  { "emms",             { XX } },
1176  /* 78 */
1177  { PREGRP34 },
1178  { PREGRP35 },
1179  { "(bad)",            { XX } },
1180  { "(bad)",            { XX } },
1181  { PREGRP28 },
1182  { PREGRP29 },
1183  { PREGRP23 },
1184  { PREGRP20 },
1185  /* 80 */
1186  { "joH",              { Jv, XX, cond_jump_flag } },
1187  { "jnoH",             { Jv, XX, cond_jump_flag } },
1188  { "jbH",              { Jv, XX, cond_jump_flag } },
1189  { "jaeH",             { Jv, XX, cond_jump_flag } },
1190  { "jeH",              { Jv, XX, cond_jump_flag } },
1191  { "jneH",             { Jv, XX, cond_jump_flag } },
1192  { "jbeH",             { Jv, XX, cond_jump_flag } },
1193  { "jaH",              { Jv, XX, cond_jump_flag } },
1194  /* 88 */
1195  { "jsH",              { Jv, XX, cond_jump_flag } },
1196  { "jnsH",             { Jv, XX, cond_jump_flag } },
1197  { "jpH",              { Jv, XX, cond_jump_flag } },
1198  { "jnpH",             { Jv, XX, cond_jump_flag } },
1199  { "jlH",              { Jv, XX, cond_jump_flag } },
1200  { "jgeH",             { Jv, XX, cond_jump_flag } },
1201  { "jleH",             { Jv, XX, cond_jump_flag } },
1202  { "jgH",              { Jv, XX, cond_jump_flag } },
1203  /* 90 */
1204  { "seto",             { Eb } },
1205  { "setno",            { Eb } },
1206  { "setb",             { Eb } },
1207  { "setae",            { Eb } },
1208  { "sete",             { Eb } },
1209  { "setne",            { Eb } },
1210  { "setbe",            { Eb } },
1211  { "seta",             { Eb } },
1212  /* 98 */
1213  { "sets",             { Eb } },
1214  { "setns",            { Eb } },
1215  { "setp",             { Eb } },
1216  { "setnp",            { Eb } },
1217  { "setl",             { Eb } },
1218  { "setge",            { Eb } },
1219  { "setle",            { Eb } },
1220  { "setg",             { Eb } },
1221  /* a0 */
1222  { "pushT",            { fs } },
1223  { "popT",             { fs } },
1224  { "cpuid",            { XX } },
1225  { "btS",              { Ev, Gv } },
1226  { "shldS",            { Ev, Gv, Ib } },
1227  { "shldS",            { Ev, Gv, CL } },
1228  { GRPPADLCK2 },
1229  { GRPPADLCK1 },
1230  /* a8 */
1231  { "pushT",            { gs } },
1232  { "popT",             { gs } },
1233  { "rsm",              { XX } },
1234  { "btsS",             { Ev, Gv } },
1235  { "shrdS",            { Ev, Gv, Ib } },
1236  { "shrdS",            { Ev, Gv, CL } },
1237  { GRP15 },
1238  { "imulS",            { Gv, Ev } },
1239  /* b0 */
1240  { "cmpxchgB",         { Eb, Gb } },
1241  { "cmpxchgS",         { Ev, Gv } },
1242  { "lssS",             { Gv, Mp } },
1243  { "btrS",             { Ev, Gv } },
1244  { "lfsS",             { Gv, Mp } },
1245  { "lgsS",             { Gv, Mp } },
1246  { "movz{bR|x|bR|x}",  { Gv, Eb } },
1247  { "movz{wR|x|wR|x}",  { Gv, Ew } }, /* yes, there really is movzww ! */
1248  /* b8 */
1249  { PREGRP37 },
1250  { "ud2b",             { XX } },
1251  { GRP8 },
1252  { "btcS",             { Ev, Gv } },
1253  { PREGRP107 },
1254  { PREGRP36 },
1255  { "movs{bR|x|bR|x}",  { Gv, Eb } },
1256  { "movs{wR|x|wR|x}",  { Gv, Ew } }, /* yes, there really is movsww ! */
1257  /* c0 */
1258  { "xaddB",            { Eb, Gb } },
1259  { "xaddS",            { Ev, Gv } },
1260  { PREGRP1 },
1261  { "movntiS",          { Ev, Gv } },
1262  { "pinsrw",           { MX, Edqw, Ib } },
1263  { "pextrw",           { Gdq, MS, Ib } },
1264  { "shufpX",           { XM, EXx, Ib } },
1265  { GRP9 },
1266  /* c8 */
1267  { "bswap",            { RMeAX } },
1268  { "bswap",            { RMeCX } },
1269  { "bswap",            { RMeDX } },
1270  { "bswap",            { RMeBX } },
1271  { "bswap",            { RMeSP } },
1272  { "bswap",            { RMeBP } },
1273  { "bswap",            { RMeSI } },
1274  { "bswap",            { RMeDI } },
1275  /* d0 */
1276  { PREGRP27 },
1277  { "psrlw",            { MX, EM } },
1278  { "psrld",            { MX, EM } },
1279  { "psrlq",            { MX, EM } },
1280  { "paddq",            { MX, EM } },
1281  { "pmullw",           { MX, EM } },
1282  { PREGRP21 },
1283  { "pmovmskb",         { Gdq, MS } },
1284  /* d8 */
1285  { "psubusb",          { MX, EM } },
1286  { "psubusw",          { MX, EM } },
1287  { "pminub",           { MX, EM } },
1288  { "pand",             { MX, EM } },
1289  { "paddusb",          { MX, EM } },
1290  { "paddusw",          { MX, EM } },
1291  { "pmaxub",           { MX, EM } },
1292  { "pandn",            { MX, EM } },
1293  /* e0 */
1294  { "pavgb",            { MX, EM } },
1295  { "psraw",            { MX, EM } },
1296  { "psrad",            { MX, EM } },
1297  { "pavgw",            { MX, EM } },
1298  { "pmulhuw",          { MX, EM } },
1299  { "pmulhw",           { MX, EM } },
1300  { PREGRP15 },
1301  { PREGRP25 },
1302  /* e8 */
1303  { "psubsb",           { MX, EM } },
1304  { "psubsw",           { MX, EM } },
1305  { "pminsw",           { MX, EM } },
1306  { "por",              { MX, EM } },
1307  { "paddsb",           { MX, EM } },
1308  { "paddsw",           { MX, EM } },
1309  { "pmaxsw",           { MX, EM } },
1310  { "pxor",             { MX, EM } },
1311  /* f0 */
1312  { PREGRP32 },
1313  { "psllw",            { MX, EM } },
1314  { "pslld",            { MX, EM } },
1315  { "psllq",            { MX, EM } },
1316  { "pmuludq",          { MX, EM } },
1317  { "pmaddwd",          { MX, EM } },
1318  { "psadbw",           { MX, EM } },
1319  { PREGRP18 },
1320  /* f8 */
1321  { "psubb",            { MX, EM } },
1322  { "psubw",            { MX, EM } },
1323  { "psubd",            { MX, EM } },
1324  { "psubq",            { MX, EM } },
1325  { "paddb",            { MX, EM } },
1326  { "paddw",            { MX, EM } },
1327  { "paddd",            { MX, EM } },
1328  { "(bad)",            { XX } },
1329};
1330
1331static const unsigned char onebyte_has_modrm[256] = {
1332  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1333  /*       -------------------------------        */
1334  /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1335  /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1336  /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1337  /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1338  /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1339  /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1340  /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1341  /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1342  /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1343  /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1344  /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1345  /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1346  /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1347  /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1348  /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1349  /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1  /* f0 */
1350  /*       -------------------------------        */
1351  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1352};
1353
1354static const unsigned char twobyte_has_modrm[256] = {
1355  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1356  /*       -------------------------------        */
1357  /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1358  /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1359  /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1360  /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1361  /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1362  /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1363  /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1364  /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1365  /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1366  /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1367  /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1368  /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1369  /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1370  /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1371  /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1372  /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0  /* ff */
1373  /*       -------------------------------        */
1374  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1375};
1376
1377static const unsigned char twobyte_uses_DATA_prefix[256] = {
1378  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1379  /*       -------------------------------        */
1380  /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1381  /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1382  /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1383  /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1384  /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1385  /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1386  /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1387  /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
1388  /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1389  /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1390  /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1391  /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1392  /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1393  /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1394  /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1395  /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0  /* ff */
1396  /*       -------------------------------        */
1397  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1398};
1399
1400static const unsigned char twobyte_uses_REPNZ_prefix[256] = {
1401  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1402  /*       -------------------------------        */
1403  /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1404  /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1405  /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1406  /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1407  /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1408  /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1409  /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1410  /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1411  /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1412  /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1413  /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1414  /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1415  /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1416  /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1417  /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1418  /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1419  /*       -------------------------------        */
1420  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1421};
1422
1423static const unsigned char twobyte_uses_REPZ_prefix[256] = {
1424  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1425  /*       -------------------------------        */
1426  /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1427  /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1428  /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1429  /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1430  /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1431  /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1432  /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1433  /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1434  /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1435  /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1436  /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1437  /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
1438  /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1439  /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1440  /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1441  /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1442  /*       -------------------------------        */
1443  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1444};
1445
1446/* This is used to determine if opcode 0f 38 XX uses DATA prefix.  */
1447static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = {
1448  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1449  /*       -------------------------------        */
1450  /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
1451  /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */
1452  /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */
1453  /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */
1454  /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1455  /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1456  /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1457  /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1458  /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1459  /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1460  /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1461  /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1462  /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1463  /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1, /* df */
1464  /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1465  /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0, /* ff */
1466  /*       -------------------------------        */
1467  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1468};
1469
1470/* This is used to determine if opcode 0f 38 XX uses REPNZ prefix.  */
1471static const unsigned char threebyte_0x38_uses_REPNZ_prefix[256] = {
1472  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1473  /*       -------------------------------        */
1474  /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1475  /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1476  /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1477  /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1478  /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1479  /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1480  /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1481  /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1482  /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1483  /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1484  /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1485  /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1486  /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1487  /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1488  /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1489  /* f0 */ 1,1,0,0,0,1,0,1,0,0,0,0,0,0,0,0, /* ff */
1490  /*       -------------------------------        */
1491  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1492};
1493
1494/* This is used to determine if opcode 0f 38 XX uses REPZ prefix.  */
1495static const unsigned char threebyte_0x38_uses_REPZ_prefix[256] = {
1496  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1497  /*       -------------------------------        */
1498  /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1499  /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1500  /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1501  /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1502  /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1503  /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1504  /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1505  /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1506  /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1507  /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1508  /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1509  /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1510  /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1511  /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1512  /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1513  /* f0 */ 0,0,0,0,0,1,0,1,0,0,0,0,0,0,0,0, /* ff */
1514  /*       -------------------------------        */
1515  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1516};
1517
1518/* This is used to determine if opcode 0f 3a XX uses DATA prefix.  */
1519static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = {
1520  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1521  /*       -------------------------------        */
1522  /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */
1523  /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */
1524  /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1525  /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1526  /* 40 */ 1,1,1,0,1,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1527  /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1528  /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1529  /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1530  /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1531  /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1532  /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1533  /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1534  /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1535  /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* df */
1536  /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1537  /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1538  /*       -------------------------------        */
1539  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1540};
1541
1542/* This is used to determine if opcode 0f 3a XX uses REPNZ prefix.  */
1543static const unsigned char threebyte_0x3a_uses_REPNZ_prefix[256] = {
1544  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1545  /*       -------------------------------        */
1546  /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1547  /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1548  /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1549  /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1550  /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1551  /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1552  /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1553  /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1554  /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1555  /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1556  /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1557  /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1558  /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1559  /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1560  /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1561  /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1562  /*       -------------------------------        */
1563  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1564};
1565
1566/* This is used to determine if opcode 0f 3a XX uses REPZ prefix.  */
1567static const unsigned char threebyte_0x3a_uses_REPZ_prefix[256] = {
1568  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1569  /*       -------------------------------        */
1570  /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1571  /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1572  /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1573  /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1574  /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1575  /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1576  /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1577  /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1578  /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1579  /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1580  /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1581  /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1582  /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1583  /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1584  /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1585  /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1586  /*       -------------------------------        */
1587  /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1588};
1589
1590static char obuf[100];
1591static char *obufp;
1592static char scratchbuf[100];
1593static unsigned char *start_codep;
1594static unsigned char *insn_codep;
1595static unsigned char *codep;
1596static disassemble_info *the_info;
1597static struct
1598  {
1599    int mod;
1600    int reg;
1601    int rm;
1602  }
1603modrm;
1604static unsigned char need_modrm;
1605
1606/* If we are accessing mod/rm/reg without need_modrm set, then the
1607   values are stale.  Hitting this abort likely indicates that you
1608   need to update onebyte_has_modrm or twobyte_has_modrm.  */
1609#define MODRM_CHECK  if (!need_modrm) abort ()
1610
1611static const char * const *names64;
1612static const char * const *names32;
1613static const char * const *names16;
1614static const char * const *names8;
1615static const char * const *names8rex;
1616static const char * const *names_seg;
1617static const char * const *index16;
1618
1619static const char * const intel_names64[] = {
1620  "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1621  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1622};
1623static const char * const intel_names32[] = {
1624  "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1625  "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1626};
1627static const char * const intel_names16[] = {
1628  "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1629  "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1630};
1631static const char * const intel_names8[] = {
1632  "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1633};
1634static const char * const intel_names8rex[] = {
1635  "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1636  "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1637};
1638static const char * const intel_names_seg[] = {
1639  "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1640};
1641static const char * const intel_index16[] = {
1642  "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1643};
1644
1645static const char * const att_names64[] = {
1646  "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1647  "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1648};
1649static const char * const att_names32[] = {
1650  "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1651  "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1652};
1653static const char * const att_names16[] = {
1654  "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1655  "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1656};
1657static const char * const att_names8[] = {
1658  "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1659};
1660static const char * const att_names8rex[] = {
1661  "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1662  "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1663};
1664static const char * const att_names_seg[] = {
1665  "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1666};
1667static const char * const att_index16[] = {
1668  "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1669};
1670
1671static const struct dis386 grps[][8] = {
1672  /* GRP1a */
1673  {
1674    { "popU",   { stackEv } },
1675    { "(bad)",  { XX } },
1676    { "(bad)",  { XX } },
1677    { "(bad)",  { XX } },
1678    { "(bad)",  { XX } },
1679    { "(bad)",  { XX } },
1680    { "(bad)",  { XX } },
1681    { "(bad)",  { XX } },
1682  },
1683  /* GRP1b */
1684  {
1685    { "addA",   { Eb, Ib } },
1686    { "orA",    { Eb, Ib } },
1687    { "adcA",   { Eb, Ib } },
1688    { "sbbA",   { Eb, Ib } },
1689    { "andA",   { Eb, Ib } },
1690    { "subA",   { Eb, Ib } },
1691    { "xorA",   { Eb, Ib } },
1692    { "cmpA",   { Eb, Ib } },
1693  },
1694  /* GRP1S */
1695  {
1696    { "addQ",   { Ev, Iv } },
1697    { "orQ",    { Ev, Iv } },
1698    { "adcQ",   { Ev, Iv } },
1699    { "sbbQ",   { Ev, Iv } },
1700    { "andQ",   { Ev, Iv } },
1701    { "subQ",   { Ev, Iv } },
1702    { "xorQ",   { Ev, Iv } },
1703    { "cmpQ",   { Ev, Iv } },
1704  },
1705  /* GRP1Ss */
1706  {
1707    { "addQ",   { Ev, sIb } },
1708    { "orQ",    { Ev, sIb } },
1709    { "adcQ",   { Ev, sIb } },
1710    { "sbbQ",   { Ev, sIb } },
1711    { "andQ",   { Ev, sIb } },
1712    { "subQ",   { Ev, sIb } },
1713    { "xorQ",   { Ev, sIb } },
1714    { "cmpQ",   { Ev, sIb } },
1715  },
1716  /* GRP2b */
1717  {
1718    { "rolA",   { Eb, Ib } },
1719    { "rorA",   { Eb, Ib } },
1720    { "rclA",   { Eb, Ib } },
1721    { "rcrA",   { Eb, Ib } },
1722    { "shlA",   { Eb, Ib } },
1723    { "shrA",   { Eb, Ib } },
1724    { "(bad)",  { XX } },
1725    { "sarA",   { Eb, Ib } },
1726  },
1727  /* GRP2S */
1728  {
1729    { "rolQ",   { Ev, Ib } },
1730    { "rorQ",   { Ev, Ib } },
1731    { "rclQ",   { Ev, Ib } },
1732    { "rcrQ",   { Ev, Ib } },
1733    { "shlQ",   { Ev, Ib } },
1734    { "shrQ",   { Ev, Ib } },
1735    { "(bad)",  { XX } },
1736    { "sarQ",   { Ev, Ib } },
1737  },
1738  /* GRP2b_one */
1739  {
1740    { "rolA",   { Eb, I1 } },
1741    { "rorA",   { Eb, I1 } },
1742    { "rclA",   { Eb, I1 } },
1743    { "rcrA",   { Eb, I1 } },
1744    { "shlA",   { Eb, I1 } },
1745    { "shrA",   { Eb, I1 } },
1746    { "(bad)",  { XX } },
1747    { "sarA",   { Eb, I1 } },
1748  },
1749  /* GRP2S_one */
1750  {
1751    { "rolQ",   { Ev, I1 } },
1752    { "rorQ",   { Ev, I1 } },
1753    { "rclQ",   { Ev, I1 } },
1754    { "rcrQ",   { Ev, I1 } },
1755    { "shlQ",   { Ev, I1 } },
1756    { "shrQ",   { Ev, I1 } },
1757    { "(bad)",  { XX } },
1758    { "sarQ",   { Ev, I1 } },
1759  },
1760  /* GRP2b_cl */
1761  {
1762    { "rolA",   { Eb, CL } },
1763    { "rorA",   { Eb, CL } },
1764    { "rclA",   { Eb, CL } },
1765    { "rcrA",   { Eb, CL } },
1766    { "shlA",   { Eb, CL } },
1767    { "shrA",   { Eb, CL } },
1768    { "(bad)",  { XX } },
1769    { "sarA",   { Eb, CL } },
1770  },
1771  /* GRP2S_cl */
1772  {
1773    { "rolQ",   { Ev, CL } },
1774    { "rorQ",   { Ev, CL } },
1775    { "rclQ",   { Ev, CL } },
1776    { "rcrQ",   { Ev, CL } },
1777    { "shlQ",   { Ev, CL } },
1778    { "shrQ",   { Ev, CL } },
1779    { "(bad)",  { XX } },
1780    { "sarQ",   { Ev, CL } },
1781  },
1782  /* GRP3b */
1783  {
1784    { "testA",  { Eb, Ib } },
1785    { "(bad)",  { Eb } },
1786    { "notA",   { Eb } },
1787    { "negA",   { Eb } },
1788    { "mulA",   { Eb } },       /* Don't print the implicit %al register,  */
1789    { "imulA",  { Eb } },       /* to distinguish these opcodes from other */
1790    { "divA",   { Eb } },       /* mul/imul opcodes.  Do the same for div  */
1791    { "idivA",  { Eb } },       /* and idiv for consistency.               */
1792  },
1793  /* GRP3S */
1794  {
1795    { "testQ",  { Ev, Iv } },
1796    { "(bad)",  { XX } },
1797    { "notQ",   { Ev } },
1798    { "negQ",   { Ev } },
1799    { "mulQ",   { Ev } },       /* Don't print the implicit register.  */
1800    { "imulQ",  { Ev } },
1801    { "divQ",   { Ev } },
1802    { "idivQ",  { Ev } },
1803  },
1804  /* GRP4 */
1805  {
1806    { "incA",   { Eb } },
1807    { "decA",   { Eb } },
1808    { "(bad)",  { XX } },
1809    { "(bad)",  { XX } },
1810    { "(bad)",  { XX } },
1811    { "(bad)",  { XX } },
1812    { "(bad)",  { XX } },
1813    { "(bad)",  { XX } },
1814  },
1815  /* GRP5 */
1816  {
1817    { "incQ",   { Ev } },
1818    { "decQ",   { Ev } },
1819    { "callT",  { indirEv } },
1820    { "JcallT", { indirEp } },
1821    { "jmpT",   { indirEv } },
1822    { "JjmpT",  { indirEp } },
1823    { "pushU",  { stackEv } },
1824    { "(bad)",  { XX } },
1825  },
1826  /* GRP6 */
1827  {
1828    { "sldtD",  { Sv } },
1829    { "strD",   { Sv } },
1830    { "lldt",   { Ew } },
1831    { "ltr",    { Ew } },
1832    { "verr",   { Ew } },
1833    { "verw",   { Ew } },
1834    { "(bad)",  { XX } },
1835    { "(bad)",  { XX } },
1836  },
1837  /* GRP7 */
1838  {
1839    { "sgdt{Q|IQ||}", { { VMX_Fixup, 0 } } },
1840    { "sidt{Q|IQ||}", { { PNI_Fixup, 0 } } },
1841    { "lgdt{Q|Q||}",     { M } },
1842    { "lidt{Q|Q||}",     { { SVME_Fixup, 0 } } },
1843    { "smswD",  { Sv } },
1844    { "(bad)",  { XX } },
1845    { "lmsw",   { Ew } },
1846    { "invlpg", { { INVLPG_Fixup, w_mode } } },
1847  },
1848  /* GRP8 */
1849  {
1850    { "(bad)",  { XX } },
1851    { "(bad)",  { XX } },
1852    { "(bad)",  { XX } },
1853    { "(bad)",  { XX } },
1854    { "btQ",    { Ev, Ib } },
1855    { "btsQ",   { Ev, Ib } },
1856    { "btrQ",   { Ev, Ib } },
1857    { "btcQ",   { Ev, Ib } },
1858  },
1859  /* GRP9 */
1860  {
1861    { "(bad)",  { XX } },
1862    { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
1863    { "(bad)",  { XX } },
1864    { "(bad)",  { XX } },
1865    { "(bad)",  { XX } },
1866    { "(bad)",  { XX } },
1867    { "",       { VM } },               /* See OP_VMX.  */
1868    { "vmptrst", { Mq } },
1869  },
1870  /* GRP11_C6 */
1871  {
1872    { "movA",   { Eb, Ib } },
1873    { "(bad)",  { XX } },
1874    { "(bad)",  { XX } },
1875    { "(bad)",  { XX } },
1876    { "(bad)",  { XX } },
1877    { "(bad)",  { XX } },
1878    { "(bad)",  { XX } },
1879    { "(bad)",  { XX } },
1880  },
1881  /* GRP11_C7 */
1882  {
1883    { "movQ",   { Ev, Iv } },
1884    { "(bad)",  { XX } },
1885    { "(bad)",  { XX } },
1886    { "(bad)",  { XX } },
1887    { "(bad)",  { XX } },
1888    { "(bad)",  { XX } },
1889    { "(bad)",  { XX } },
1890    { "(bad)",  { XX } },
1891  },
1892  /* GRP12 */
1893  {
1894    { "(bad)",  { XX } },
1895    { "(bad)",  { XX } },
1896    { "psrlw",  { MS, Ib } },
1897    { "(bad)",  { XX } },
1898    { "psraw",  { MS, Ib } },
1899    { "(bad)",  { XX } },
1900    { "psllw",  { MS, Ib } },
1901    { "(bad)",  { XX } },
1902  },
1903  /* GRP13 */
1904  {
1905    { "(bad)",  { XX } },
1906    { "(bad)",  { XX } },
1907    { "psrld",  { MS, Ib } },
1908    { "(bad)",  { XX } },
1909    { "psrad",  { MS, Ib } },
1910    { "(bad)",  { XX } },
1911    { "pslld",  { MS, Ib } },
1912    { "(bad)",  { XX } },
1913  },
1914  /* GRP14 */
1915  {
1916    { "(bad)",  { XX } },
1917    { "(bad)",  { XX } },
1918    { "psrlq",  { MS, Ib } },
1919    { "psrldq", { MS, Ib } },
1920    { "(bad)",  { XX } },
1921    { "(bad)",  { XX } },
1922    { "psllq",  { MS, Ib } },
1923    { "pslldq", { MS, Ib } },
1924  },
1925  /* GRP15 */
1926  {
1927    { "fxsave",         { Ev } },
1928    { "fxrstor",        { Ev } },
1929    { "ldmxcsr",        { Ev } },
1930    { "stmxcsr",        { Ev } },
1931    { "(bad)",          { XX } },
1932    { "lfence",         { { OP_0fae, 0 } } },
1933    { "mfence",         { { OP_0fae, 0 } } },
1934    { "clflush",        { { OP_0fae, 0 } } },
1935  },
1936  /* GRP16 */
1937  {
1938    { "prefetchnta",    { Ev } },
1939    { "prefetcht0",     { Ev } },
1940    { "prefetcht1",     { Ev } },
1941    { "prefetcht2",     { Ev } },
1942    { "(bad)",          { XX } },
1943    { "(bad)",          { XX } },
1944    { "(bad)",          { XX } },
1945    { "(bad)",          { XX } },
1946  },
1947  /* GRPAMD */
1948  {
1949    { "prefetch",       { Eb } },
1950    { "prefetchw",      { Eb } },
1951    { "(bad)",          { XX } },
1952    { "(bad)",          { XX } },
1953    { "(bad)",          { XX } },
1954    { "(bad)",          { XX } },
1955    { "(bad)",          { XX } },
1956    { "(bad)",          { XX } },
1957  },
1958  /* GRPPADLCK1 */
1959  {
1960    { "xstore-rng",     { { OP_0f07, 0 } } },
1961    { "xcrypt-ecb",     { { OP_0f07, 0 } } },
1962    { "xcrypt-cbc",     { { OP_0f07, 0 } } },
1963    { "xcrypt-ctr",     { { OP_0f07, 0 } } },
1964    { "xcrypt-cfb",     { { OP_0f07, 0 } } },
1965    { "xcrypt-ofb",     { { OP_0f07, 0 } } },
1966    { "(bad)",          { { OP_0f07, 0 } } },
1967    { "(bad)",          { { OP_0f07, 0 } } },
1968  },
1969  /* GRPPADLCK2 */
1970  {
1971    { "montmul",        { { OP_0f07, 0 } } },
1972    { "xsha1",          { { OP_0f07, 0 } } },
1973    { "xsha256",        { { OP_0f07, 0 } } },
1974    { "(bad)",          { { OP_0f07, 0 } } },
1975    { "(bad)",          { { OP_0f07, 0 } } },
1976    { "(bad)",          { { OP_0f07, 0 } } },
1977    { "(bad)",          { { OP_0f07, 0 } } },
1978    { "(bad)",          { { OP_0f07, 0 } } },
1979  }
1980};
1981
1982static const struct dis386 prefix_user_table[][4] = {
1983  /* PREGRP0 */
1984  {
1985    { "addps", { XM, EXx } },
1986    { "addss", { XM, EXd } },
1987    { "addpd", { XM, EXx } },
1988    { "addsd", { XM, EXq } },
1989  },
1990  /* PREGRP1 */
1991  {
1992    { "", { XM, EXx, OPSIMD } },        /* See OP_SIMD_SUFFIX.  */
1993    { "", { XM, EXx, OPSIMD } },
1994    { "", { XM, EXx, OPSIMD } },
1995    { "", { XM, EXx, OPSIMD } },
1996  },
1997  /* PREGRP2 */
1998  {
1999    { "cvtpi2ps", { XM, EMC } },
2000    { "cvtsi2ssY", { XM, Ev } },

2001    { "cvtpi2pd", { XM, EMC } },
2002    { "cvtsi2sdY", { XM, Ev } },
2003  },
2004  /* PREGRP3 */
2005  {
2006    { "cvtps2pi", { MXC, EXx } },
2007    { "cvtss2siY", { Gv, EXx } },
2008    { "cvtpd2pi", { MXC, EXx } },
2009    { "cvtsd2siY", { Gv, EXx } },
2010  },
2011  /* PREGRP4 */
2012  {
2013    { "cvttps2pi", { MXC, EXx } },
2014    { "cvttss2siY", { Gv, EXx } },
2015    { "cvttpd2pi", { MXC, EXx } },
2016    { "cvttsd2siY", { Gv, EXx } },
2017  },
2018  /* PREGRP5 */
2019  {
2020    { "divps",  { XM, EXx } },
2021    { "divss",  { XM, EXx } },
2022    { "divpd",  { XM, EXx } },
2023    { "divsd",  { XM, EXx } },
2024  },
2025  /* PREGRP6 */
2026  {
2027    { "maxps",  { XM, EXx } },
2028    { "maxss",  { XM, EXx } },
2029    { "maxpd",  { XM, EXx } },
2030    { "maxsd",  { XM, EXx } },
2031  },
2032  /* PREGRP7 */
2033  {
2034    { "minps",  { XM, EXx } },
2035    { "minss",  { XM, EXx } },
2036    { "minpd",  { XM, EXx } },
2037    { "minsd",  { XM, EXx } },
2038  },
2039  /* PREGRP8 */
2040  {
2041    { "movups", { XM, EXx } },
2042    { "movss",  { XM, EXx } },
2043    { "movupd", { XM, EXx } },
2044    { "movsd",  { XM, EXx } },
2045  },
2046  /* PREGRP9 */
2047  {
2048    { "movups", { EXx,  XM } },
2049    { "movss",  { EXx,  XM } },
2050    { "movupd", { EXx,  XM } },
2051    { "movsd",  { EXx,  XM } },
2052  },
2053  /* PREGRP10 */
2054  {
2055    { "mulps",  { XM, EXx } },
2056    { "mulss",  { XM, EXx } },
2057    { "mulpd",  { XM, EXx } },
2058    { "mulsd",  { XM, EXx } },
2059  },
2060  /* PREGRP11 */
2061  {
2062    { "rcpps",  { XM, EXx } },
2063    { "rcpss",  { XM, EXx } },
2064    { "(bad)",  { XM, EXx } },
2065    { "(bad)",  { XM, EXx } },
2066  },
2067  /* PREGRP12 */
2068  {
2069    { "rsqrtps",{ XM, EXx } },
2070    { "rsqrtss",{ XM, EXx } },
2071    { "(bad)",  { XM, EXx } },
2072    { "(bad)",  { XM, EXx } },
2073  },
2074  /* PREGRP13 */
2075  {
2076    { "sqrtps", { XM, EXx } },
2077    { "sqrtss", { XM, EXx } },
2078    { "sqrtpd", { XM, EXx } },
2079    { "sqrtsd", { XM, EXx } },
2080  },
2081  /* PREGRP14 */
2082  {
2083    { "subps",  { XM, EXx } },
2084    { "subss",  { XM, EXx } },
2085    { "subpd",  { XM, EXx } },
2086    { "subsd",  { XM, EXx } },
2087  },
2088  /* PREGRP15 */
2089  {
2090    { "(bad)",  { XM, EXx } },
2091    { "cvtdq2pd", { XM, EXq } },
2092    { "cvttpd2dq", { XM, EXx } },
2093    { "cvtpd2dq", { XM, EXx } },
2094  },
2095  /* PREGRP16 */
2096  {
2097    { "cvtdq2ps", { XM, EXx } },
2098    { "cvttps2dq", { XM, EXx } },
2099    { "cvtps2dq", { XM, EXx } },
2100    { "(bad)",  { XM, EXx } },
2101  },
2102  /* PREGRP17 */
2103  {
2104    { "cvtps2pd", { XM, EXq } },
2105    { "cvtss2sd", { XM, EXx } },
2106    { "cvtpd2ps", { XM, EXx } },
2107    { "cvtsd2ss", { XM, EXx } },
2108  },
2109  /* PREGRP18 */
2110  {
2111    { "maskmovq", { MX, MS } },
2112    { "(bad)",  { XM, EXx } },
2113    { "maskmovdqu", { XM, XS } },
2114    { "(bad)",  { XM, EXx } },
2115  },
2116  /* PREGRP19 */
2117  {
2118    { "movq",   { MX, EM } },
2119    { "movdqu", { XM, EXx } },
2120    { "movdqa", { XM, EXx } },
2121    { "(bad)",  { XM, EXx } },
2122  },
2123  /* PREGRP20 */
2124  {
2125    { "movq",   { EM, MX } },
2126    { "movdqu", { EXx,  XM } },
2127    { "movdqa", { EXx,  XM } },
2128    { "(bad)",  { EXx,  XM } },
2129  },
2130  /* PREGRP21 */
2131  {
2132    { "(bad)",  { EXx,  XM } },
2133    { "movq2dq",{ XM, MS } },
2134    { "movq",   { EXx,  XM } },
2135    { "movdq2q",{ MX, XS } },
2136  },
2137  /* PREGRP22 */
2138  {
2139    { "pshufw", { MX, EM, Ib } },
2140    { "pshufhw",{ XM, EXx, Ib } },
2141    { "pshufd", { XM, EXx, Ib } },
2142    { "pshuflw",{ XM, EXx, Ib } },
2143  },
2144  /* PREGRP23 */
2145  {
2146    { "movd",   { Edq, MX } },
2147    { "movq",   { XM, EXx } },
2148    { "movd",   { Edq, XM } },
2149    { "(bad)",  { Ed, XM } },
2150  },
2151  /* PREGRP24 */
2152  {
2153    { "(bad)",  { MX, EXx } },
2154    { "(bad)",  { XM, EXx } },
2155    { "punpckhqdq", { XM, EXx } },
2156    { "(bad)",  { XM, EXx } },
2157  },
2158  /* PREGRP25 */
2159  {
2160    { "movntq", { EM, MX } },
2161    { "(bad)",  { EM, XM } },
2162    { "movntdq",{ EM, XM } },
2163    { "(bad)",  { EM, XM } },
2164  },
2165  /* PREGRP26 */
2166  {
2167    { "(bad)",  { MX, EXx } },
2168    { "(bad)",  { XM, EXx } },
2169    { "punpcklqdq", { XM, EXx } },
2170    { "(bad)",  { XM, EXx } },
2171  },
2172  /* PREGRP27 */
2173  {
2174    { "(bad)",  { MX, EXx } },
2175    { "(bad)",  { XM, EXx } },
2176    { "addsubpd", { XM, EXx } },
2177    { "addsubps", { XM, EXx } },
2178  },
2179  /* PREGRP28 */
2180  {
2181    { "(bad)",  { MX, EXx } },
2182    { "(bad)",  { XM, EXx } },
2183    { "haddpd", { XM, EXx } },
2184    { "haddps", { XM, EXx } },
2185  },
2186  /* PREGRP29 */
2187  {
2188    { "(bad)",  { MX, EXx } },
2189    { "(bad)",  { XM, EXx } },
2190    { "hsubpd", { XM, EXx } },
2191    { "hsubps", { XM, EXx } },
2192  },
2193  /* PREGRP30 */
2194  {
2195    { "movlpX", { XM, EXq, { SIMD_Fixup, 'h' } } }, /* really only 2 operands */
2196    { "movsldup", { XM, EXx } },
2197    { "movlpd", { XM, EXq } },
2198    { "movddup", { XM, EXq } },
2199  },
2200  /* PREGRP31 */
2201  {
2202    { "movhpX", { XM, EXq, { SIMD_Fixup, 'l' } } },
2203    { "movshdup", { XM, EXx } },
2204    { "movhpd", { XM, EXq } },
2205    { "(bad)",  { XM, EXq } },
2206  },
2207  /* PREGRP32 */
2208  {
2209    { "(bad)",  { XM, EXx } },
2210    { "(bad)",  { XM, EXx } },
2211    { "(bad)",  { XM, EXx } },
2212    { "lddqu",  { XM, M } },
2213  },
2214  /* PREGRP33 */
2215  {
2216    {"movntps", { Ev, XM } },
2217    {"movntss", { Ev, XM } },
2218    {"movntpd", { Ev, XM } },
2219    {"movntsd", { Ev, XM } },
2220  },
2221
2222  /* PREGRP34 */
2223  {
2224    {"vmread",  { Em, Gm } },
2225    {"(bad)",   { XX } },
2226    {"extrq",   { XS, Ib, Ib } },
2227    {"insertq", { XM, XS, Ib, Ib } },
2228  },
2229
2230 /* PREGRP35 */
2231  {
2232    {"vmwrite", { Gm, Em } },
2233    {"(bad)",   { XX } },
2234    {"extrq",   { XM, XS } },
2235    {"insertq", { XM, XS } },
2236  },
2237
2238  /* PREGRP36 */
2239  {
2240    { "bsrS",   { Gv, Ev } },
2241    { "lzcntS", { Gv, Ev } },
2242    { "bsrS",   { Gv, Ev } },
2243    { "(bad)",  { XX } },
2244  },
2245
2246  /* PREGRP37 */
2247  {
2248    { "(bad)", { XX } },
2249    { "popcntS", { Gv, Ev } },
2250    { "(bad)", { XX } },
2251    { "(bad)", { XX } },
2252  },
2253
2254  /* PREGRP38 */
2255  {
2256    { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
2257    { "pause", { XX } },
2258    { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
2259    { "(bad)", { XX } },
2260  },
2261
2262  /* PREGRP39 */
2263  {
2264    { "(bad)",  { XX } },
2265    { "(bad)",  { XX } },
2266    { "pblendvb", {XM, EXx, XMM0 } },
2267    { "(bad)",  { XX } },
2268  },
2269
2270  /* PREGRP40 */
2271  {
2272    { "(bad)",  { XX } },
2273    { "(bad)",  { XX } },
2274    { "blendvps", {XM, EXx, XMM0 } },
2275    { "(bad)",  { XX } },
2276  },
2277
2278  /* PREGRP41 */
2279  {
2280    { "(bad)",  { XX } },
2281    { "(bad)",  { XX } },
2282    { "blendvpd", { XM, EXx, XMM0 } },
2283    { "(bad)",  { XX } },
2284  },
2285
2286  /* PREGRP42 */
2287  {
2288    { "(bad)",  { XX } },
2289    { "(bad)",  { XX } },
2290    { "ptest",  { XM, EXx } },
2291    { "(bad)",  { XX } },
2292  },
2293
2294  /* PREGRP43 */
2295  {
2296    { "(bad)",  { XX } },
2297    { "(bad)",  { XX } },
2298    { "pmovsxbw", { XM, EXx } },
2299    { "(bad)",  { XX } },
2300  },
2301
2302  /* PREGRP44 */
2303  {
2304    { "(bad)",  { XX } },
2305    { "(bad)",  { XX } },
2306    { "pmovsxbd", { XM, EXx } },
2307    { "(bad)",  { XX } },
2308  },
2309
2310  /* PREGRP45 */
2311  {
2312    { "(bad)",  { XX } },
2313    { "(bad)",  { XX } },
2314    { "pmovsxbq", { XM, EXx } },
2315    { "(bad)",  { XX } },
2316  },
2317
2318  /* PREGRP46 */
2319  {
2320    { "(bad)",  { XX } },
2321    { "(bad)",  { XX } },
2322    { "pmovsxwd", { XM, EXx } },
2323    { "(bad)",  { XX } },
2324  },
2325
2326  /* PREGRP47 */
2327  {
2328    { "(bad)",  { XX } },
2329    { "(bad)",  { XX } },
2330    { "pmovsxwq", { XM, EXx } },
2331    { "(bad)",  { XX } },
2332  },
2333
2334  /* PREGRP48 */
2335  {
2336    { "(bad)",  { XX } },
2337    { "(bad)",  { XX } },
2338    { "pmovsxdq", { XM, EXx } },
2339    { "(bad)",  { XX } },
2340  },
2341
2342  /* PREGRP49 */
2343  {
2344    { "(bad)",  { XX } },
2345    { "(bad)",  { XX } },
2346    { "pmuldq", { XM, EXx } },
2347    { "(bad)",  { XX } },
2348  },
2349
2350  /* PREGRP50 */
2351  {
2352    { "(bad)",  { XX } },
2353    { "(bad)",  { XX } },
2354    { "pcmpeqq", { XM, EXx } },
2355    { "(bad)",  { XX } },
2356  },
2357
2358  /* PREGRP51 */
2359  {
2360    { "(bad)",  { XX } },
2361    { "(bad)",  { XX } },
2362    { "movntdqa", { XM, EM } },
2363    { "(bad)",  { XX } },
2364  },
2365
2366  /* PREGRP52 */
2367  {
2368    { "(bad)",  { XX } },
2369    { "(bad)",  { XX } },
2370    { "packusdw", { XM, EXx } },
2371    { "(bad)",  { XX } },
2372  },
2373
2374  /* PREGRP53 */
2375  {
2376    { "(bad)",  { XX } },
2377    { "(bad)",  { XX } },
2378    { "pmovzxbw", { XM, EXx } },
2379    { "(bad)",  { XX } },
2380  },
2381
2382  /* PREGRP54 */
2383  {
2384    { "(bad)",  { XX } },
2385    { "(bad)",  { XX } },
2386    { "pmovzxbd", { XM, EXx } },
2387    { "(bad)",  { XX } },
2388  },
2389
2390  /* PREGRP55 */
2391  {
2392    { "(bad)",  { XX } },
2393    { "(bad)",  { XX } },
2394    { "pmovzxbq", { XM, EXx } },
2395    { "(bad)",  { XX } },
2396  },
2397
2398  /* PREGRP56 */
2399  {
2400    { "(bad)",  { XX } },
2401    { "(bad)",  { XX } },
2402    { "pmovzxwd", { XM, EXx } },
2403    { "(bad)",  { XX } },
2404  },
2405
2406  /* PREGRP57 */
2407  {
2408    { "(bad)",  { XX } },
2409    { "(bad)",  { XX } },
2410    { "pmovzxwq", { XM, EXx } },
2411    { "(bad)",  { XX } },
2412  },
2413
2414  /* PREGRP58 */
2415  {
2416    { "(bad)",  { XX } },
2417    { "(bad)",  { XX } },
2418    { "pmovzxdq", { XM, EXx } },
2419    { "(bad)",  { XX } },
2420  },
2421
2422  /* PREGRP59 */
2423  {
2424    { "(bad)",  { XX } },
2425    { "(bad)",  { XX } },
2426    { "pminsb", { XM, EXx } },
2427    { "(bad)",  { XX } },
2428  },
2429
2430  /* PREGRP60 */
2431  {
2432    { "(bad)",  { XX } },
2433    { "(bad)",  { XX } },
2434    { "pminsd", { XM, EXx } },
2435    { "(bad)",  { XX } },
2436  },
2437
2438  /* PREGRP61 */
2439  {
2440    { "(bad)",  { XX } },
2441    { "(bad)",  { XX } },
2442    { "pminuw", { XM, EXx } },
2443    { "(bad)",  { XX } },
2444  },
2445
2446  /* PREGRP62 */
2447  {
2448    { "(bad)",  { XX } },
2449    { "(bad)",  { XX } },
2450    { "pminud", { XM, EXx } },
2451    { "(bad)",  { XX } },
2452  },
2453
2454  /* PREGRP63 */
2455  {
2456    { "(bad)",  { XX } },
2457    { "(bad)",  { XX } },
2458    { "pmaxsb", { XM, EXx } },
2459    { "(bad)",  { XX } },
2460  },
2461
2462  /* PREGRP64 */
2463  {
2464    { "(bad)",  { XX } },
2465    { "(bad)",  { XX } },
2466    { "pmaxsd", { XM, EXx } },
2467    { "(bad)",  { XX } },
2468  },
2469
2470  /* PREGRP65 */
2471  {
2472    { "(bad)",  { XX } },
2473    { "(bad)",  { XX } },
2474    { "pmaxuw", { XM, EXx } },
2475    { "(bad)",  { XX } },
2476  },
2477
2478  /* PREGRP66 */
2479  {
2480    { "(bad)",  { XX } },
2481    { "(bad)",  { XX } },
2482    { "pmaxud", { XM, EXx } },
2483    { "(bad)",  { XX } },
2484  },
2485
2486  /* PREGRP67 */
2487  {
2488    { "(bad)",  { XX } },
2489    { "(bad)",  { XX } },
2490    { "pmulld", { XM, EXx } },
2491    { "(bad)",  { XX } },
2492  },
2493
2494  /* PREGRP68 */
2495  {
2496    { "(bad)",  { XX } },
2497    { "(bad)",  { XX } },
2498    { "phminposuw", { XM, EXx } },
2499    { "(bad)",  { XX } },
2500  },
2501
2502  /* PREGRP69 */
2503  {
2504    { "(bad)",  { XX } },
2505    { "(bad)",  { XX } },
2506    { "roundps", { XM, EXx, Ib } },
2507    { "(bad)",  { XX } },
2508  },
2509
2510  /* PREGRP70 */
2511  {
2512    { "(bad)",  { XX } },
2513    { "(bad)",  { XX } },
2514    { "roundpd", { XM, EXx, Ib } },
2515    { "(bad)",  { XX } },
2516  },
2517
2518  /* PREGRP71 */
2519  {
2520    { "(bad)",  { XX } },
2521    { "(bad)",  { XX } },
2522    { "roundss", { XM, EXx, Ib } },
2523    { "(bad)",  { XX } },
2524  },
2525
2526  /* PREGRP72 */
2527  {
2528    { "(bad)",  { XX } },
2529    { "(bad)",  { XX } },
2530    { "roundsd", { XM, EXx, Ib } },
2531    { "(bad)",  { XX } },
2532  },
2533
2534  /* PREGRP73 */
2535  {
2536    { "(bad)",  { XX } },
2537    { "(bad)",  { XX } },
2538    { "blendps", { XM, EXx, Ib } },
2539    { "(bad)",  { XX } },
2540  },
2541
2542  /* PREGRP74 */
2543  {
2544    { "(bad)",  { XX } },
2545    { "(bad)",  { XX } },
2546    { "blendpd", { XM, EXx, Ib } },
2547    { "(bad)",  { XX } },
2548  },
2549
2550  /* PREGRP75 */
2551  {
2552    { "(bad)",  { XX } },
2553    { "(bad)",  { XX } },
2554    { "pblendw", { XM, EXx, Ib } },
2555    { "(bad)",  { XX } },
2556  },
2557
2558  /* PREGRP76 */
2559  {
2560    { "(bad)",  { XX } },
2561    { "(bad)",  { XX } },
2562    { "pextrb", { Edqb, XM, Ib } },
2563    { "(bad)",  { XX } },
2564  },
2565
2566  /* PREGRP77 */
2567  {
2568    { "(bad)",  { XX } },
2569    { "(bad)",  { XX } },
2570    { "pextrw", { Edqw, XM, Ib } },
2571    { "(bad)",  { XX } },
2572  },
2573
2574  /* PREGRP78 */
2575  {
2576    { "(bad)",  { XX } },
2577    { "(bad)",  { XX } },
2578    { "pextrK", { Edq, XM, Ib } },
2579    { "(bad)",  { XX } },
2580  },
2581
2582  /* PREGRP79 */
2583  {
2584    { "(bad)",  { XX } },
2585    { "(bad)",  { XX } },
2586    { "extractps", { Edqd, XM, Ib } },
2587    { "(bad)",  { XX } },
2588  },
2589
2590  /* PREGRP80 */
2591  {
2592    { "(bad)",  { XX } },
2593    { "(bad)",  { XX } },
2594    { "pinsrb", { XM, Edqb, Ib } },
2595    { "(bad)",  { XX } },
2596  },
2597
2598  /* PREGRP81 */
2599  {
2600    { "(bad)",  { XX } },
2601    { "(bad)",  { XX } },
2602    { "insertps", { XM, EXx, Ib } },
2603    { "(bad)",  { XX } },
2604  },
2605
2606  /* PREGRP82 */
2607  {
2608    { "(bad)",  { XX } },
2609    { "(bad)",  { XX } },
2610    { "pinsrK", { XM, Edq, Ib } },
2611    { "(bad)",  { XX } },
2612  },
2613
2614  /* PREGRP83 */
2615  {
2616    { "(bad)",  { XX } },
2617    { "(bad)",  { XX } },
2618    { "dpps",   { XM, EXx, Ib } },
2619    { "(bad)",  { XX } },
2620  },
2621
2622  /* PREGRP84 */
2623  {
2624    { "(bad)",  { XX } },
2625    { "(bad)",  { XX } },
2626    { "dppd",   { XM, EXx, Ib } },
2627    { "(bad)",  { XX } },
2628  },
2629
2630  /* PREGRP85 */
2631  {
2632    { "(bad)",  { XX } },
2633    { "(bad)",  { XX } },
2634    { "mpsadbw", { XM, EXx, Ib } },
2635    { "(bad)",  { XX } },
2636  },
2637
2638  /* PREGRP86 */
2639  {
2640    { "(bad)",  { XX } },
2641    { "(bad)",  { XX } },
2642    { "pcmpgtq", { XM, EXx } },
2643    { "(bad)",  { XX } },
2644  },
2645
2646  /* PREGRP87 */
2647  {
2648    { "movbe",  { Gv, Ev } },
2649    { "(bad)",  { XX } },
2650    { "movbe",  { Gv, Ev } },
2651    { "crc32",  { Gdq, { CRC32_Fixup, b_mode } } },
2652  },
2653
2654  /* PREGRP88 */
2655  {
2656    { "movbe",  { Ev, Gv } },
2657    { "(bad)",  { XX } },
2658    { "movbe",  { Ev, Gv } },
2659    { "crc32",  { Gdq, { CRC32_Fixup, v_mode } } },
2660  },
2661
2662  /* PREGRP89 */
2663  {
2664    { "(bad)",  { XX } },
2665    { "(bad)",  { XX } },
2666    { "pcmpestrm", { XM, EXx, Ib } },
2667    { "(bad)",  { XX } },
2668  },
2669
2670  /* PREGRP90 */
2671  {
2672    { "(bad)",  { XX } },
2673    { "(bad)",  { XX } },
2674    { "pcmpestri", { XM, EXx, Ib } },
2675    { "(bad)",  { XX } },
2676  },
2677
2678  /* PREGRP91 */
2679  {
2680    { "(bad)",  { XX } },
2681    { "(bad)",  { XX } },
2682    { "pcmpistrm", { XM, EXx, Ib } },
2683    { "(bad)",  { XX } },
2684  },
2685
2686  /* PREGRP92 */
2687  {
2688    { "(bad)",  { XX } },
2689    { "(bad)",  { XX } },
2690    { "pcmpistri", { XM, EXx, Ib } },
2691    { "(bad)",  { XX } },
2692  },
2693
2694  /* PREGRP93 */
2695  {
2696    { "ucomiss",{ XM, EXd } },
2697    { "(bad)",  { XX } },
2698    { "ucomisd",{ XM, EXq } },
2699    { "(bad)",  { XX } },
2700  },
2701
2702  /* PREGRP94 */
2703  {
2704    { "comiss", { XM, EXd } },
2705    { "(bad)",  { XX } },
2706    { "comisd", { XM, EXq } },
2707    { "(bad)",  { XX } },
2708  },
2709
2710  /* PREGRP95 */
2711  {
2712    { "punpcklbw",{ MX, EMd } },
2713    { "(bad)",  { XX } },
2714    { "punpcklbw",{ MX, EMq } },
2715    { "(bad)",  { XX } },
2716  },
2717
2718  /* PREGRP96 */
2719  {
2720    { "punpcklwd",{ MX, EMd } },
2721    { "(bad)",  { XX } },
2722    { "punpcklwd",{ MX, EMq } },
2723    { "(bad)",  { XX } },
2724  },
2725
2726  /* PREGRP97 */
2727  {
2728    { "punpckldq",{ MX, EMd } },
2729    { "(bad)",  { XX } },
2730    { "punpckldq",{ MX, EMq } },
2731    { "(bad)",  { XX } },
2732  },
2733
2734  /* PREGRP98 */
2735  {
2736    { "(bad)",  { XX } },
2737    { "(bad)",  { XX } },
2738    { "pclmulqdq", { XM, EXx, Ib } },
2739    { "(bad)",  { XX } },
2740  },
2741
2742  /* PREGRP99 */
2743  {
2744    { "(bad)",  { XX } },
2745    { "(bad)",  { XX } },
2746    { "aesimc", { XM, EXx } },
2747    { "(bad)",  { XX } },
2748  },
2749
2750  /* PREGRP100 */
2751  {
2752    { "(bad)",  { XX } },
2753    { "(bad)",  { XX } },
2754    { "aesenc", { XM, EXx } },
2755    { "(bad)",  { XX } },
2756  },
2757
2758  /* PREGRP101 */
2759  {
2760    { "(bad)",  { XX } },
2761    { "(bad)",  { XX } },
2762    { "aesenclast", { XM, EXx } },
2763    { "(bad)",  { XX } },
2764  },
2765
2766  /* PREGRP102 */
2767  {
2768    { "(bad)",  { XX } },
2769    { "(bad)",  { XX } },
2770    { "aesdec", { XM, EXx } },
2771    { "(bad)",  { XX } },
2772  },
2773
2774  /* PREGRP103 */
2775  {
2776    { "(bad)",  { XX } },
2777    { "(bad)",  { XX } },
2778    { "aesdeclast", { XM, EXx } },
2779    { "(bad)",  { XX } },
2780  },
2781
2782  /* PREGRP104 */
2783  {
2784    { "(bad)",  { XX } },
2785    { "(bad)",  { XX } },
2786    { "aeskeygenassist", { XM, EXx, Ib } },
2787    { "(bad)",  { XX } },
2788  },
2789
2790  /* PREGRP105 */
2791  {
2792    { "andnS",  { Gv, Bv, Ev } },
2793    { "(bad)",  { XX } },
2794    { "(bad)",  { XX } },
2795    { "(bad)",  { XX } },
2796  },
2797
2798  /* PREGRP106 */
2799  {
2800    { "bextrS", { Gv, Ev, Bv } },
2801    { "sarxS",  { Gv, Ev, Bv } },
2802    { "shlxS",  { Gv, Ev, Bv } },
2803    { "shrxS",  { Gv, Ev, Bv } },
2804  },
2805
2806  /* PREGRP107 */
2807  {
2808    { "bsfS",   { Gv, Ev } },
2809    { "tzcntS", { Gv, Ev } },
2810    { "bsfS",   { Gv, Ev } },
2811    { "(bad)",  { XX } },
2812  },
2813
2814  /* PREGRP108 */
2815  {
2816    { "bzhi",   { Gv, Ev, Bv } },
2817    { "pext",   { Gv, Bv, Ev } },
2818    { "(bad)",  { XX } },
2819    { "pdep",   { Gv, Bv, Ev } },
2820  },
2821
2822  /* PREGRP109 */
2823  {
2824    { "(bad)",  { XX } },
2825    { "(bad)",  { XX } },
2826    { "(bad)",  { XX } },
2827    { "rorx",   { Gv, Ev, Ib } },
2828  },
2829};
2830
2831static const struct dis386 x86_64_table[][2] = {
2832  {
2833    { "pusha{P|}", { XX } },
2834    { "(bad)", { XX } },
2835  },
2836  {
2837    { "popa{P|}", { XX } },
2838    { "(bad)", { XX } },
2839  },
2840  {
2841    { "bound{S|}", { Gv, Ma } },
2842    { "(bad)", { XX } },
2843  },
2844  {
2845    { "arpl", { Ew, Gw } },
2846    { "movs{||lq|xd}", { Gv, Ed } },
2847  },
2848};
2849
2850static const struct dis386 three_byte_table[][256] = {
2851  /* THREE_BYTE_0 */
2852  {
2853    /* 00 */
2854    { "pshufb", { MX, EM } },
2855    { "phaddw", { MX, EM } },
2856    { "phaddd", { MX, EM } },
2857    { "phaddsw", { MX, EM } },
2858    { "pmaddubsw", { MX, EM } },
2859    { "phsubw", { MX, EM } },
2860    { "phsubd", { MX, EM } },
2861    { "phsubsw", { MX, EM } },
2862    /* 08 */
2863    { "psignb", { MX, EM } },
2864    { "psignw", { MX, EM } },
2865    { "psignd", { MX, EM } },
2866    { "pmulhrsw", { MX, EM } },
2867    { "(bad)", { XX } },
2868    { "(bad)", { XX } },
2869    { "(bad)", { XX } },
2870    { "(bad)", { XX } },
2871    /* 10 */
2872    { PREGRP39 },
2873    { "(bad)", { XX } },
2874    { "(bad)", { XX } },
2875    { "(bad)", { XX } },
2876    { PREGRP40 },
2877    { PREGRP41 },
2878    { "(bad)", { XX } },
2879    { PREGRP42 },
2880    /* 18 */
2881    { "(bad)", { XX } },
2882    { "(bad)", { XX } },
2883    { "(bad)", { XX } },
2884    { "(bad)", { XX } },
2885    { "pabsb", { MX, EM } },
2886    { "pabsw", { MX, EM } },
2887    { "pabsd", { MX, EM } },
2888    { "(bad)", { XX } },
2889    /* 20 */
2890    { PREGRP43 },
2891    { PREGRP44 },
2892    { PREGRP45 },
2893    { PREGRP46 },
2894    { PREGRP47 },
2895    { PREGRP48 },
2896    { "(bad)", { XX } },
2897    { "(bad)", { XX } },
2898    /* 28 */
2899    { PREGRP49 },
2900    { PREGRP50 },
2901    { PREGRP51 },
2902    { PREGRP52 },
2903    { "(bad)", { XX } },
2904    { "(bad)", { XX } },
2905    { "(bad)", { XX } },
2906    { "(bad)", { XX } },
2907    /* 30 */
2908    { PREGRP53 },
2909    { PREGRP54 },
2910    { PREGRP55 },
2911    { PREGRP56 },
2912    { PREGRP57 },
2913    { PREGRP58 },
2914    { "(bad)", { XX } },
2915    { PREGRP86 },
2916    /* 38 */
2917    { PREGRP59 },
2918    { PREGRP60 },
2919    { PREGRP61 },
2920    { PREGRP62 },
2921    { PREGRP63 },
2922    { PREGRP64 },
2923    { PREGRP65 },
2924    { PREGRP66 },
2925    /* 40 */
2926    { PREGRP67 },
2927    { PREGRP68 },
2928    { "(bad)", { XX } },
2929    { "(bad)", { XX } },
2930    { "(bad)", { XX } },
2931    { "(bad)", { XX } },
2932    { "(bad)", { XX } },
2933    { "(bad)", { XX } },
2934    /* 48 */
2935    { "(bad)", { XX } },
2936    { "(bad)", { XX } },
2937    { "(bad)", { XX } },
2938    { "(bad)", { XX } },
2939    { "(bad)", { XX } },
2940    { "(bad)", { XX } },
2941    { "(bad)", { XX } },
2942    { "(bad)", { XX } },
2943    /* 50 */
2944    { "(bad)", { XX } },
2945    { "(bad)", { XX } },
2946    { "(bad)", { XX } },
2947    { "(bad)", { XX } },
2948    { "(bad)", { XX } },
2949    { "(bad)", { XX } },
2950    { "(bad)", { XX } },
2951    { "(bad)", { XX } },
2952    /* 58 */
2953    { "(bad)", { XX } },
2954    { "(bad)", { XX } },
2955    { "(bad)", { XX } },
2956    { "(bad)", { XX } },
2957    { "(bad)", { XX } },
2958    { "(bad)", { XX } },
2959    { "(bad)", { XX } },
2960    { "(bad)", { XX } },
2961    /* 60 */
2962    { "(bad)", { XX } },
2963    { "(bad)", { XX } },
2964    { "(bad)", { XX } },
2965    { "(bad)", { XX } },
2966    { "(bad)", { XX } },
2967    { "(bad)", { XX } },
2968    { "(bad)", { XX } },
2969    { "(bad)", { XX } },
2970    /* 68 */
2971    { "(bad)", { XX } },
2972    { "(bad)", { XX } },
2973    { "(bad)", { XX } },
2974    { "(bad)", { XX } },
2975    { "(bad)", { XX } },
2976    { "(bad)", { XX } },
2977    { "(bad)", { XX } },
2978    { "(bad)", { XX } },
2979    /* 70 */
2980    { "(bad)", { XX } },
2981    { "(bad)", { XX } },
2982    { "(bad)", { XX } },
2983    { "(bad)", { XX } },
2984    { "(bad)", { XX } },
2985    { "(bad)", { XX } },
2986    { "(bad)", { XX } },
2987    { "(bad)", { XX } },
2988    /* 78 */
2989    { "(bad)", { XX } },
2990    { "(bad)", { XX } },
2991    { "(bad)", { XX } },
2992    { "(bad)", { XX } },
2993    { "(bad)", { XX } },
2994    { "(bad)", { XX } },
2995    { "(bad)", { XX } },
2996    { "(bad)", { XX } },
2997    /* 80 */
2998    { "(bad)", { XX } },
2999    { "(bad)", { XX } },
3000    { "(bad)", { XX } },

3001    { "(bad)", { XX } },
3002    { "(bad)", { XX } },
3003    { "(bad)", { XX } },
3004    { "(bad)", { XX } },
3005    { "(bad)", { XX } },
3006    /* 88 */
3007    { "(bad)", { XX } },
3008    { "(bad)", { XX } },
3009    { "(bad)", { XX } },
3010    { "(bad)", { XX } },
3011    { "(bad)", { XX } },
3012    { "(bad)", { XX } },
3013    { "(bad)", { XX } },
3014    { "(bad)", { XX } },
3015    /* 90 */
3016    { "(bad)", { XX } },
3017    { "(bad)", { XX } },
3018    { "(bad)", { XX } },
3019    { "(bad)", { XX } },
3020    { "(bad)", { XX } },
3021    { "(bad)", { XX } },
3022    { "(bad)", { XX } },
3023    { "(bad)", { XX } },
3024    /* 98 */
3025    { "(bad)", { XX } },
3026    { "(bad)", { XX } },
3027    { "(bad)", { XX } },
3028    { "(bad)", { XX } },
3029    { "(bad)", { XX } },
3030    { "(bad)", { XX } },
3031    { "(bad)", { XX } },
3032    { "(bad)", { XX } },
3033    /* a0 */
3034    { "(bad)", { XX } },
3035    { "(bad)", { XX } },
3036    { "(bad)", { XX } },
3037    { "(bad)", { XX } },
3038    { "(bad)", { XX } },
3039    { "(bad)", { XX } },
3040    { "(bad)", { XX } },
3041    { "(bad)", { XX } },
3042    /* a8 */
3043    { "(bad)", { XX } },
3044    { "(bad)", { XX } },
3045    { "(bad)", { XX } },
3046    { "(bad)", { XX } },
3047    { "(bad)", { XX } },
3048    { "(bad)", { XX } },
3049    { "(bad)", { XX } },
3050    { "(bad)", { XX } },
3051    /* b0 */
3052    { "(bad)", { XX } },
3053    { "(bad)", { XX } },
3054    { "(bad)", { XX } },
3055    { "(bad)", { XX } },
3056    { "(bad)", { XX } },
3057    { "(bad)", { XX } },
3058    { "(bad)", { XX } },
3059    { "(bad)", { XX } },
3060    /* b8 */
3061    { "(bad)", { XX } },
3062    { "(bad)", { XX } },
3063    { "(bad)", { XX } },
3064    { "(bad)", { XX } },
3065    { "(bad)", { XX } },
3066    { "(bad)", { XX } },
3067    { "(bad)", { XX } },
3068    { "(bad)", { XX } },
3069    /* c0 */
3070    { "(bad)", { XX } },
3071    { "(bad)", { XX } },
3072    { "(bad)", { XX } },
3073    { "(bad)", { XX } },
3074    { "(bad)", { XX } },
3075    { "(bad)", { XX } },
3076    { "(bad)", { XX } },
3077    { "(bad)", { XX } },
3078    /* c8 */
3079    { "(bad)", { XX } },
3080    { "(bad)", { XX } },
3081    { "(bad)", { XX } },
3082    { "(bad)", { XX } },
3083    { "(bad)", { XX } },
3084    { "(bad)", { XX } },
3085    { "(bad)", { XX } },
3086    { "(bad)", { XX } },
3087    /* d0 */
3088    { "(bad)", { XX } },
3089    { "(bad)", { XX } },
3090    { "(bad)", { XX } },
3091    { "(bad)", { XX } },
3092    { "(bad)", { XX } },
3093    { "(bad)", { XX } },
3094    { "(bad)", { XX } },
3095    { "(bad)", { XX } },
3096    /* d8 */
3097    { "(bad)", { XX } },
3098    { "(bad)", { XX } },
3099    { "(bad)", { XX } },
3100    { PREGRP99 },
3101    { PREGRP100 },
3102    { PREGRP101 },
3103    { PREGRP102 },
3104    { PREGRP103 },
3105    /* e0 */
3106    { "(bad)", { XX } },
3107    { "(bad)", { XX } },
3108    { "(bad)", { XX } },
3109    { "(bad)", { XX } },
3110    { "(bad)", { XX } },
3111    { "(bad)", { XX } },
3112    { "(bad)", { XX } },
3113    { "(bad)", { XX } },
3114    /* e8 */
3115    { "(bad)", { XX } },
3116    { "(bad)", { XX } },
3117    { "(bad)", { XX } },
3118    { "(bad)", { XX } },
3119    { "(bad)", { XX } },
3120    { "(bad)", { XX } },
3121    { "(bad)", { XX } },
3122    { "(bad)", { XX } },
3123    /* f0 */
3124    { PREGRP87 },
3125    { PREGRP88 },
3126    { PREGRP105 },
3127    { "(bad)", { XX } },
3128    { "(bad)", { XX } },
3129    { PREGRP108 },
3130    { "(bad)", { XX } },
3131    { PREGRP106 },
3132    /* f8 */
3133    { "(bad)", { XX } },
3134    { "(bad)", { XX } },
3135    { "(bad)", { XX } },
3136    { "(bad)", { XX } },
3137    { "(bad)", { XX } },
3138    { "(bad)", { XX } },
3139    { "(bad)", { XX } },
3140    { "(bad)", { XX } },
3141  },
3142  /* THREE_BYTE_1 */
3143  {
3144    /* 00 */
3145    { "(bad)", { XX } },
3146    { "(bad)", { XX } },
3147    { "(bad)", { XX } },
3148    { "(bad)", { XX } },
3149    { "(bad)", { XX } },
3150    { "(bad)", { XX } },
3151    { "(bad)", { XX } },
3152    { "(bad)", { XX } },
3153    /* 08 */
3154    { PREGRP69 },
3155    { PREGRP70 },
3156    { PREGRP71 },
3157    { PREGRP72 },
3158    { PREGRP73 },
3159    { PREGRP74 },
3160    { PREGRP75 },
3161    { "palignr", { MX, EM, Ib } },
3162    /* 10 */
3163    { "(bad)", { XX } },
3164    { "(bad)", { XX } },
3165    { "(bad)", { XX } },
3166    { "(bad)", { XX } },
3167    { PREGRP76 },
3168    { PREGRP77 },
3169    { PREGRP78 },
3170    { PREGRP79 },
3171    /* 18 */
3172    { "(bad)", { XX } },
3173    { "(bad)", { XX } },
3174    { "(bad)", { XX } },
3175    { "(bad)", { XX } },
3176    { "(bad)", { XX } },
3177    { "(bad)", { XX } },
3178    { "(bad)", { XX } },
3179    { "(bad)", { XX } },
3180    /* 20 */
3181    { PREGRP80 },
3182    { PREGRP81 },
3183    { PREGRP82 },
3184    { "(bad)", { XX } },
3185    { "(bad)", { XX } },
3186    { "(bad)", { XX } },
3187    { "(bad)", { XX } },
3188    { "(bad)", { XX } },
3189    /* 28 */
3190    { "(bad)", { XX } },
3191    { "(bad)", { XX } },
3192    { "(bad)", { XX } },
3193    { "(bad)", { XX } },
3194    { "(bad)", { XX } },
3195    { "(bad)", { XX } },
3196    { "(bad)", { XX } },
3197    { "(bad)", { XX } },
3198    /* 30 */
3199    { "(bad)", { XX } },
3200    { "(bad)", { XX } },
3201    { "(bad)", { XX } },
3202    { "(bad)", { XX } },
3203    { "(bad)", { XX } },
3204    { "(bad)", { XX } },
3205    { "(bad)", { XX } },
3206    { "(bad)", { XX } },
3207    /* 38 */
3208    { "(bad)", { XX } },
3209    { "(bad)", { XX } },
3210    { "(bad)", { XX } },
3211    { "(bad)", { XX } },
3212    { "(bad)", { XX } },
3213    { "(bad)", { XX } },
3214    { "(bad)", { XX } },
3215    { "(bad)", { XX } },
3216    /* 40 */
3217    { PREGRP83 },
3218    { PREGRP84 },
3219    { PREGRP85 },
3220    { "(bad)", { XX } },
3221    { PREGRP98 },
3222    { "(bad)", { XX } },
3223    { "(bad)", { XX } },
3224    { "(bad)", { XX } },
3225    /* 48 */
3226    { "(bad)", { XX } },
3227    { "(bad)", { XX } },
3228    { "(bad)", { XX } },
3229    { "(bad)", { XX } },
3230    { "(bad)", { XX } },
3231    { "(bad)", { XX } },
3232    { "(bad)", { XX } },
3233    { "(bad)", { XX } },
3234    /* 50 */
3235    { "(bad)", { XX } },
3236    { "(bad)", { XX } },
3237    { "(bad)", { XX } },
3238    { "(bad)", { XX } },
3239    { "(bad)", { XX } },
3240    { "(bad)", { XX } },
3241    { "(bad)", { XX } },
3242    { "(bad)", { XX } },
3243    /* 58 */
3244    { "(bad)", { XX } },
3245    { "(bad)", { XX } },
3246    { "(bad)", { XX } },
3247    { "(bad)", { XX } },
3248    { "(bad)", { XX } },
3249    { "(bad)", { XX } },
3250    { "(bad)", { XX } },
3251    { "(bad)", { XX } },
3252    /* 60 */
3253    { PREGRP89 },
3254    { PREGRP90 },
3255    { PREGRP91 },
3256    { PREGRP92 },
3257    { "(bad)", { XX } },
3258    { "(bad)", { XX } },
3259    { "(bad)", { XX } },
3260    { "(bad)", { XX } },
3261    /* 68 */
3262    { "(bad)", { XX } },
3263    { "(bad)", { XX } },
3264    { "(bad)", { XX } },
3265    { "(bad)", { XX } },
3266    { "(bad)", { XX } },
3267    { "(bad)", { XX } },
3268    { "(bad)", { XX } },
3269    { "(bad)", { XX } },
3270    /* 70 */
3271    { "(bad)", { XX } },
3272    { "(bad)", { XX } },
3273    { "(bad)", { XX } },
3274    { "(bad)", { XX } },
3275    { "(bad)", { XX } },
3276    { "(bad)", { XX } },
3277    { "(bad)", { XX } },
3278    { "(bad)", { XX } },
3279    /* 78 */
3280    { "(bad)", { XX } },
3281    { "(bad)", { XX } },
3282    { "(bad)", { XX } },
3283    { "(bad)", { XX } },
3284    { "(bad)", { XX } },
3285    { "(bad)", { XX } },
3286    { "(bad)", { XX } },
3287    { "(bad)", { XX } },
3288    /* 80 */
3289    { "(bad)", { XX } },
3290    { "(bad)", { XX } },
3291    { "(bad)", { XX } },
3292    { "(bad)", { XX } },
3293    { "(bad)", { XX } },
3294    { "(bad)", { XX } },
3295    { "(bad)", { XX } },
3296    { "(bad)", { XX } },
3297    /* 88 */
3298    { "(bad)", { XX } },
3299    { "(bad)", { XX } },
3300    { "(bad)", { XX } },
3301    { "(bad)", { XX } },
3302    { "(bad)", { XX } },
3303    { "(bad)", { XX } },
3304    { "(bad)", { XX } },
3305    { "(bad)", { XX } },
3306    /* 90 */
3307    { "(bad)", { XX } },
3308    { "(bad)", { XX } },
3309    { "(bad)", { XX } },
3310    { "(bad)", { XX } },
3311    { "(bad)", { XX } },
3312    { "(bad)", { XX } },
3313    { "(bad)", { XX } },
3314    { "(bad)", { XX } },
3315    /* 98 */
3316    { "(bad)", { XX } },
3317    { "(bad)", { XX } },
3318    { "(bad)", { XX } },
3319    { "(bad)", { XX } },
3320    { "(bad)", { XX } },
3321    { "(bad)", { XX } },
3322    { "(bad)", { XX } },
3323    { "(bad)", { XX } },
3324    /* a0 */
3325    { "(bad)", { XX } },
3326    { "(bad)", { XX } },
3327    { "(bad)", { XX } },
3328    { "(bad)", { XX } },
3329    { "(bad)", { XX } },
3330    { "(bad)", { XX } },
3331    { "(bad)", { XX } },
3332    { "(bad)", { XX } },
3333    /* a8 */
3334    { "(bad)", { XX } },
3335    { "(bad)", { XX } },
3336    { "(bad)", { XX } },
3337    { "(bad)", { XX } },
3338    { "(bad)", { XX } },
3339    { "(bad)", { XX } },
3340    { "(bad)", { XX } },
3341    { "(bad)", { XX } },
3342    /* b0 */
3343    { "(bad)", { XX } },
3344    { "(bad)", { XX } },
3345    { "(bad)", { XX } },
3346    { "(bad)", { XX } },
3347    { "(bad)", { XX } },
3348    { "(bad)", { XX } },
3349    { "(bad)", { XX } },
3350    { "(bad)", { XX } },
3351    /* b8 */
3352    { "(bad)", { XX } },
3353    { "(bad)", { XX } },
3354    { "(bad)", { XX } },
3355    { "(bad)", { XX } },
3356    { "(bad)", { XX } },
3357    { "(bad)", { XX } },
3358    { "(bad)", { XX } },
3359    { "(bad)", { XX } },
3360    /* c0 */
3361    { "(bad)", { XX } },
3362    { "(bad)", { XX } },
3363    { "(bad)", { XX } },
3364    { "(bad)", { XX } },
3365    { "(bad)", { XX } },
3366    { "(bad)", { XX } },
3367    { "(bad)", { XX } },
3368    { "(bad)", { XX } },
3369    /* c8 */
3370    { "(bad)", { XX } },
3371    { "(bad)", { XX } },
3372    { "(bad)", { XX } },
3373    { "(bad)", { XX } },
3374    { "(bad)", { XX } },
3375    { "(bad)", { XX } },
3376    { "(bad)", { XX } },
3377    { "(bad)", { XX } },
3378    /* d0 */
3379    { "(bad)", { XX } },
3380    { "(bad)", { XX } },
3381    { "(bad)", { XX } },
3382    { "(bad)", { XX } },
3383    { "(bad)", { XX } },
3384    { "(bad)", { XX } },
3385    { "(bad)", { XX } },
3386    { "(bad)", { XX } },
3387    /* d8 */
3388    { "(bad)", { XX } },
3389    { "(bad)", { XX } },
3390    { "(bad)", { XX } },
3391    { "(bad)", { XX } },
3392    { "(bad)", { XX } },
3393    { "(bad)", { XX } },
3394    { "(bad)", { XX } },
3395    { PREGRP104 },
3396    /* e0 */
3397    { "(bad)", { XX } },
3398    { "(bad)", { XX } },
3399    { "(bad)", { XX } },
3400    { "(bad)", { XX } },
3401    { "(bad)", { XX } },
3402    { "(bad)", { XX } },
3403    { "(bad)", { XX } },
3404    { "(bad)", { XX } },
3405    /* e8 */
3406    { "(bad)", { XX } },
3407    { "(bad)", { XX } },
3408    { "(bad)", { XX } },
3409    { "(bad)", { XX } },
3410    { "(bad)", { XX } },
3411    { "(bad)", { XX } },
3412    { "(bad)", { XX } },
3413    { "(bad)", { XX } },
3414    /* f0 */
3415    { PREGRP109 },
3416    { "(bad)", { XX } },
3417    { "(bad)", { XX } },
3418    { "(bad)", { XX } },
3419    { "(bad)", { XX } },
3420    { "(bad)", { XX } },
3421    { "(bad)", { XX } },
3422    { "(bad)", { XX } },
3423    /* f8 */
3424    { "(bad)", { XX } },
3425    { "(bad)", { XX } },
3426    { "(bad)", { XX } },
3427    { "(bad)", { XX } },
3428    { "(bad)", { XX } },
3429    { "(bad)", { XX } },
3430    { "(bad)", { XX } },
3431    { "(bad)", { XX } },
3432  }
3433};
3434
3435#define INTERNAL_DISASSEMBLER_ERROR "<internal disassembler error>"
3436
3437static void
3438ckprefix (void)
3439{
3440  int newrex;
3441  rex = 0;
3442  prefixes = 0;
3443  used_prefixes = 0;
3444  rex_used = 0;
3445  while (1)
3446    {
3447      fetch_data(the_info, codep + 1);
3448      newrex = 0;
3449      switch (*codep)
3450        {
3451        /* REX prefixes family.  */
3452        case 0x40:
3453        case 0x41:
3454        case 0x42:
3455        case 0x43:
3456        case 0x44:
3457        case 0x45:
3458        case 0x46:
3459        case 0x47:
3460        case 0x48:
3461        case 0x49:
3462        case 0x4a:
3463        case 0x4b:
3464        case 0x4c:
3465        case 0x4d:
3466        case 0x4e:
3467        case 0x4f:
3468            if (address_mode == mode_64bit)
3469              newrex = *codep;
3470            else
3471              return;
3472          break;
3473        case 0xf3:
3474          prefixes |= PREFIX_REPZ;
3475          break;
3476        case 0xf2:
3477          prefixes |= PREFIX_REPNZ;
3478          break;
3479        case 0xf0:
3480          prefixes |= PREFIX_LOCK;
3481          break;
3482        case 0x2e:
3483          prefixes |= PREFIX_CS;
3484          break;
3485        case 0x36:
3486          prefixes |= PREFIX_SS;
3487          break;
3488        case 0x3e:
3489          prefixes |= PREFIX_DS;
3490          break;
3491        case 0x26:
3492          prefixes |= PREFIX_ES;
3493          break;
3494        case 0x64:
3495          prefixes |= PREFIX_FS;
3496          break;
3497        case 0x65:
3498          prefixes |= PREFIX_GS;
3499          break;
3500        case 0x66:
3501          prefixes |= PREFIX_DATA;
3502          break;
3503        case 0x67:
3504          prefixes |= PREFIX_ADDR;
3505          break;
3506        case FWAIT_OPCODE:
3507          /* fwait is really an instruction.  If there are prefixes
3508             before the fwait, they belong to the fwait, *not* to the
3509             following instruction.  */
3510          if (prefixes || rex)
3511            {
3512              prefixes |= PREFIX_FWAIT;
3513              codep++;
3514              return;
3515            }
3516          prefixes = PREFIX_FWAIT;
3517          break;
3518        default:
3519          return;
3520        }
3521      /* Rex is ignored when followed by another prefix.  */
3522      if (rex)
3523        {
3524          rex_used = rex;
3525          return;
3526        }
3527      rex = newrex;
3528      codep++;
3529    }
3530}
3531
3532static void
3533ckvexprefix (void)
3534{
3535    int op, vex2, vex3, newrex = 0, newpfx = prefixes;
3536
3537    if (address_mode == mode_16bit) {
3538        return;
3539    }
3540
3541    fetch_data(the_info, codep + 1);
3542    op = *codep;
3543
3544    if (op != 0xc4 && op != 0xc5) {
3545        return;
3546    }
3547
3548    fetch_data(the_info, codep + 2);
3549    vex2 = codep[1];
3550
3551    if (address_mode == mode_32bit && (vex2 & 0xc0) != 0xc0) {
3552        return;
3553    }
3554
3555    if (op == 0xc4) {
3556        /* Three byte VEX prefix.  */
3557        fetch_data(the_info, codep + 3);
3558        vex3 = codep[2];
3559
3560        newrex |= (vex2 & 0x80 ? 0 : REX_R);
3561        newrex |= (vex2 & 0x40 ? 0 : REX_X);
3562        newrex |= (vex2 & 0x20 ? 0 : REX_B);
3563        newrex |= (vex3 & 0x80 ? REX_W : 0);
3564        switch (vex2 & 0x1f) {      /* VEX.m-mmmm */
3565        case 1:
3566            newpfx |= PREFIX_VEX_0F;
3567            break;
3568        case 2:
3569            newpfx |= PREFIX_VEX_0F | PREFIX_VEX_0F38;
3570            break;
3571        case 3:
3572            newpfx |= PREFIX_VEX_0F | PREFIX_VEX_0F3A;
3573            break;
3574        }
3575        vex2 = vex3;
3576        codep += 3;
3577    } else {
3578        /* Two byte VEX prefix.  */
3579        newrex |= (vex2 & 0x80 ? 0 : REX_R);
3580        newpfx |= PREFIX_VEX_0F;
3581        codep += 2;
3582    }
3583
3584    vex_reg = (~vex2 >> 3) & 15;     /* VEX.vvvv */
3585    switch (vex2 & 3) {              /* VEX.pp */
3586    case 1:
3587        newpfx |= PREFIX_DATA;     /* 0x66 */
3588        break;
3589    case 2:
3590        newpfx |= PREFIX_REPZ;     /* 0xf3 */
3591        break;
3592    case 3:
3593        newpfx |= PREFIX_REPNZ;    /* 0xf2 */
3594        break;
3595    }
3596
3597    rex = newrex;
3598    prefixes = newpfx;
3599}
3600
3601/* Return the name of the prefix byte PREF, or NULL if PREF is not a
3602   prefix byte.  */
3603
3604static const char *
3605prefix_name (int pref, int sizeflag)
3606{
3607  static const char * const rexes [16] =
3608    {
3609      "rex",            /* 0x40 */
3610      "rex.B",          /* 0x41 */
3611      "rex.X",          /* 0x42 */
3612      "rex.XB",         /* 0x43 */
3613      "rex.R",          /* 0x44 */
3614      "rex.RB",         /* 0x45 */
3615      "rex.RX",         /* 0x46 */
3616      "rex.RXB",        /* 0x47 */
3617      "rex.W",          /* 0x48 */
3618      "rex.WB",         /* 0x49 */
3619      "rex.WX",         /* 0x4a */
3620      "rex.WXB",        /* 0x4b */
3621      "rex.WR",         /* 0x4c */
3622      "rex.WRB",        /* 0x4d */
3623      "rex.WRX",        /* 0x4e */
3624      "rex.WRXB",       /* 0x4f */
3625    };
3626
3627  switch (pref)
3628    {
3629    /* REX prefixes family.  */
3630    case 0x40:
3631    case 0x41:
3632    case 0x42:
3633    case 0x43:
3634    case 0x44:
3635    case 0x45:
3636    case 0x46:
3637    case 0x47:
3638    case 0x48:
3639    case 0x49:
3640    case 0x4a:
3641    case 0x4b:
3642    case 0x4c:
3643    case 0x4d:
3644    case 0x4e:
3645    case 0x4f:
3646      return rexes [pref - 0x40];
3647    case 0xf3:
3648      return "repz";
3649    case 0xf2:
3650      return "repnz";
3651    case 0xf0:
3652      return "lock";
3653    case 0x2e:
3654      return "cs";
3655    case 0x36:
3656      return "ss";
3657    case 0x3e:
3658      return "ds";
3659    case 0x26:
3660      return "es";
3661    case 0x64:
3662      return "fs";
3663    case 0x65:
3664      return "gs";
3665    case 0x66:
3666      return (sizeflag & DFLAG) ? "data16" : "data32";
3667    case 0x67:
3668      if (address_mode == mode_64bit)
3669        return (sizeflag & AFLAG) ? "addr32" : "addr64";
3670      else
3671        return (sizeflag & AFLAG) ? "addr16" : "addr32";
3672    case FWAIT_OPCODE:
3673      return "fwait";
3674    default:
3675      return NULL;
3676    }
3677}
3678
3679static char op_out[MAX_OPERANDS][100];
3680static int op_ad, op_index[MAX_OPERANDS];
3681static int two_source_ops;
3682static bfd_vma op_address[MAX_OPERANDS];
3683static bfd_vma op_riprel[MAX_OPERANDS];
3684static bfd_vma start_pc;
3685
3686/*
3687 *   On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3688 *   (see topic "Redundant prefixes" in the "Differences from 8086"
3689 *   section of the "Virtual 8086 Mode" chapter.)
3690 * 'pc' should be the address of this instruction, it will
3691 *   be used to print the target address if this is a relative jump or call
3692 * The function returns the length of this instruction in bytes.
3693 */
3694
3695static char intel_syntax;
3696static char open_char;
3697static char close_char;
3698static char separator_char;
3699static char scale_char;
3700
3701int
3702print_insn_i386 (bfd_vma pc, disassemble_info *info)
3703{
3704  intel_syntax = -1;
3705
3706  return print_insn (pc, info);
3707}
3708
3709static int
3710print_insn (bfd_vma pc, disassemble_info *info)
3711{
3712  const struct dis386 *dp;
3713  int i;
3714  char *op_txt[MAX_OPERANDS];
3715  int needcomma;
3716  unsigned char uses_DATA_prefix, uses_LOCK_prefix;
3717  unsigned char uses_REPNZ_prefix, uses_REPZ_prefix;
3718  int sizeflag;
3719  const char *p;
3720  struct dis_private priv;
3721  unsigned char op;
3722  unsigned char threebyte;
3723
3724  if (info->mach == bfd_mach_x86_64_intel_syntax
3725      || info->mach == bfd_mach_x86_64)
3726    address_mode = mode_64bit;
3727  else
3728    address_mode = mode_32bit;
3729
3730  if (intel_syntax == (char) -1)
3731    intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
3732                    || info->mach == bfd_mach_x86_64_intel_syntax);
3733
3734  if (info->mach == bfd_mach_i386_i386
3735      || info->mach == bfd_mach_x86_64
3736      || info->mach == bfd_mach_i386_i386_intel_syntax
3737      || info->mach == bfd_mach_x86_64_intel_syntax)
3738    priv.orig_sizeflag = AFLAG | DFLAG;
3739  else if (info->mach == bfd_mach_i386_i8086)
3740    priv.orig_sizeflag = 0;
3741  else
3742    abort ();
3743
3744  for (p = info->disassembler_options; p != NULL; )
3745    {
3746      if (strncmp (p, "x86-64", 6) == 0)
3747        {
3748          address_mode = mode_64bit;
3749          priv.orig_sizeflag = AFLAG | DFLAG;
3750        }
3751      else if (strncmp (p, "i386", 4) == 0)
3752        {
3753          address_mode = mode_32bit;
3754          priv.orig_sizeflag = AFLAG | DFLAG;
3755        }
3756      else if (strncmp (p, "i8086", 5) == 0)
3757        {
3758          address_mode = mode_16bit;
3759          priv.orig_sizeflag = 0;
3760        }
3761      else if (strncmp (p, "intel", 5) == 0)
3762        {
3763          intel_syntax = 1;
3764        }
3765      else if (strncmp (p, "att", 3) == 0)
3766        {
3767          intel_syntax = 0;
3768        }
3769      else if (strncmp (p, "addr", 4) == 0)
3770        {
3771          if (address_mode == mode_64bit)
3772            {
3773              if (p[4] == '3' && p[5] == '2')
3774                priv.orig_sizeflag &= ~AFLAG;
3775              else if (p[4] == '6' && p[5] == '4')
3776                priv.orig_sizeflag |= AFLAG;
3777            }
3778          else
3779            {
3780              if (p[4] == '1' && p[5] == '6')
3781                priv.orig_sizeflag &= ~AFLAG;
3782              else if (p[4] == '3' && p[5] == '2')
3783                priv.orig_sizeflag |= AFLAG;
3784            }
3785        }
3786      else if (strncmp (p, "data", 4) == 0)
3787        {
3788          if (p[4] == '1' && p[5] == '6')
3789            priv.orig_sizeflag &= ~DFLAG;
3790          else if (p[4] == '3' && p[5] == '2')
3791            priv.orig_sizeflag |= DFLAG;
3792        }
3793      else if (strncmp (p, "suffix", 6) == 0)
3794        priv.orig_sizeflag |= SUFFIX_ALWAYS;
3795
3796      p = strchr (p, ',');
3797      if (p != NULL)
3798        p++;
3799    }
3800
3801  if (intel_syntax)
3802    {
3803      names64 = intel_names64;
3804      names32 = intel_names32;
3805      names16 = intel_names16;
3806      names8 = intel_names8;
3807      names8rex = intel_names8rex;
3808      names_seg = intel_names_seg;
3809      index16 = intel_index16;
3810      open_char = '[';
3811      close_char = ']';
3812      separator_char = '+';
3813      scale_char = '*';
3814    }
3815  else
3816    {
3817      names64 = att_names64;
3818      names32 = att_names32;
3819      names16 = att_names16;
3820      names8 = att_names8;
3821      names8rex = att_names8rex;
3822      names_seg = att_names_seg;
3823      index16 = att_index16;
3824      open_char = '(';
3825      close_char =  ')';
3826      separator_char = ',';
3827      scale_char = ',';
3828    }
3829
3830  /* The output looks better if we put 7 bytes on a line, since that
3831     puts most long word instructions on a single line.  */
3832  info->bytes_per_line = 7;
3833
3834  info->private_data = &priv;
3835  priv.max_fetched = priv.the_buffer;
3836  priv.insn_start = pc;
3837
3838  obuf[0] = 0;
3839  for (i = 0; i < MAX_OPERANDS; ++i)
3840    {
3841      op_out[i][0] = 0;
3842      op_index[i] = -1;
3843    }
3844
3845  the_info = info;
3846  start_pc = pc;
3847  start_codep = priv.the_buffer;
3848  codep = priv.the_buffer;
3849
3850  if (sigsetjmp(priv.bailout, 0) != 0)
3851    {
3852      const char *name;
3853
3854      /* Getting here means we tried for data but didn't get it.  That
3855         means we have an incomplete instruction of some sort.  Just
3856         print the first byte as a prefix or a .byte pseudo-op.  */
3857      if (codep > priv.the_buffer)
3858        {
3859          name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3860          if (name != NULL)
3861            (*info->fprintf_func) (info->stream, "%s", name);
3862          else
3863            {
3864              /* Just print the first byte as a .byte instruction.  */
3865              (*info->fprintf_func) (info->stream, ".byte 0x%x",
3866                                     (unsigned int) priv.the_buffer[0]);
3867            }
3868
3869          return 1;
3870        }
3871
3872      return -1;
3873    }
3874
3875  obufp = obuf;
3876  ckprefix ();
3877  ckvexprefix ();
3878
3879  insn_codep = codep;
3880  sizeflag = priv.orig_sizeflag;
3881
3882  fetch_data(info, codep + 1);
3883  two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3884
3885  if (((prefixes & PREFIX_FWAIT)
3886       && ((*codep < 0xd8) || (*codep > 0xdf)))
3887      || (rex && rex_used))
3888    {
3889      const char *name;
3890
3891      /* fwait not followed by floating point instruction, or rex followed
3892         by other prefixes.  Print the first prefix.  */
3893      name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3894      if (name == NULL)
3895        name = INTERNAL_DISASSEMBLER_ERROR;
3896      (*info->fprintf_func) (info->stream, "%s", name);
3897      return 1;
3898    }
3899
3900  op = 0;
3901  if (prefixes & PREFIX_VEX_0F)
3902    {
3903      used_prefixes |= PREFIX_VEX_0F | PREFIX_VEX_0F38 | PREFIX_VEX_0F3A;
3904      if (prefixes & PREFIX_VEX_0F38)
3905        threebyte = 0x38;
3906      else if (prefixes & PREFIX_VEX_0F3A)
3907        threebyte = 0x3a;
3908      else
3909        threebyte = *codep++;
3910      goto vex_opcode;
3911    }
3912  if (*codep == 0x0f)
3913    {
3914      fetch_data(info, codep + 2);
3915      threebyte = codep[1];
3916      codep += 2;
3917    vex_opcode:
3918      dp = &dis386_twobyte[threebyte];
3919      need_modrm = twobyte_has_modrm[threebyte];
3920      uses_DATA_prefix = twobyte_uses_DATA_prefix[threebyte];
3921      uses_REPNZ_prefix = twobyte_uses_REPNZ_prefix[threebyte];
3922      uses_REPZ_prefix = twobyte_uses_REPZ_prefix[threebyte];
3923      uses_LOCK_prefix = (threebyte & ~0x02) == 0x20;
3924      if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
3925        {
3926          fetch_data(info, codep + 2);
3927          op = *codep++;
3928          switch (threebyte)
3929            {
3930            case 0x38:
3931              uses_DATA_prefix = threebyte_0x38_uses_DATA_prefix[op];
3932              uses_REPNZ_prefix = threebyte_0x38_uses_REPNZ_prefix[op];
3933              uses_REPZ_prefix = threebyte_0x38_uses_REPZ_prefix[op];
3934              break;
3935            case 0x3a:
3936              uses_DATA_prefix = threebyte_0x3a_uses_DATA_prefix[op];
3937              uses_REPNZ_prefix = threebyte_0x3a_uses_REPNZ_prefix[op];
3938              uses_REPZ_prefix = threebyte_0x3a_uses_REPZ_prefix[op];
3939              break;
3940            default:
3941              break;
3942            }
3943        }
3944    }
3945  else
3946    {
3947      dp = &dis386[*codep];
3948      need_modrm = onebyte_has_modrm[*codep];
3949      uses_DATA_prefix = 0;
3950      uses_REPNZ_prefix = 0;
3951      /* pause is 0xf3 0x90.  */
3952      uses_REPZ_prefix = *codep == 0x90;
3953      uses_LOCK_prefix = 0;
3954      codep++;
3955    }
3956
3957  if (!uses_REPZ_prefix && (prefixes & PREFIX_REPZ))
3958    {
3959      oappend ("repz ");
3960      used_prefixes |= PREFIX_REPZ;
3961    }
3962  if (!uses_REPNZ_prefix && (prefixes & PREFIX_REPNZ))
3963    {
3964      oappend ("repnz ");
3965      used_prefixes |= PREFIX_REPNZ;
3966    }
3967
3968  if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
3969    {
3970      oappend ("lock ");
3971      used_prefixes |= PREFIX_LOCK;
3972    }
3973
3974  if (prefixes & PREFIX_ADDR)
3975    {
3976      sizeflag ^= AFLAG;
3977      if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
3978        {
3979          if ((sizeflag & AFLAG) || address_mode == mode_64bit)
3980            oappend ("addr32 ");
3981          else
3982            oappend ("addr16 ");
3983          used_prefixes |= PREFIX_ADDR;
3984        }
3985    }
3986
3987  if (!uses_DATA_prefix && (prefixes & PREFIX_DATA))
3988    {
3989      sizeflag ^= DFLAG;
3990      if (dp->op[2].bytemode == cond_jump_mode
3991          && dp->op[0].bytemode == v_mode
3992          && !intel_syntax)
3993        {
3994          if (sizeflag & DFLAG)
3995            oappend ("data32 ");
3996          else
3997            oappend ("data16 ");
3998          used_prefixes |= PREFIX_DATA;
3999        }
4000    }

4001
4002  if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
4003    {
4004      dp = &three_byte_table[dp->op[1].bytemode][op];
4005      modrm.mod = (*codep >> 6) & 3;
4006      modrm.reg = (*codep >> 3) & 7;
4007      modrm.rm = *codep & 7;
4008    }
4009  else if (need_modrm)
4010    {
4011      fetch_data(info, codep + 1);
4012      modrm.mod = (*codep >> 6) & 3;
4013      modrm.reg = (*codep >> 3) & 7;
4014      modrm.rm = *codep & 7;
4015    }
4016
4017  if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
4018    {
4019      dofloat (sizeflag);
4020    }
4021  else
4022    {
4023      int index;
4024      if (dp->name == NULL)
4025        {
4026          switch (dp->op[0].bytemode)
4027            {
4028            case USE_GROUPS:
4029              dp = &grps[dp->op[1].bytemode][modrm.reg];
4030              break;
4031
4032            case USE_PREFIX_USER_TABLE:
4033              index = 0;
4034              used_prefixes |= (prefixes & PREFIX_REPZ);
4035              if (prefixes & PREFIX_REPZ)
4036                index = 1;
4037              else
4038                {
4039                  /* We should check PREFIX_REPNZ and PREFIX_REPZ
4040                     before PREFIX_DATA.  */
4041                  used_prefixes |= (prefixes & PREFIX_REPNZ);
4042                  if (prefixes & PREFIX_REPNZ)
4043                    index = 3;
4044                  else
4045                    {
4046                      used_prefixes |= (prefixes & PREFIX_DATA);
4047                      if (prefixes & PREFIX_DATA)
4048                        index = 2;
4049                    }
4050                }
4051              dp = &prefix_user_table[dp->op[1].bytemode][index];
4052              break;
4053
4054            case X86_64_SPECIAL:
4055              index = address_mode == mode_64bit ? 1 : 0;
4056              dp = &x86_64_table[dp->op[1].bytemode][index];
4057              break;
4058
4059            default:
4060              oappend (INTERNAL_DISASSEMBLER_ERROR);
4061              break;
4062            }
4063        }
4064
4065      if (dp->name != NULL && putop (dp->name, sizeflag) == 0)
4066        {
4067          for (i = 0; i < MAX_OPERANDS; ++i)
4068            {
4069              obufp = op_out[i];
4070              op_ad = MAX_OPERANDS - 1 - i;
4071              if (dp->op[i].rtn)
4072                (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
4073            }
4074        }
4075    }
4076
4077  /* See if any prefixes were not used.  If so, print the first one
4078     separately.  If we don't do this, we'll wind up printing an
4079     instruction stream which does not precisely correspond to the
4080     bytes we are disassembling.  */
4081  if ((prefixes & ~used_prefixes) != 0)
4082    {
4083      const char *name;
4084
4085      name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
4086      if (name == NULL)
4087        name = INTERNAL_DISASSEMBLER_ERROR;
4088      (*info->fprintf_func) (info->stream, "%s", name);
4089      return 1;
4090    }
4091  if (rex & ~rex_used)
4092    {
4093      const char *name;
4094      name = prefix_name (rex | 0x40, priv.orig_sizeflag);
4095      if (name == NULL)
4096        name = INTERNAL_DISASSEMBLER_ERROR;
4097      (*info->fprintf_func) (info->stream, "%s ", name);
4098    }
4099
4100  obufp = obuf + strlen (obuf);
4101  for (i = strlen (obuf); i < 6; i++)
4102    oappend (" ");
4103  oappend (" ");
4104  (*info->fprintf_func) (info->stream, "%s", obuf);
4105
4106  /* The enter and bound instructions are printed with operands in the same
4107     order as the intel book; everything else is printed in reverse order.  */
4108  if (intel_syntax || two_source_ops)
4109    {
4110      bfd_vma riprel;
4111
4112      for (i = 0; i < MAX_OPERANDS; ++i)
4113        op_txt[i] = op_out[i];
4114
4115      for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
4116        {
4117          op_ad = op_index[i];
4118          op_index[i] = op_index[MAX_OPERANDS - 1 - i];
4119          op_index[MAX_OPERANDS - 1 - i] = op_ad;
4120          riprel = op_riprel[i];
4121          op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
4122          op_riprel[MAX_OPERANDS - 1 - i] = riprel;
4123        }
4124    }
4125  else
4126    {
4127      for (i = 0; i < MAX_OPERANDS; ++i)
4128        op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
4129    }
4130
4131  needcomma = 0;
4132  for (i = 0; i < MAX_OPERANDS; ++i)
4133    if (*op_txt[i])
4134      {
4135        if (needcomma)
4136          (*info->fprintf_func) (info->stream, ",");
4137        if (op_index[i] != -1 && !op_riprel[i])
4138          (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
4139        else
4140          (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
4141        needcomma = 1;
4142      }
4143
4144  for (i = 0; i < MAX_OPERANDS; i++)
4145    if (op_index[i] != -1 && op_riprel[i])
4146      {
4147        (*info->fprintf_func) (info->stream, "        # ");
4148        (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
4149                                                + op_address[op_index[i]]), info);
4150        break;
4151      }
4152  return codep - priv.the_buffer;
4153}
4154
4155static const char *float_mem[] = {
4156  /* d8 */
4157  "fadd{s||s|}",
4158  "fmul{s||s|}",
4159  "fcom{s||s|}",
4160  "fcomp{s||s|}",
4161  "fsub{s||s|}",
4162  "fsubr{s||s|}",
4163  "fdiv{s||s|}",
4164  "fdivr{s||s|}",
4165  /* d9 */
4166  "fld{s||s|}",
4167  "(bad)",
4168  "fst{s||s|}",
4169  "fstp{s||s|}",
4170  "fldenvIC",
4171  "fldcw",
4172  "fNstenvIC",
4173  "fNstcw",
4174  /* da */
4175  "fiadd{l||l|}",
4176  "fimul{l||l|}",
4177  "ficom{l||l|}",
4178  "ficomp{l||l|}",
4179  "fisub{l||l|}",
4180  "fisubr{l||l|}",
4181  "fidiv{l||l|}",
4182  "fidivr{l||l|}",
4183  /* db */
4184  "fild{l||l|}",
4185  "fisttp{l||l|}",
4186  "fist{l||l|}",
4187  "fistp{l||l|}",
4188  "(bad)",
4189  "fld{t||t|}",
4190  "(bad)",
4191  "fstp{t||t|}",
4192  /* dc */
4193  "fadd{l||l|}",
4194  "fmul{l||l|}",
4195  "fcom{l||l|}",
4196  "fcomp{l||l|}",
4197  "fsub{l||l|}",
4198  "fsubr{l||l|}",
4199  "fdiv{l||l|}",
4200  "fdivr{l||l|}",
4201  /* dd */
4202  "fld{l||l|}",
4203  "fisttp{ll||ll|}",
4204  "fst{l||l|}",
4205  "fstp{l||l|}",
4206  "frstorIC",
4207  "(bad)",
4208  "fNsaveIC",
4209  "fNstsw",
4210  /* de */
4211  "fiadd",
4212  "fimul",
4213  "ficom",
4214  "ficomp",
4215  "fisub",
4216  "fisubr",
4217  "fidiv",
4218  "fidivr",
4219  /* df */
4220  "fild",
4221  "fisttp",
4222  "fist",
4223  "fistp",
4224  "fbld",
4225  "fild{ll||ll|}",
4226  "fbstp",
4227  "fistp{ll||ll|}",
4228};
4229
4230static const unsigned char float_mem_mode[] = {
4231  /* d8 */
4232  d_mode,
4233  d_mode,
4234  d_mode,
4235  d_mode,
4236  d_mode,
4237  d_mode,
4238  d_mode,
4239  d_mode,
4240  /* d9 */
4241  d_mode,
4242  0,
4243  d_mode,
4244  d_mode,
4245  0,
4246  w_mode,
4247  0,
4248  w_mode,
4249  /* da */
4250  d_mode,
4251  d_mode,
4252  d_mode,
4253  d_mode,
4254  d_mode,
4255  d_mode,
4256  d_mode,
4257  d_mode,
4258  /* db */
4259  d_mode,
4260  d_mode,
4261  d_mode,
4262  d_mode,
4263  0,
4264  t_mode,
4265  0,
4266  t_mode,
4267  /* dc */
4268  q_mode,
4269  q_mode,
4270  q_mode,
4271  q_mode,
4272  q_mode,
4273  q_mode,
4274  q_mode,
4275  q_mode,
4276  /* dd */
4277  q_mode,
4278  q_mode,
4279  q_mode,
4280  q_mode,
4281  0,
4282  0,
4283  0,
4284  w_mode,
4285  /* de */
4286  w_mode,
4287  w_mode,
4288  w_mode,
4289  w_mode,
4290  w_mode,
4291  w_mode,
4292  w_mode,
4293  w_mode,
4294  /* df */
4295  w_mode,
4296  w_mode,
4297  w_mode,
4298  w_mode,
4299  t_mode,
4300  q_mode,
4301  t_mode,
4302  q_mode
4303};
4304
4305#define ST { OP_ST, 0 }
4306#define STi { OP_STi, 0 }
4307
4308#define FGRPd9_2 NULL, { { NULL, 0 } }
4309#define FGRPd9_4 NULL, { { NULL, 1 } }
4310#define FGRPd9_5 NULL, { { NULL, 2 } }
4311#define FGRPd9_6 NULL, { { NULL, 3 } }
4312#define FGRPd9_7 NULL, { { NULL, 4 } }
4313#define FGRPda_5 NULL, { { NULL, 5 } }
4314#define FGRPdb_4 NULL, { { NULL, 6 } }
4315#define FGRPde_3 NULL, { { NULL, 7 } }
4316#define FGRPdf_4 NULL, { { NULL, 8 } }
4317
4318static const struct dis386 float_reg[][8] = {
4319  /* d8 */
4320  {
4321    { "fadd",   { ST, STi } },
4322    { "fmul",   { ST, STi } },
4323    { "fcom",   { STi } },
4324    { "fcomp",  { STi } },
4325    { "fsub",   { ST, STi } },
4326    { "fsubr",  { ST, STi } },
4327    { "fdiv",   { ST, STi } },
4328    { "fdivr",  { ST, STi } },
4329  },
4330  /* d9 */
4331  {
4332    { "fld",    { STi } },
4333    { "fxch",   { STi } },
4334    { FGRPd9_2 },
4335    { "(bad)",  { XX } },
4336    { FGRPd9_4 },
4337    { FGRPd9_5 },
4338    { FGRPd9_6 },
4339    { FGRPd9_7 },
4340  },
4341  /* da */
4342  {
4343    { "fcmovb", { ST, STi } },
4344    { "fcmove", { ST, STi } },
4345    { "fcmovbe",{ ST, STi } },
4346    { "fcmovu", { ST, STi } },
4347    { "(bad)",  { XX } },
4348    { FGRPda_5 },
4349    { "(bad)",  { XX } },
4350    { "(bad)",  { XX } },
4351  },
4352  /* db */
4353  {
4354    { "fcmovnb",{ ST, STi } },
4355    { "fcmovne",{ ST, STi } },
4356    { "fcmovnbe",{ ST, STi } },
4357    { "fcmovnu",{ ST, STi } },
4358    { FGRPdb_4 },
4359    { "fucomi", { ST, STi } },
4360    { "fcomi",  { ST, STi } },
4361    { "(bad)",  { XX } },
4362  },
4363  /* dc */
4364  {
4365    { "fadd",   { STi, ST } },
4366    { "fmul",   { STi, ST } },
4367    { "(bad)",  { XX } },
4368    { "(bad)",  { XX } },
4369#if SYSV386_COMPAT
4370    { "fsub",   { STi, ST } },
4371    { "fsubr",  { STi, ST } },
4372    { "fdiv",   { STi, ST } },
4373    { "fdivr",  { STi, ST } },
4374#else
4375    { "fsubr",  { STi, ST } },
4376    { "fsub",   { STi, ST } },
4377    { "fdivr",  { STi, ST } },
4378    { "fdiv",   { STi, ST } },
4379#endif
4380  },
4381  /* dd */
4382  {
4383    { "ffree",  { STi } },
4384    { "(bad)",  { XX } },
4385    { "fst",    { STi } },
4386    { "fstp",   { STi } },
4387    { "fucom",  { STi } },
4388    { "fucomp", { STi } },
4389    { "(bad)",  { XX } },
4390    { "(bad)",  { XX } },
4391  },
4392  /* de */
4393  {
4394    { "faddp",  { STi, ST } },
4395    { "fmulp",  { STi, ST } },
4396    { "(bad)",  { XX } },
4397    { FGRPde_3 },
4398#if SYSV386_COMPAT
4399    { "fsubp",  { STi, ST } },
4400    { "fsubrp", { STi, ST } },
4401    { "fdivp",  { STi, ST } },
4402    { "fdivrp", { STi, ST } },
4403#else
4404    { "fsubrp", { STi, ST } },
4405    { "fsubp",  { STi, ST } },
4406    { "fdivrp", { STi, ST } },
4407    { "fdivp",  { STi, ST } },
4408#endif
4409  },
4410  /* df */
4411  {
4412    { "ffreep", { STi } },
4413    { "(bad)",  { XX } },
4414    { "(bad)",  { XX } },
4415    { "(bad)",  { XX } },
4416    { FGRPdf_4 },
4417    { "fucomip", { ST, STi } },
4418    { "fcomip", { ST, STi } },
4419    { "(bad)",  { XX } },
4420  },
4421};
4422
4423static const char *fgrps[][8] = {
4424  /* d9_2  0 */
4425  {
4426    "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4427  },
4428
4429  /* d9_4  1 */
4430  {
4431    "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4432  },
4433
4434  /* d9_5  2 */
4435  {
4436    "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4437  },
4438
4439  /* d9_6  3 */
4440  {
4441    "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4442  },
4443
4444  /* d9_7  4 */
4445  {
4446    "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4447  },
4448
4449  /* da_5  5 */
4450  {
4451    "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4452  },
4453
4454  /* db_4  6 */
4455  {
4456    "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4457    "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4458  },
4459
4460  /* de_3  7 */
4461  {
4462    "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4463  },
4464
4465  /* df_4  8 */
4466  {
4467    "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4468  },
4469};
4470
4471static void
4472dofloat (int sizeflag)
4473{
4474  const struct dis386 *dp;
4475  unsigned char floatop;
4476
4477  floatop = codep[-1];
4478
4479  if (modrm.mod != 3)
4480    {
4481      int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
4482
4483      putop (float_mem[fp_indx], sizeflag);
4484      obufp = op_out[0];
4485      op_ad = 2;
4486      OP_E (float_mem_mode[fp_indx], sizeflag);
4487      return;
4488    }
4489  /* Skip mod/rm byte.  */
4490  MODRM_CHECK;
4491  codep++;
4492
4493  dp = &float_reg[floatop - 0xd8][modrm.reg];
4494  if (dp->name == NULL)
4495    {
4496      putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
4497
4498      /* Instruction fnstsw is only one with strange arg.  */
4499      if (floatop == 0xdf && codep[-1] == 0xe0)
4500        pstrcpy (op_out[0], sizeof(op_out[0]), names16[0]);
4501    }
4502  else
4503    {
4504      putop (dp->name, sizeflag);
4505
4506      obufp = op_out[0];
4507      op_ad = 2;
4508      if (dp->op[0].rtn)
4509        (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
4510
4511      obufp = op_out[1];
4512      op_ad = 1;
4513      if (dp->op[1].rtn)
4514        (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
4515    }
4516}
4517
4518static void
4519OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4520{
4521  oappend ("%st" + intel_syntax);
4522}
4523
4524static void
4525OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4526{
4527  snprintf (scratchbuf, sizeof(scratchbuf), "%%st(%d)", modrm.rm);
4528  oappend (scratchbuf + intel_syntax);
4529}
4530
4531/* Capital letters in template are macros.  */
4532static int
4533putop (const char *template, int sizeflag)
4534{
4535  const char *p;
4536  int alt = 0;
4537
4538  for (p = template; *p; p++)
4539    {
4540      switch (*p)
4541        {
4542        default:
4543          *obufp++ = *p;
4544          break;
4545        case '{':
4546          alt = 0;
4547          if (intel_syntax)
4548            alt += 1;
4549          if (address_mode == mode_64bit)
4550            alt += 2;
4551          while (alt != 0)
4552            {
4553              while (*++p != '|')
4554                {
4555                  if (*p == '}')
4556                    {
4557                      /* Alternative not valid.  */
4558                      pstrcpy (obuf, sizeof(obuf), "(bad)");
4559                      obufp = obuf + 5;
4560                      return 1;
4561                    }
4562                  else if (*p == '\0')
4563                    abort ();
4564                }
4565              alt--;
4566            }
4567          /* Fall through.  */
4568        case 'I':
4569          alt = 1;
4570          continue;
4571        case '|':
4572          while (*++p != '}')
4573            {
4574              if (*p == '\0')
4575                abort ();
4576            }
4577          break;
4578        case '}':
4579          break;
4580        case 'A':
4581          if (intel_syntax)
4582            break;
4583          if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4584            *obufp++ = 'b';
4585          break;
4586        case 'B':
4587          if (intel_syntax)
4588            break;
4589          if (sizeflag & SUFFIX_ALWAYS)
4590            *obufp++ = 'b';
4591          break;
4592        case 'C':
4593          if (intel_syntax && !alt)
4594            break;
4595          if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
4596            {
4597              if (sizeflag & DFLAG)
4598                *obufp++ = intel_syntax ? 'd' : 'l';
4599              else
4600                *obufp++ = intel_syntax ? 'w' : 's';
4601              used_prefixes |= (prefixes & PREFIX_DATA);
4602            }
4603          break;
4604        case 'D':
4605          if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
4606            break;
4607          USED_REX (REX_W);
4608          if (modrm.mod == 3)
4609            {
4610              if (rex & REX_W)
4611                *obufp++ = 'q';
4612              else if (sizeflag & DFLAG)
4613                *obufp++ = intel_syntax ? 'd' : 'l';
4614              else
4615                *obufp++ = 'w';
4616              used_prefixes |= (prefixes & PREFIX_DATA);
4617            }
4618          else
4619            *obufp++ = 'w';
4620          break;
4621        case 'E':               /* For jcxz/jecxz */
4622          if (address_mode == mode_64bit)
4623            {
4624              if (sizeflag & AFLAG)
4625                *obufp++ = 'r';
4626              else
4627                *obufp++ = 'e';
4628            }
4629          else
4630            if (sizeflag & AFLAG)
4631              *obufp++ = 'e';
4632          used_prefixes |= (prefixes & PREFIX_ADDR);
4633          break;
4634        case 'F':
4635          if (intel_syntax)
4636            break;
4637          if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
4638            {
4639              if (sizeflag & AFLAG)
4640                *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
4641              else
4642                *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
4643              used_prefixes |= (prefixes & PREFIX_ADDR);
4644            }
4645          break;
4646        case 'G':
4647          if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
4648            break;
4649          if ((rex & REX_W) || (sizeflag & DFLAG))
4650            *obufp++ = 'l';
4651          else
4652            *obufp++ = 'w';
4653          if (!(rex & REX_W))
4654            used_prefixes |= (prefixes & PREFIX_DATA);
4655          break;
4656        case 'H':
4657          if (intel_syntax)
4658            break;
4659          if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
4660              || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
4661            {
4662              used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
4663              *obufp++ = ',';
4664              *obufp++ = 'p';
4665              if (prefixes & PREFIX_DS)
4666                *obufp++ = 't';
4667              else
4668                *obufp++ = 'n';
4669            }
4670          break;
4671        case 'J':
4672          if (intel_syntax)
4673            break;
4674          *obufp++ = 'l';
4675          break;
4676        case 'K':
4677          USED_REX (REX_W);
4678          if (rex & REX_W)
4679            *obufp++ = 'q';
4680          else
4681            *obufp++ = 'd';
4682          break;
4683        case 'Z':
4684          if (intel_syntax)
4685            break;
4686          if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
4687            {
4688              *obufp++ = 'q';
4689              break;
4690            }
4691          /* Fall through.  */
4692        case 'L':
4693          if (intel_syntax)
4694            break;
4695          if (sizeflag & SUFFIX_ALWAYS)
4696            *obufp++ = 'l';
4697          break;
4698        case 'N':
4699          if ((prefixes & PREFIX_FWAIT) == 0)
4700            *obufp++ = 'n';
4701          else
4702            used_prefixes |= PREFIX_FWAIT;
4703          break;
4704        case 'O':
4705          USED_REX (REX_W);
4706          if (rex & REX_W)
4707            *obufp++ = 'o';
4708          else if (intel_syntax && (sizeflag & DFLAG))
4709            *obufp++ = 'q';
4710          else
4711            *obufp++ = 'd';
4712          if (!(rex & REX_W))
4713            used_prefixes |= (prefixes & PREFIX_DATA);
4714          break;
4715        case 'T':
4716          if (intel_syntax)
4717            break;
4718          if (address_mode == mode_64bit && (sizeflag & DFLAG))
4719            {
4720              *obufp++ = 'q';
4721              break;
4722            }
4723          /* Fall through.  */
4724        case 'P':
4725          if (intel_syntax)
4726            break;
4727          if ((prefixes & PREFIX_DATA)
4728              || (rex & REX_W)
4729              || (sizeflag & SUFFIX_ALWAYS))
4730            {
4731              USED_REX (REX_W);
4732              if (rex & REX_W)
4733                *obufp++ = 'q';
4734              else
4735                {
4736                   if (sizeflag & DFLAG)
4737                      *obufp++ = 'l';
4738                   else
4739                     *obufp++ = 'w';
4740                }
4741              used_prefixes |= (prefixes & PREFIX_DATA);
4742            }
4743          break;
4744        case 'U':
4745          if (intel_syntax)
4746            break;
4747          if (address_mode == mode_64bit && (sizeflag & DFLAG))
4748            {
4749              if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4750                *obufp++ = 'q';
4751              break;
4752            }
4753          /* Fall through.  */
4754        case 'Q':
4755          if (intel_syntax && !alt)
4756            break;
4757          USED_REX (REX_W);
4758          if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4759            {
4760              if (rex & REX_W)
4761                *obufp++ = 'q';
4762              else
4763                {
4764                  if (sizeflag & DFLAG)
4765                    *obufp++ = intel_syntax ? 'd' : 'l';
4766                  else
4767                    *obufp++ = 'w';
4768                }
4769              used_prefixes |= (prefixes & PREFIX_DATA);
4770            }
4771          break;
4772        case 'R':
4773          USED_REX (REX_W);
4774          if (rex & REX_W)
4775            *obufp++ = 'q';
4776          else if (sizeflag & DFLAG)
4777            {
4778              if (intel_syntax)
4779                  *obufp++ = 'd';
4780              else
4781                  *obufp++ = 'l';
4782            }
4783          else
4784            *obufp++ = 'w';
4785          if (intel_syntax && !p[1]
4786              && ((rex & REX_W) || (sizeflag & DFLAG)))
4787            *obufp++ = 'e';
4788          if (!(rex & REX_W))
4789            used_prefixes |= (prefixes & PREFIX_DATA);
4790          break;
4791        case 'V':
4792          if (intel_syntax)
4793            break;
4794          if (address_mode == mode_64bit && (sizeflag & DFLAG))
4795            {
4796              if (sizeflag & SUFFIX_ALWAYS)
4797                *obufp++ = 'q';
4798              break;
4799            }
4800          /* Fall through.  */
4801        case 'S':
4802          if (intel_syntax)
4803            break;
4804          if (sizeflag & SUFFIX_ALWAYS)
4805            {
4806              if (rex & REX_W)
4807                *obufp++ = 'q';
4808              else
4809                {
4810                  if (sizeflag & DFLAG)
4811                    *obufp++ = 'l';
4812                  else
4813                    *obufp++ = 'w';
4814                  used_prefixes |= (prefixes & PREFIX_DATA);
4815                }
4816            }
4817          break;
4818        case 'X':
4819          if (prefixes & PREFIX_DATA)
4820            *obufp++ = 'd';
4821          else
4822            *obufp++ = 's';
4823          used_prefixes |= (prefixes & PREFIX_DATA);
4824          break;
4825        case 'Y':
4826          if (intel_syntax)
4827            break;
4828          if (rex & REX_W)
4829            {
4830              USED_REX (REX_W);
4831              *obufp++ = 'q';
4832            }
4833          break;
4834          /* implicit operand size 'l' for i386 or 'q' for x86-64 */
4835        case 'W':
4836          /* operand size flag for cwtl, cbtw */
4837          USED_REX (REX_W);
4838          if (rex & REX_W)
4839            {
4840              if (intel_syntax)
4841                *obufp++ = 'd';
4842              else
4843                *obufp++ = 'l';
4844            }
4845          else if (sizeflag & DFLAG)
4846            *obufp++ = 'w';
4847          else
4848            *obufp++ = 'b';
4849          if (!(rex & REX_W))
4850            used_prefixes |= (prefixes & PREFIX_DATA);
4851          break;
4852        }
4853      alt = 0;
4854    }
4855  *obufp = 0;
4856  return 0;
4857}
4858
4859static void
4860oappend (const char *s)
4861{
4862  strcpy (obufp, s);
4863  obufp += strlen (s);
4864}
4865
4866static void
4867append_seg (void)
4868{
4869  if (prefixes & PREFIX_CS)
4870    {
4871      used_prefixes |= PREFIX_CS;
4872      oappend ("%cs:" + intel_syntax);
4873    }
4874  if (prefixes & PREFIX_DS)
4875    {
4876      used_prefixes |= PREFIX_DS;
4877      oappend ("%ds:" + intel_syntax);
4878    }
4879  if (prefixes & PREFIX_SS)
4880    {
4881      used_prefixes |= PREFIX_SS;
4882      oappend ("%ss:" + intel_syntax);
4883    }
4884  if (prefixes & PREFIX_ES)
4885    {
4886      used_prefixes |= PREFIX_ES;
4887      oappend ("%es:" + intel_syntax);
4888    }
4889  if (prefixes & PREFIX_FS)
4890    {
4891      used_prefixes |= PREFIX_FS;
4892      oappend ("%fs:" + intel_syntax);
4893    }
4894  if (prefixes & PREFIX_GS)
4895    {
4896      used_prefixes |= PREFIX_GS;
4897      oappend ("%gs:" + intel_syntax);
4898    }
4899}
4900
4901static void
4902OP_indirE (int bytemode, int sizeflag)
4903{
4904  if (!intel_syntax)
4905    oappend ("*");
4906  OP_E (bytemode, sizeflag);
4907}
4908
4909static void
4910print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp)
4911{
4912  if (address_mode == mode_64bit)
4913    {
4914      if (hex)
4915        {
4916          char tmp[30];
4917          int i;
4918          buf[0] = '0';
4919          buf[1] = 'x';
4920          snprintf_vma (tmp, sizeof(tmp), disp);
4921          for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++) {
4922          }
4923          pstrcpy (buf + 2, bufsize - 2, tmp + i);
4924        }
4925      else
4926        {
4927          bfd_signed_vma v = disp;
4928          char tmp[30];
4929          int i;
4930          if (v < 0)
4931            {
4932              *(buf++) = '-';
4933              v = -disp;
4934              /* Check for possible overflow on 0x8000000000000000.  */
4935              if (v < 0)
4936                {
4937                  pstrcpy (buf, bufsize, "9223372036854775808");
4938                  return;
4939                }
4940            }
4941          if (!v)
4942            {
4943                pstrcpy (buf, bufsize, "0");
4944              return;
4945            }
4946
4947          i = 0;
4948          tmp[29] = 0;
4949          while (v)
4950            {
4951              tmp[28 - i] = (v % 10) + '0';
4952              v /= 10;
4953              i++;
4954            }
4955          pstrcpy (buf, bufsize, tmp + 29 - i);
4956        }
4957    }
4958  else
4959    {
4960      if (hex)
4961        snprintf (buf, bufsize, "0x%x", (unsigned int) disp);
4962      else
4963        snprintf (buf, bufsize, "%d", (int) disp);
4964    }
4965}
4966
4967/* Put DISP in BUF as signed hex number.  */
4968
4969static void
4970print_displacement (char *buf, bfd_vma disp)
4971{
4972  bfd_signed_vma val = disp;
4973  char tmp[30];
4974  int i, j = 0;
4975
4976  if (val < 0)
4977    {
4978      buf[j++] = '-';
4979      val = -disp;
4980
4981      /* Check for possible overflow.  */
4982      if (val < 0)
4983        {
4984          switch (address_mode)
4985            {
4986            case mode_64bit:
4987              strcpy (buf + j, "0x8000000000000000");
4988              break;
4989            case mode_32bit:
4990              strcpy (buf + j, "0x80000000");
4991              break;
4992            case mode_16bit:
4993              strcpy (buf + j, "0x8000");
4994              break;
4995            }
4996          return;
4997        }
4998    }
4999
5000  buf[j++] = '0';

5001  buf[j++] = 'x';
5002
5003  snprintf_vma (tmp, sizeof(tmp), val);
5004  for (i = 0; tmp[i] == '0'; i++)
5005    continue;
5006  if (tmp[i] == '\0')
5007    i--;
5008  strcpy (buf + j, tmp + i);
5009}
5010
5011static void
5012intel_operand_size (int bytemode, int sizeflag)
5013{
5014  switch (bytemode)
5015    {
5016    case b_mode:
5017    case dqb_mode:
5018      oappend ("BYTE PTR ");
5019      break;
5020    case w_mode:
5021    case dqw_mode:
5022      oappend ("WORD PTR ");
5023      break;
5024    case stack_v_mode:
5025      if (address_mode == mode_64bit && (sizeflag & DFLAG))
5026        {
5027          oappend ("QWORD PTR ");
5028          used_prefixes |= (prefixes & PREFIX_DATA);
5029          break;
5030        }
5031      /* FALLTHRU */
5032    case v_mode:
5033    case dq_mode:
5034      USED_REX (REX_W);
5035      if (rex & REX_W)
5036        oappend ("QWORD PTR ");
5037      else if ((sizeflag & DFLAG) || bytemode == dq_mode)
5038        oappend ("DWORD PTR ");
5039      else
5040        oappend ("WORD PTR ");
5041      used_prefixes |= (prefixes & PREFIX_DATA);
5042      break;
5043    case z_mode:
5044      if ((rex & REX_W) || (sizeflag & DFLAG))
5045        *obufp++ = 'D';
5046      oappend ("WORD PTR ");
5047      if (!(rex & REX_W))
5048        used_prefixes |= (prefixes & PREFIX_DATA);
5049      break;
5050    case d_mode:
5051    case dqd_mode:
5052      oappend ("DWORD PTR ");
5053      break;
5054    case q_mode:
5055      oappend ("QWORD PTR ");
5056      break;
5057    case m_mode:
5058      if (address_mode == mode_64bit)
5059        oappend ("QWORD PTR ");
5060      else
5061        oappend ("DWORD PTR ");
5062      break;
5063    case f_mode:
5064      if (sizeflag & DFLAG)
5065        oappend ("FWORD PTR ");
5066      else
5067        oappend ("DWORD PTR ");
5068      used_prefixes |= (prefixes & PREFIX_DATA);
5069      break;
5070    case t_mode:
5071      oappend ("TBYTE PTR ");
5072      break;
5073    case x_mode:
5074      oappend ("XMMWORD PTR ");
5075      break;
5076    case o_mode:
5077      oappend ("OWORD PTR ");
5078      break;
5079    default:
5080      break;
5081    }
5082}
5083
5084static void
5085OP_E (int bytemode, int sizeflag)
5086{
5087  bfd_vma disp;
5088  int add = 0;
5089  int riprel = 0;
5090  USED_REX (REX_B);
5091  if (rex & REX_B)
5092    add += 8;
5093
5094  /* Skip mod/rm byte.  */
5095  MODRM_CHECK;
5096  codep++;
5097
5098  if (modrm.mod == 3)
5099    {
5100      switch (bytemode)
5101        {
5102        case b_mode:
5103          USED_REX (0);
5104          if (rex)
5105            oappend (names8rex[modrm.rm + add]);
5106          else
5107            oappend (names8[modrm.rm + add]);
5108          break;
5109        case w_mode:
5110          oappend (names16[modrm.rm + add]);
5111          break;
5112        case d_mode:
5113          oappend (names32[modrm.rm + add]);
5114          break;
5115        case q_mode:
5116          oappend (names64[modrm.rm + add]);
5117          break;
5118        case m_mode:
5119          if (address_mode == mode_64bit)
5120            oappend (names64[modrm.rm + add]);
5121          else
5122            oappend (names32[modrm.rm + add]);
5123          break;
5124        case stack_v_mode:
5125          if (address_mode == mode_64bit && (sizeflag & DFLAG))
5126            {
5127              oappend (names64[modrm.rm + add]);
5128              used_prefixes |= (prefixes & PREFIX_DATA);
5129              break;
5130            }
5131          bytemode = v_mode;
5132          /* FALLTHRU */
5133        case v_mode:
5134        case dq_mode:
5135        case dqb_mode:
5136        case dqd_mode:
5137        case dqw_mode:
5138          USED_REX (REX_W);
5139          if (rex & REX_W)
5140            oappend (names64[modrm.rm + add]);
5141          else if ((sizeflag & DFLAG) || bytemode != v_mode)
5142            oappend (names32[modrm.rm + add]);
5143          else
5144            oappend (names16[modrm.rm + add]);
5145          used_prefixes |= (prefixes & PREFIX_DATA);
5146          break;
5147        case 0:
5148          break;
5149        default:
5150          oappend (INTERNAL_DISASSEMBLER_ERROR);
5151          break;
5152        }
5153      return;
5154    }
5155
5156  disp = 0;
5157  if (intel_syntax)
5158    intel_operand_size (bytemode, sizeflag);
5159  append_seg ();
5160
5161  if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5162    {
5163      /* 32/64 bit address mode */
5164      int havedisp;
5165      int havesib;
5166      int havebase;
5167      int base;
5168      int index = 0;
5169      int scale = 0;
5170
5171      havesib = 0;
5172      havebase = 1;
5173      base = modrm.rm;
5174
5175      if (base == 4)
5176        {
5177          havesib = 1;
5178          fetch_data(the_info, codep + 1);
5179          index = (*codep >> 3) & 7;
5180          if (address_mode == mode_64bit || index != 0x4)
5181            /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored.  */
5182            scale = (*codep >> 6) & 3;
5183          base = *codep & 7;
5184          USED_REX (REX_X);
5185          if (rex & REX_X)
5186            index += 8;
5187          codep++;
5188        }
5189      base += add;
5190
5191      switch (modrm.mod)
5192        {
5193        case 0:
5194          if ((base & 7) == 5)
5195            {
5196              havebase = 0;
5197              if (address_mode == mode_64bit && !havesib)
5198                riprel = 1;
5199              disp = get32s ();
5200            }
5201          break;
5202        case 1:
5203          fetch_data (the_info, codep + 1);
5204          disp = *codep++;
5205          if ((disp & 0x80) != 0)
5206            disp -= 0x100;
5207          break;
5208        case 2:
5209          disp = get32s ();
5210          break;
5211        }
5212
5213      havedisp = havebase || (havesib && (index != 4 || scale != 0));
5214
5215      if (!intel_syntax)
5216        if (modrm.mod != 0 || (base & 7) == 5)
5217          {
5218            if (havedisp || riprel)
5219              print_displacement (scratchbuf, disp);
5220            else
5221              print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
5222            oappend (scratchbuf);
5223            if (riprel)
5224              {
5225                set_op (disp, 1);
5226                oappend ("(%rip)");
5227              }
5228          }
5229
5230      if (havedisp || (intel_syntax && riprel))
5231        {
5232          *obufp++ = open_char;
5233          if (intel_syntax && riprel)
5234            {
5235              set_op (disp, 1);
5236              oappend ("rip");
5237            }
5238          *obufp = '\0';
5239          if (havebase)
5240            oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
5241                     ? names64[base] : names32[base]);
5242          if (havesib)
5243            {
5244              if (index != 4)
5245                {
5246                  if (!intel_syntax || havebase)
5247                    {
5248                      *obufp++ = separator_char;
5249                      *obufp = '\0';
5250                    }
5251                  oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
5252                           ? names64[index] : names32[index]);
5253                }
5254              if (scale != 0 || (!intel_syntax && index != 4))
5255                {
5256                  *obufp++ = scale_char;
5257                  *obufp = '\0';
5258                  snprintf (scratchbuf, sizeof(scratchbuf), "%d", 1 << scale);
5259                  oappend (scratchbuf);
5260                }
5261            }
5262          if (intel_syntax
5263              && (disp || modrm.mod != 0 || (base & 7) == 5))
5264            {
5265              if ((bfd_signed_vma) disp >= 0)
5266                {
5267                  *obufp++ = '+';
5268                  *obufp = '\0';
5269                }
5270              else if (modrm.mod != 1)
5271                {
5272                  *obufp++ = '-';
5273                  *obufp = '\0';
5274                  disp = - (bfd_signed_vma) disp;
5275                }
5276
5277              print_displacement (scratchbuf, disp);
5278              oappend (scratchbuf);
5279            }
5280
5281          *obufp++ = close_char;
5282          *obufp = '\0';
5283        }
5284      else if (intel_syntax)
5285        {
5286          if (modrm.mod != 0 || (base & 7) == 5)
5287            {
5288              if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5289                              | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5290                ;
5291              else
5292                {
5293                  oappend (names_seg[ds_reg - es_reg]);
5294                  oappend (":");
5295                }
5296              print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
5297              oappend (scratchbuf);
5298            }
5299        }
5300    }
5301  else
5302    { /* 16 bit address mode */
5303      switch (modrm.mod)
5304        {
5305        case 0:
5306          if (modrm.rm == 6)
5307            {
5308              disp = get16 ();
5309              if ((disp & 0x8000) != 0)
5310                disp -= 0x10000;
5311            }
5312          break;
5313        case 1:
5314          fetch_data(the_info, codep + 1);
5315          disp = *codep++;
5316          if ((disp & 0x80) != 0)
5317            disp -= 0x100;
5318          break;
5319        case 2:
5320          disp = get16 ();
5321          if ((disp & 0x8000) != 0)
5322            disp -= 0x10000;
5323          break;
5324        }
5325
5326      if (!intel_syntax)
5327        if (modrm.mod != 0 || modrm.rm == 6)
5328          {
5329            print_displacement (scratchbuf, disp);
5330            oappend (scratchbuf);
5331          }
5332
5333      if (modrm.mod != 0 || modrm.rm != 6)
5334        {
5335          *obufp++ = open_char;
5336          *obufp = '\0';
5337          oappend (index16[modrm.rm]);
5338          if (intel_syntax
5339              && (disp || modrm.mod != 0 || modrm.rm == 6))
5340            {
5341              if ((bfd_signed_vma) disp >= 0)
5342                {
5343                  *obufp++ = '+';
5344                  *obufp = '\0';
5345                }
5346              else if (modrm.mod != 1)
5347                {
5348                  *obufp++ = '-';
5349                  *obufp = '\0';
5350                  disp = - (bfd_signed_vma) disp;
5351                }
5352
5353              print_displacement (scratchbuf, disp);
5354              oappend (scratchbuf);
5355            }
5356
5357          *obufp++ = close_char;
5358          *obufp = '\0';
5359        }
5360      else if (intel_syntax)
5361        {
5362          if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5363                          | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5364            ;
5365          else
5366            {
5367              oappend (names_seg[ds_reg - es_reg]);
5368              oappend (":");
5369            }
5370          print_operand_value (scratchbuf, sizeof(scratchbuf), 1,
5371                               disp & 0xffff);
5372          oappend (scratchbuf);
5373        }
5374    }
5375}
5376
5377static void
5378OP_G (int bytemode, int sizeflag)
5379{
5380  int add = 0;
5381  USED_REX (REX_R);
5382  if (rex & REX_R)
5383    add += 8;
5384  switch (bytemode)
5385    {
5386    case b_mode:
5387      USED_REX (0);
5388      if (rex)
5389        oappend (names8rex[modrm.reg + add]);
5390      else
5391        oappend (names8[modrm.reg + add]);
5392      break;
5393    case w_mode:
5394      oappend (names16[modrm.reg + add]);
5395      break;
5396    case d_mode:
5397      oappend (names32[modrm.reg + add]);
5398      break;
5399    case q_mode:
5400      oappend (names64[modrm.reg + add]);
5401      break;
5402    case v_mode:
5403    case dq_mode:
5404    case dqb_mode:
5405    case dqd_mode:
5406    case dqw_mode:
5407      USED_REX (REX_W);
5408      if (rex & REX_W)
5409        oappend (names64[modrm.reg + add]);
5410      else if ((sizeflag & DFLAG) || bytemode != v_mode)
5411        oappend (names32[modrm.reg + add]);
5412      else
5413        oappend (names16[modrm.reg + add]);
5414      used_prefixes |= (prefixes & PREFIX_DATA);
5415      break;
5416    case m_mode:
5417      if (address_mode == mode_64bit)
5418        oappend (names64[modrm.reg + add]);
5419      else
5420        oappend (names32[modrm.reg + add]);
5421      break;
5422    default:
5423      oappend (INTERNAL_DISASSEMBLER_ERROR);
5424      break;
5425    }
5426}
5427
5428static void
5429OP_vvvv (int bytemode, int sizeflags)
5430{
5431    USED_REX (REX_W);
5432    if (rex & REX_W) {
5433        oappend(names64[vex_reg]);
5434    } else {
5435        oappend(names32[vex_reg]);
5436    }
5437}
5438
5439static bfd_vma
5440get64 (void)
5441{
5442  bfd_vma x;
5443#ifdef BFD64
5444  unsigned int a;
5445  unsigned int b;
5446
5447  fetch_data(the_info, codep + 8);
5448  a = *codep++ & 0xff;
5449  a |= (*codep++ & 0xff) << 8;
5450  a |= (*codep++ & 0xff) << 16;
5451  a |= (*codep++ & 0xff) << 24;
5452  b = *codep++ & 0xff;
5453  b |= (*codep++ & 0xff) << 8;
5454  b |= (*codep++ & 0xff) << 16;
5455  b |= (*codep++ & 0xff) << 24;
5456  x = a + ((bfd_vma) b << 32);
5457#else
5458  abort ();
5459  x = 0;
5460#endif
5461  return x;
5462}
5463
5464static bfd_signed_vma
5465get32 (void)
5466{
5467  bfd_signed_vma x = 0;
5468
5469  fetch_data(the_info, codep + 4);
5470  x = *codep++ & (bfd_signed_vma) 0xff;
5471  x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5472  x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5473  x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5474  return x;
5475}
5476
5477static bfd_signed_vma
5478get32s (void)
5479{
5480  bfd_signed_vma x = 0;
5481
5482  fetch_data(the_info, codep + 4);
5483  x = *codep++ & (bfd_signed_vma) 0xff;
5484  x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5485  x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5486  x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5487
5488  x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
5489
5490  return x;
5491}
5492
5493static int
5494get16 (void)
5495{
5496  int x = 0;
5497
5498  fetch_data(the_info, codep + 2);
5499  x = *codep++ & 0xff;
5500  x |= (*codep++ & 0xff) << 8;
5501  return x;
5502}
5503
5504static void
5505set_op (bfd_vma op, int riprel)
5506{
5507  op_index[op_ad] = op_ad;
5508  if (address_mode == mode_64bit)
5509    {
5510      op_address[op_ad] = op;
5511      op_riprel[op_ad] = riprel;
5512    }
5513  else
5514    {
5515      /* Mask to get a 32-bit address.  */
5516      op_address[op_ad] = op & 0xffffffff;
5517      op_riprel[op_ad] = riprel & 0xffffffff;
5518    }
5519}
5520
5521static void
5522OP_REG (int code, int sizeflag)
5523{
5524  const char *s;
5525  int add = 0;
5526  USED_REX (REX_B);
5527  if (rex & REX_B)
5528    add = 8;
5529
5530  switch (code)
5531    {
5532    case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5533    case sp_reg: case bp_reg: case si_reg: case di_reg:
5534      s = names16[code - ax_reg + add];
5535      break;
5536    case es_reg: case ss_reg: case cs_reg:
5537    case ds_reg: case fs_reg: case gs_reg:
5538      s = names_seg[code - es_reg + add];
5539      break;
5540    case al_reg: case ah_reg: case cl_reg: case ch_reg:
5541    case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5542      USED_REX (0);
5543      if (rex)
5544        s = names8rex[code - al_reg + add];
5545      else
5546        s = names8[code - al_reg];
5547      break;
5548    case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
5549    case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
5550      if (address_mode == mode_64bit && (sizeflag & DFLAG))
5551        {
5552          s = names64[code - rAX_reg + add];
5553          break;
5554        }
5555      code += eAX_reg - rAX_reg;
5556      /* Fall through.  */
5557    case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5558    case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
5559      USED_REX (REX_W);
5560      if (rex & REX_W)
5561        s = names64[code - eAX_reg + add];
5562      else if (sizeflag & DFLAG)
5563        s = names32[code - eAX_reg + add];
5564      else
5565        s = names16[code - eAX_reg + add];
5566      used_prefixes |= (prefixes & PREFIX_DATA);
5567      break;
5568    default:
5569      s = INTERNAL_DISASSEMBLER_ERROR;
5570      break;
5571    }
5572  oappend (s);
5573}
5574
5575static void
5576OP_IMREG (int code, int sizeflag)
5577{
5578  const char *s;
5579
5580  switch (code)
5581    {
5582    case indir_dx_reg:
5583      if (intel_syntax)
5584        s = "dx";
5585      else
5586        s = "(%dx)";
5587      break;
5588    case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5589    case sp_reg: case bp_reg: case si_reg: case di_reg:
5590      s = names16[code - ax_reg];
5591      break;
5592    case es_reg: case ss_reg: case cs_reg:
5593    case ds_reg: case fs_reg: case gs_reg:
5594      s = names_seg[code - es_reg];
5595      break;
5596    case al_reg: case ah_reg: case cl_reg: case ch_reg:
5597    case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5598      USED_REX (0);
5599      if (rex)
5600        s = names8rex[code - al_reg];
5601      else
5602        s = names8[code - al_reg];
5603      break;
5604    case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5605    case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
5606      USED_REX (REX_W);
5607      if (rex & REX_W)
5608        s = names64[code - eAX_reg];
5609      else if (sizeflag & DFLAG)
5610        s = names32[code - eAX_reg];
5611      else
5612        s = names16[code - eAX_reg];
5613      used_prefixes |= (prefixes & PREFIX_DATA);
5614      break;
5615    case z_mode_ax_reg:
5616      if ((rex & REX_W) || (sizeflag & DFLAG))
5617        s = *names32;
5618      else
5619        s = *names16;
5620      if (!(rex & REX_W))
5621        used_prefixes |= (prefixes & PREFIX_DATA);
5622      break;
5623    default:
5624      s = INTERNAL_DISASSEMBLER_ERROR;
5625      break;
5626    }
5627  oappend (s);
5628}
5629
5630static void
5631OP_I (int bytemode, int sizeflag)
5632{
5633  bfd_signed_vma op;
5634  bfd_signed_vma mask = -1;
5635
5636  switch (bytemode)
5637    {
5638    case b_mode:
5639      fetch_data(the_info, codep + 1);
5640      op = *codep++;
5641      mask = 0xff;
5642      break;
5643    case q_mode:
5644      if (address_mode == mode_64bit)
5645        {
5646          op = get32s ();
5647          break;
5648        }
5649      /* Fall through.  */
5650    case v_mode:
5651      USED_REX (REX_W);
5652      if (rex & REX_W)
5653        op = get32s ();
5654      else if (sizeflag & DFLAG)
5655        {
5656          op = get32 ();
5657          mask = 0xffffffff;
5658        }
5659      else
5660        {
5661          op = get16 ();
5662          mask = 0xfffff;
5663        }
5664      used_prefixes |= (prefixes & PREFIX_DATA);
5665      break;
5666    case w_mode:
5667      mask = 0xfffff;
5668      op = get16 ();
5669      break;
5670    case const_1_mode:
5671      if (intel_syntax)
5672        oappend ("1");
5673      return;
5674    default:
5675      oappend (INTERNAL_DISASSEMBLER_ERROR);
5676      return;
5677    }
5678
5679  op &= mask;
5680  scratchbuf[0] = '$';
5681  print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op);
5682  oappend (scratchbuf + intel_syntax);
5683  scratchbuf[0] = '\0';
5684}
5685
5686static void
5687OP_I64 (int bytemode, int sizeflag)
5688{
5689  bfd_signed_vma op;
5690  bfd_signed_vma mask = -1;
5691
5692  if (address_mode != mode_64bit)
5693    {
5694      OP_I (bytemode, sizeflag);
5695      return;
5696    }
5697
5698  switch (bytemode)
5699    {
5700    case b_mode:
5701      fetch_data(the_info, codep + 1);
5702      op = *codep++;
5703      mask = 0xff;
5704      break;
5705    case v_mode:
5706      USED_REX (REX_W);
5707      if (rex & REX_W)
5708        op = get64 ();
5709      else if (sizeflag & DFLAG)
5710        {
5711          op = get32 ();
5712          mask = 0xffffffff;
5713        }
5714      else
5715        {
5716          op = get16 ();
5717          mask = 0xfffff;
5718        }
5719      used_prefixes |= (prefixes & PREFIX_DATA);
5720      break;
5721    case w_mode:
5722      mask = 0xfffff;
5723      op = get16 ();
5724      break;
5725    default:
5726      oappend (INTERNAL_DISASSEMBLER_ERROR);
5727      return;
5728    }
5729
5730  op &= mask;
5731  scratchbuf[0] = '$';
5732  print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op);
5733  oappend (scratchbuf + intel_syntax);
5734  scratchbuf[0] = '\0';
5735}
5736
5737static void
5738OP_sI (int bytemode, int sizeflag)
5739{
5740  bfd_signed_vma op;
5741
5742  switch (bytemode)
5743    {
5744    case b_mode:
5745      fetch_data(the_info, codep + 1);
5746      op = *codep++;
5747      if ((op & 0x80) != 0)
5748        op -= 0x100;
5749      break;
5750    case v_mode:
5751      USED_REX (REX_W);
5752      if (rex & REX_W)
5753        op = get32s ();
5754      else if (sizeflag & DFLAG)
5755        {
5756          op = get32s ();
5757        }
5758      else
5759        {
5760          op = get16 ();
5761          if ((op & 0x8000) != 0)
5762            op -= 0x10000;
5763        }
5764      used_prefixes |= (prefixes & PREFIX_DATA);
5765      break;
5766    case w_mode:
5767      op = get16 ();
5768      if ((op & 0x8000) != 0)
5769        op -= 0x10000;
5770      break;
5771    default:
5772      oappend (INTERNAL_DISASSEMBLER_ERROR);
5773      return;
5774    }
5775
5776  scratchbuf[0] = '$';
5777  print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op);
5778  oappend (scratchbuf + intel_syntax);
5779}
5780
5781static void
5782OP_J (int bytemode, int sizeflag)
5783{
5784  bfd_vma disp;
5785  bfd_vma mask = -1;
5786  bfd_vma segment = 0;
5787
5788  switch (bytemode)
5789    {
5790    case b_mode:
5791      fetch_data(the_info, codep + 1);
5792      disp = *codep++;
5793      if ((disp & 0x80) != 0)
5794        disp -= 0x100;
5795      break;
5796    case v_mode:
5797      if ((sizeflag & DFLAG) || (rex & REX_W))
5798        disp = get32s ();
5799      else
5800        {
5801          disp = get16 ();
5802          if ((disp & 0x8000) != 0)
5803            disp -= 0x10000;
5804          /* In 16bit mode, address is wrapped around at 64k within
5805             the same segment.  Otherwise, a data16 prefix on a jump
5806             instruction means that the pc is masked to 16 bits after
5807             the displacement is added!  */
5808          mask = 0xffff;
5809          if ((prefixes & PREFIX_DATA) == 0)
5810            segment = ((start_pc + codep - start_codep)
5811                       & ~((bfd_vma) 0xffff));
5812        }
5813      used_prefixes |= (prefixes & PREFIX_DATA);
5814      break;
5815    default:
5816      oappend (INTERNAL_DISASSEMBLER_ERROR);
5817      return;
5818    }
5819  disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
5820  set_op (disp, 0);
5821  print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
5822  oappend (scratchbuf);
5823}
5824
5825static void
5826OP_SEG (int bytemode, int sizeflag)
5827{
5828  if (bytemode == w_mode)
5829    oappend (names_seg[modrm.reg]);
5830  else
5831    OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
5832}
5833
5834static void
5835OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
5836{
5837  int seg, offset;
5838
5839  if (sizeflag & DFLAG)
5840    {
5841      offset = get32 ();
5842      seg = get16 ();
5843    }
5844  else
5845    {
5846      offset = get16 ();
5847      seg = get16 ();
5848    }
5849  used_prefixes |= (prefixes & PREFIX_DATA);
5850  if (intel_syntax)
5851    snprintf (scratchbuf, sizeof(scratchbuf), "0x%x:0x%x", seg, offset);
5852  else
5853    snprintf (scratchbuf, sizeof(scratchbuf), "$0x%x,$0x%x", seg, offset);
5854  oappend (scratchbuf);
5855}
5856
5857static void
5858OP_OFF (int bytemode, int sizeflag)
5859{
5860  bfd_vma off;
5861
5862  if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5863    intel_operand_size (bytemode, sizeflag);
5864  append_seg ();
5865
5866  if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5867    off = get32 ();
5868  else
5869    off = get16 ();
5870
5871  if (intel_syntax)
5872    {
5873      if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5874                        | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
5875        {
5876          oappend (names_seg[ds_reg - es_reg]);
5877          oappend (":");
5878        }
5879    }
5880  print_operand_value (scratchbuf, sizeof(scratchbuf), 1, off);
5881  oappend (scratchbuf);
5882}
5883
5884static void
5885OP_OFF64 (int bytemode, int sizeflag)
5886{
5887  bfd_vma off;
5888
5889  if (address_mode != mode_64bit
5890      || (prefixes & PREFIX_ADDR))
5891    {
5892      OP_OFF (bytemode, sizeflag);
5893      return;
5894    }
5895
5896  if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5897    intel_operand_size (bytemode, sizeflag);
5898  append_seg ();
5899
5900  off = get64 ();
5901
5902  if (intel_syntax)
5903    {
5904      if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5905                        | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
5906        {
5907          oappend (names_seg[ds_reg - es_reg]);
5908          oappend (":");
5909        }
5910    }
5911  print_operand_value (scratchbuf, sizeof(scratchbuf), 1, off);
5912  oappend (scratchbuf);
5913}
5914
5915static void
5916ptr_reg (int code, int sizeflag)
5917{
5918  const char *s;
5919
5920  *obufp++ = open_char;
5921  used_prefixes |= (prefixes & PREFIX_ADDR);
5922  if (address_mode == mode_64bit)
5923    {
5924      if (!(sizeflag & AFLAG))
5925        s = names32[code - eAX_reg];
5926      else
5927        s = names64[code - eAX_reg];
5928    }
5929  else if (sizeflag & AFLAG)
5930    s = names32[code - eAX_reg];
5931  else
5932    s = names16[code - eAX_reg];
5933  oappend (s);
5934  *obufp++ = close_char;
5935  *obufp = 0;
5936}
5937
5938static void
5939OP_ESreg (int code, int sizeflag)
5940{
5941  if (intel_syntax)
5942    {
5943      switch (codep[-1])
5944        {
5945        case 0x6d:      /* insw/insl */
5946          intel_operand_size (z_mode, sizeflag);
5947          break;
5948        case 0xa5:      /* movsw/movsl/movsq */
5949        case 0xa7:      /* cmpsw/cmpsl/cmpsq */
5950        case 0xab:      /* stosw/stosl */
5951        case 0xaf:      /* scasw/scasl */
5952          intel_operand_size (v_mode, sizeflag);
5953          break;
5954        default:
5955          intel_operand_size (b_mode, sizeflag);
5956        }
5957    }
5958  oappend ("%es:" + intel_syntax);
5959  ptr_reg (code, sizeflag);
5960}
5961
5962static void
5963OP_DSreg (int code, int sizeflag)
5964{
5965  if (intel_syntax)
5966    {
5967      switch (codep[-1])
5968        {
5969        case 0x6f:      /* outsw/outsl */
5970          intel_operand_size (z_mode, sizeflag);
5971          break;
5972        case 0xa5:      /* movsw/movsl/movsq */
5973        case 0xa7:      /* cmpsw/cmpsl/cmpsq */
5974        case 0xad:      /* lodsw/lodsl/lodsq */
5975          intel_operand_size (v_mode, sizeflag);
5976          break;
5977        default:
5978          intel_operand_size (b_mode, sizeflag);
5979        }
5980    }
5981  if ((prefixes
5982       & (PREFIX_CS
5983          | PREFIX_DS
5984          | PREFIX_SS
5985          | PREFIX_ES
5986          | PREFIX_FS
5987          | PREFIX_GS)) == 0)
5988    prefixes |= PREFIX_DS;
5989  append_seg ();
5990  ptr_reg (code, sizeflag);
5991}
5992
5993static void
5994OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5995{
5996  int add = 0;
5997  if (rex & REX_R)
5998    {
5999      USED_REX (REX_R);
6000      add = 8;

6001    }
6002  else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
6003    {
6004      used_prefixes |= PREFIX_LOCK;
6005      add = 8;
6006    }
6007  snprintf (scratchbuf, sizeof(scratchbuf), "%%cr%d", modrm.reg + add);
6008  oappend (scratchbuf + intel_syntax);
6009}
6010
6011static void
6012OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6013{
6014  int add = 0;
6015  USED_REX (REX_R);
6016  if (rex & REX_R)
6017    add = 8;
6018  if (intel_syntax)
6019    snprintf (scratchbuf, sizeof(scratchbuf), "db%d", modrm.reg + add);
6020  else
6021    snprintf (scratchbuf, sizeof(scratchbuf), "%%db%d", modrm.reg + add);
6022  oappend (scratchbuf);
6023}
6024
6025static void
6026OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6027{
6028  snprintf (scratchbuf, sizeof(scratchbuf), "%%tr%d", modrm.reg);
6029  oappend (scratchbuf + intel_syntax);
6030}
6031
6032static void
6033OP_R (int bytemode, int sizeflag)
6034{
6035  if (modrm.mod == 3)
6036    OP_E (bytemode, sizeflag);
6037  else
6038    BadOp ();
6039}
6040
6041static void
6042OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6043{
6044  used_prefixes |= (prefixes & PREFIX_DATA);
6045  if (prefixes & PREFIX_DATA)
6046    {
6047      int add = 0;
6048      USED_REX (REX_R);
6049      if (rex & REX_R)
6050        add = 8;
6051      snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.reg + add);
6052    }
6053  else
6054    snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.reg);
6055  oappend (scratchbuf + intel_syntax);
6056}
6057
6058static void
6059OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6060{
6061  int add = 0;
6062  USED_REX (REX_R);
6063  if (rex & REX_R)
6064    add = 8;
6065  snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.reg + add);
6066  oappend (scratchbuf + intel_syntax);
6067}
6068
6069static void
6070OP_EM (int bytemode, int sizeflag)
6071{
6072  if (modrm.mod != 3)
6073    {
6074      if (intel_syntax && bytemode == v_mode)
6075        {
6076          bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
6077          used_prefixes |= (prefixes & PREFIX_DATA);
6078        }
6079      OP_E (bytemode, sizeflag);
6080      return;
6081    }
6082
6083  /* Skip mod/rm byte.  */
6084  MODRM_CHECK;
6085  codep++;
6086  used_prefixes |= (prefixes & PREFIX_DATA);
6087  if (prefixes & PREFIX_DATA)
6088    {
6089      int add = 0;
6090
6091      USED_REX (REX_B);
6092      if (rex & REX_B)
6093        add = 8;
6094      snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.rm + add);
6095    }
6096  else
6097    snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.rm);
6098  oappend (scratchbuf + intel_syntax);
6099}
6100
6101/* cvt* are the only instructions in sse2 which have
6102   both SSE and MMX operands and also have 0x66 prefix
6103   in their opcode. 0x66 was originally used to differentiate
6104   between SSE and MMX instruction(operands). So we have to handle the
6105   cvt* separately using OP_EMC and OP_MXC */
6106static void
6107OP_EMC (int bytemode, int sizeflag)
6108{
6109  if (modrm.mod != 3)
6110    {
6111      if (intel_syntax && bytemode == v_mode)
6112        {
6113          bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
6114          used_prefixes |= (prefixes & PREFIX_DATA);
6115        }
6116      OP_E (bytemode, sizeflag);
6117      return;
6118    }
6119
6120  /* Skip mod/rm byte.  */
6121  MODRM_CHECK;
6122  codep++;
6123  used_prefixes |= (prefixes & PREFIX_DATA);
6124  snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.rm);
6125  oappend (scratchbuf + intel_syntax);
6126}
6127
6128static void
6129OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6130{
6131  used_prefixes |= (prefixes & PREFIX_DATA);
6132  snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.reg);
6133  oappend (scratchbuf + intel_syntax);
6134}
6135
6136static void
6137OP_EX (int bytemode, int sizeflag)
6138{
6139  int add = 0;
6140  if (modrm.mod != 3)
6141    {
6142      OP_E (bytemode, sizeflag);
6143      return;
6144    }
6145  USED_REX (REX_B);
6146  if (rex & REX_B)
6147    add = 8;
6148
6149  /* Skip mod/rm byte.  */
6150  MODRM_CHECK;
6151  codep++;
6152  snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.rm + add);
6153  oappend (scratchbuf + intel_syntax);
6154}
6155
6156static void
6157OP_MS (int bytemode, int sizeflag)
6158{
6159  if (modrm.mod == 3)
6160    OP_EM (bytemode, sizeflag);
6161  else
6162    BadOp ();
6163}
6164
6165static void
6166OP_XS (int bytemode, int sizeflag)
6167{
6168  if (modrm.mod == 3)
6169    OP_EX (bytemode, sizeflag);
6170  else
6171    BadOp ();
6172}
6173
6174static void
6175OP_M (int bytemode, int sizeflag)
6176{
6177  if (modrm.mod == 3)
6178    /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
6179    BadOp ();
6180  else
6181    OP_E (bytemode, sizeflag);
6182}
6183
6184static void
6185OP_0f07 (int bytemode, int sizeflag)
6186{
6187  if (modrm.mod != 3 || modrm.rm != 0)
6188    BadOp ();
6189  else
6190    OP_E (bytemode, sizeflag);
6191}
6192
6193static void
6194OP_0fae (int bytemode, int sizeflag)
6195{
6196  if (modrm.mod == 3)
6197    {
6198      if (modrm.reg == 7)
6199        strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
6200
6201      if (modrm.reg < 5 || modrm.rm != 0)
6202        {
6203          BadOp ();     /* bad sfence, mfence, or lfence */
6204          return;
6205        }
6206    }
6207  else if (modrm.reg != 7)
6208    {
6209      BadOp ();         /* bad clflush */
6210      return;
6211    }
6212
6213  OP_E (bytemode, sizeflag);
6214}
6215
6216/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
6217   32bit mode and "xchg %rax,%rax" in 64bit mode.  */
6218
6219static void
6220NOP_Fixup1 (int bytemode, int sizeflag)
6221{
6222  if ((prefixes & PREFIX_DATA) != 0
6223      || (rex != 0
6224          && rex != 0x48
6225          && address_mode == mode_64bit))
6226    OP_REG (bytemode, sizeflag);
6227  else
6228    strcpy (obuf, "nop");
6229}
6230
6231static void
6232NOP_Fixup2 (int bytemode, int sizeflag)
6233{
6234  if ((prefixes & PREFIX_DATA) != 0
6235      || (rex != 0
6236          && rex != 0x48
6237          && address_mode == mode_64bit))
6238    OP_IMREG (bytemode, sizeflag);
6239}
6240
6241static const char *Suffix3DNow[] = {
6242/* 00 */        NULL,           NULL,           NULL,           NULL,
6243/* 04 */        NULL,           NULL,           NULL,           NULL,
6244/* 08 */        NULL,           NULL,           NULL,           NULL,
6245/* 0C */        "pi2fw",        "pi2fd",        NULL,           NULL,
6246/* 10 */        NULL,           NULL,           NULL,           NULL,
6247/* 14 */        NULL,           NULL,           NULL,           NULL,
6248/* 18 */        NULL,           NULL,           NULL,           NULL,
6249/* 1C */        "pf2iw",        "pf2id",        NULL,           NULL,
6250/* 20 */        NULL,           NULL,           NULL,           NULL,
6251/* 24 */        NULL,           NULL,           NULL,           NULL,
6252/* 28 */        NULL,           NULL,           NULL,           NULL,
6253/* 2C */        NULL,           NULL,           NULL,           NULL,
6254/* 30 */        NULL,           NULL,           NULL,           NULL,
6255/* 34 */        NULL,           NULL,           NULL,           NULL,
6256/* 38 */        NULL,           NULL,           NULL,           NULL,
6257/* 3C */        NULL,           NULL,           NULL,           NULL,
6258/* 40 */        NULL,           NULL,           NULL,           NULL,
6259/* 44 */        NULL,           NULL,           NULL,           NULL,
6260/* 48 */        NULL,           NULL,           NULL,           NULL,
6261/* 4C */        NULL,           NULL,           NULL,           NULL,
6262/* 50 */        NULL,           NULL,           NULL,           NULL,
6263/* 54 */        NULL,           NULL,           NULL,           NULL,
6264/* 58 */        NULL,           NULL,           NULL,           NULL,
6265/* 5C */        NULL,           NULL,           NULL,           NULL,
6266/* 60 */        NULL,           NULL,           NULL,           NULL,
6267/* 64 */        NULL,           NULL,           NULL,           NULL,
6268/* 68 */        NULL,           NULL,           NULL,           NULL,
6269/* 6C */        NULL,           NULL,           NULL,           NULL,
6270/* 70 */        NULL,           NULL,           NULL,           NULL,
6271/* 74 */        NULL,           NULL,           NULL,           NULL,
6272/* 78 */        NULL,           NULL,           NULL,           NULL,
6273/* 7C */        NULL,           NULL,           NULL,           NULL,
6274/* 80 */        NULL,           NULL,           NULL,           NULL,
6275/* 84 */        NULL,           NULL,           NULL,           NULL,
6276/* 88 */        NULL,           NULL,           "pfnacc",       NULL,
6277/* 8C */        NULL,           NULL,           "pfpnacc",      NULL,
6278/* 90 */        "pfcmpge",      NULL,           NULL,           NULL,
6279/* 94 */        "pfmin",        NULL,           "pfrcp",        "pfrsqrt",
6280/* 98 */        NULL,           NULL,           "pfsub",        NULL,
6281/* 9C */        NULL,           NULL,           "pfadd",        NULL,
6282/* A0 */        "pfcmpgt",      NULL,           NULL,           NULL,
6283/* A4 */        "pfmax",        NULL,           "pfrcpit1",     "pfrsqit1",
6284/* A8 */        NULL,           NULL,           "pfsubr",       NULL,
6285/* AC */        NULL,           NULL,           "pfacc",        NULL,
6286/* B0 */        "pfcmpeq",      NULL,           NULL,           NULL,
6287/* B4 */        "pfmul",        NULL,           "pfrcpit2",     "pmulhrw",
6288/* B8 */        NULL,           NULL,           NULL,           "pswapd",
6289/* BC */        NULL,           NULL,           NULL,           "pavgusb",
6290/* C0 */        NULL,           NULL,           NULL,           NULL,
6291/* C4 */        NULL,           NULL,           NULL,           NULL,
6292/* C8 */        NULL,           NULL,           NULL,           NULL,
6293/* CC */        NULL,           NULL,           NULL,           NULL,
6294/* D0 */        NULL,           NULL,           NULL,           NULL,
6295/* D4 */        NULL,           NULL,           NULL,           NULL,
6296/* D8 */        NULL,           NULL,           NULL,           NULL,
6297/* DC */        NULL,           NULL,           NULL,           NULL,
6298/* E0 */        NULL,           NULL,           NULL,           NULL,
6299/* E4 */        NULL,           NULL,           NULL,           NULL,
6300/* E8 */        NULL,           NULL,           NULL,           NULL,
6301/* EC */        NULL,           NULL,           NULL,           NULL,
6302/* F0 */        NULL,           NULL,           NULL,           NULL,
6303/* F4 */        NULL,           NULL,           NULL,           NULL,
6304/* F8 */        NULL,           NULL,           NULL,           NULL,
6305/* FC */        NULL,           NULL,           NULL,           NULL,
6306};
6307
6308static void
6309OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6310{
6311  const char *mnemonic;
6312
6313  fetch_data(the_info, codep + 1);
6314  /* AMD 3DNow! instructions are specified by an opcode suffix in the
6315     place where an 8-bit immediate would normally go.  ie. the last
6316     byte of the instruction.  */
6317  obufp = obuf + strlen (obuf);
6318  mnemonic = Suffix3DNow[*codep++ & 0xff];
6319  if (mnemonic)
6320    oappend (mnemonic);
6321  else
6322    {
6323      /* Since a variable sized modrm/sib chunk is between the start
6324         of the opcode (0x0f0f) and the opcode suffix, we need to do
6325         all the modrm processing first, and don't know until now that
6326         we have a bad opcode.  This necessitates some cleaning up.  */
6327      op_out[0][0] = '\0';
6328      op_out[1][0] = '\0';
6329      BadOp ();
6330    }
6331}
6332
6333static const char *simd_cmp_op[] = {
6334  "eq",
6335  "lt",
6336  "le",
6337  "unord",
6338  "neq",
6339  "nlt",
6340  "nle",
6341  "ord"
6342};
6343
6344static void
6345OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6346{
6347  unsigned int cmp_type;
6348
6349  fetch_data(the_info, codep + 1);
6350  obufp = obuf + strlen (obuf);
6351  cmp_type = *codep++ & 0xff;
6352  if (cmp_type < 8)
6353    {
6354      char suffix1 = 'p', suffix2 = 's';
6355      used_prefixes |= (prefixes & PREFIX_REPZ);
6356      if (prefixes & PREFIX_REPZ)
6357        suffix1 = 's';
6358      else
6359        {
6360          used_prefixes |= (prefixes & PREFIX_DATA);
6361          if (prefixes & PREFIX_DATA)
6362            suffix2 = 'd';
6363          else
6364            {
6365              used_prefixes |= (prefixes & PREFIX_REPNZ);
6366              if (prefixes & PREFIX_REPNZ)
6367                suffix1 = 's', suffix2 = 'd';
6368            }
6369        }
6370      snprintf (scratchbuf, sizeof(scratchbuf), "cmp%s%c%c",
6371                simd_cmp_op[cmp_type], suffix1, suffix2);
6372      used_prefixes |= (prefixes & PREFIX_REPZ);
6373      oappend (scratchbuf);
6374    }
6375  else
6376    {
6377      /* We have a bad extension byte.  Clean up.  */
6378      op_out[0][0] = '\0';
6379      op_out[1][0] = '\0';
6380      BadOp ();
6381    }
6382}
6383
6384static void
6385SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
6386{
6387  /* Change movlps/movhps to movhlps/movlhps for 2 register operand
6388     forms of these instructions.  */
6389  if (modrm.mod == 3)
6390    {
6391      char *p = obuf + strlen (obuf);
6392      *(p + 1) = '\0';
6393      *p       = *(p - 1);
6394      *(p - 1) = *(p - 2);
6395      *(p - 2) = *(p - 3);
6396      *(p - 3) = extrachar;
6397    }
6398}
6399
6400static void
6401PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
6402{
6403  if (modrm.mod == 3 && modrm.reg == 1 && modrm.rm <= 1)
6404    {
6405      /* Override "sidt".  */
6406      size_t olen = strlen (obuf);
6407      char *p = obuf + olen - 4;
6408      const char * const *names = (address_mode == mode_64bit
6409                            ? names64 : names32);
6410
6411      /* We might have a suffix when disassembling with -Msuffix.  */
6412      if (*p == 'i')
6413        --p;
6414
6415      /* Remove "addr16/addr32" if we aren't in Intel mode.  */
6416      if (!intel_syntax
6417          && (prefixes & PREFIX_ADDR)
6418          && olen >= (4 + 7)
6419          && *(p - 1) == ' '
6420          && strncmp (p - 7, "addr", 4) == 0
6421          && (strncmp (p - 3, "16", 2) == 0
6422              || strncmp (p - 3, "32", 2) == 0))
6423        p -= 7;
6424
6425      if (modrm.rm)
6426        {
6427          /* mwait %eax,%ecx  */
6428          strcpy (p, "mwait");
6429          if (!intel_syntax)
6430            strcpy (op_out[0], names[0]);
6431        }
6432      else
6433        {
6434          /* monitor %eax,%ecx,%edx"  */
6435          strcpy (p, "monitor");
6436          if (!intel_syntax)
6437            {
6438              const char * const *op1_names;
6439              if (!(prefixes & PREFIX_ADDR))
6440                op1_names = (address_mode == mode_16bit
6441                             ? names16 : names);
6442              else
6443                {
6444                  op1_names = (address_mode != mode_32bit
6445                               ? names32 : names16);
6446                  used_prefixes |= PREFIX_ADDR;
6447                }
6448              strcpy (op_out[0], op1_names[0]);
6449              strcpy (op_out[2], names[2]);
6450            }
6451        }
6452      if (!intel_syntax)
6453        {
6454          strcpy (op_out[1], names[1]);
6455          two_source_ops = 1;
6456        }
6457
6458      codep++;
6459    }
6460  else
6461    OP_M (0, sizeflag);
6462}
6463
6464static void
6465SVME_Fixup (int bytemode, int sizeflag)
6466{
6467  const char *alt;
6468  char *p;
6469
6470  switch (*codep)
6471    {
6472    case 0xd8:
6473      alt = "vmrun";
6474      break;
6475    case 0xd9:
6476      alt = "vmmcall";
6477      break;
6478    case 0xda:
6479      alt = "vmload";
6480      break;
6481    case 0xdb:
6482      alt = "vmsave";
6483      break;
6484    case 0xdc:
6485      alt = "stgi";
6486      break;
6487    case 0xdd:
6488      alt = "clgi";
6489      break;
6490    case 0xde:
6491      alt = "skinit";
6492      break;
6493    case 0xdf:
6494      alt = "invlpga";
6495      break;
6496    default:
6497      OP_M (bytemode, sizeflag);
6498      return;
6499    }
6500  /* Override "lidt".  */
6501  p = obuf + strlen (obuf) - 4;
6502  /* We might have a suffix.  */
6503  if (*p == 'i')
6504    --p;
6505  strcpy (p, alt);
6506  if (!(prefixes & PREFIX_ADDR))
6507    {
6508      ++codep;
6509      return;
6510    }
6511  used_prefixes |= PREFIX_ADDR;
6512  switch (*codep++)
6513    {
6514    case 0xdf:
6515      strcpy (op_out[1], names32[1]);
6516      two_source_ops = 1;
6517          /* Fall through.  */
6518    case 0xd8:
6519    case 0xda:
6520    case 0xdb:
6521      *obufp++ = open_char;
6522      if (address_mode == mode_64bit || (sizeflag & AFLAG))
6523        alt = names32[0];
6524      else
6525        alt = names16[0];
6526      strcpy (obufp, alt);
6527      obufp += strlen (alt);
6528      *obufp++ = close_char;
6529      *obufp = '\0';
6530      break;
6531    }
6532}
6533
6534static void
6535INVLPG_Fixup (int bytemode, int sizeflag)
6536{
6537  const char *alt;
6538
6539  switch (*codep)
6540    {
6541    case 0xf8:
6542      alt = "swapgs";
6543      break;
6544    case 0xf9:
6545      alt = "rdtscp";
6546      break;
6547    default:
6548      OP_M (bytemode, sizeflag);
6549      return;
6550    }
6551  /* Override "invlpg".  */
6552  strcpy (obuf + strlen (obuf) - 6, alt);
6553  codep++;
6554}
6555
6556static void
6557BadOp (void)
6558{
6559  /* Throw away prefixes and 1st. opcode byte.  */
6560  codep = insn_codep + 1;
6561  oappend ("(bad)");
6562}
6563
6564static void
6565VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
6566{
6567  if (modrm.mod == 3
6568      && modrm.reg == 0
6569      && modrm.rm >=1
6570      && modrm.rm <= 4)
6571    {
6572      /* Override "sgdt".  */
6573      char *p = obuf + strlen (obuf) - 4;
6574
6575      /* We might have a suffix when disassembling with -Msuffix.  */
6576      if (*p == 'g')
6577        --p;
6578
6579      switch (modrm.rm)
6580        {
6581        case 1:
6582          strcpy (p, "vmcall");
6583          break;
6584        case 2:
6585          strcpy (p, "vmlaunch");
6586          break;
6587        case 3:
6588          strcpy (p, "vmresume");
6589          break;
6590        case 4:
6591          strcpy (p, "vmxoff");
6592          break;
6593        }
6594
6595      codep++;
6596    }
6597  else
6598    OP_E (0, sizeflag);
6599}
6600
6601static void
6602OP_VMX (int bytemode, int sizeflag)
6603{
6604  used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ));
6605  if (prefixes & PREFIX_DATA)
6606    strcpy (obuf, "vmclear");
6607  else if (prefixes & PREFIX_REPZ)
6608    strcpy (obuf, "vmxon");
6609  else
6610    strcpy (obuf, "vmptrld");
6611  OP_E (bytemode, sizeflag);
6612}
6613
6614static void
6615REP_Fixup (int bytemode, int sizeflag)
6616{
6617  /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6618     lods and stos.  */
6619  size_t ilen = 0;
6620
6621  if (prefixes & PREFIX_REPZ)
6622    switch (*insn_codep)
6623      {
6624      case 0x6e:        /* outsb */
6625      case 0x6f:        /* outsw/outsl */
6626      case 0xa4:        /* movsb */
6627      case 0xa5:        /* movsw/movsl/movsq */
6628        if (!intel_syntax)
6629          ilen = 5;
6630        else
6631          ilen = 4;
6632        break;
6633      case 0xaa:        /* stosb */
6634      case 0xab:        /* stosw/stosl/stosq */
6635      case 0xac:        /* lodsb */
6636      case 0xad:        /* lodsw/lodsl/lodsq */
6637        if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
6638          ilen = 5;
6639        else
6640          ilen = 4;
6641        break;
6642      case 0x6c:        /* insb */
6643      case 0x6d:        /* insl/insw */
6644        if (!intel_syntax)
6645          ilen = 4;
6646        else
6647          ilen = 3;
6648        break;
6649      default:
6650        abort ();
6651        break;
6652      }
6653
6654  if (ilen != 0)
6655    {
6656      size_t olen;
6657      char *p;
6658
6659      olen = strlen (obuf);
6660      p = obuf + olen - ilen - 1 - 4;
6661      /* Handle "repz [addr16|addr32]".  */
6662      if ((prefixes & PREFIX_ADDR))
6663        p -= 1 + 6;
6664
6665      memmove (p + 3, p + 4, olen - (p + 3 - obuf));
6666    }
6667
6668  switch (bytemode)
6669    {
6670    case al_reg:
6671    case eAX_reg:
6672    case indir_dx_reg:
6673      OP_IMREG (bytemode, sizeflag);
6674      break;
6675    case eDI_reg:
6676      OP_ESreg (bytemode, sizeflag);
6677      break;
6678    case eSI_reg:
6679      OP_DSreg (bytemode, sizeflag);
6680      break;
6681    default:
6682      abort ();
6683      break;
6684    }
6685}
6686
6687static void
6688CMPXCHG8B_Fixup (int bytemode, int sizeflag)
6689{
6690  USED_REX (REX_W);
6691  if (rex & REX_W)
6692    {
6693      /* Change cmpxchg8b to cmpxchg16b.  */
6694      char *p = obuf + strlen (obuf) - 2;
6695      strcpy (p, "16b");
6696      bytemode = o_mode;
6697    }
6698  OP_M (bytemode, sizeflag);
6699}
6700
6701static void
6702XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
6703{
6704  snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", reg);
6705  oappend (scratchbuf + intel_syntax);
6706}
6707
6708static void
6709CRC32_Fixup (int bytemode, int sizeflag)
6710{
6711  /* Add proper suffix to "crc32".  */
6712  char *p = obuf + strlen (obuf);
6713
6714  switch (bytemode)
6715    {
6716    case b_mode:
6717      if (intel_syntax)
6718        break;
6719
6720      *p++ = 'b';
6721      break;
6722    case v_mode:
6723      if (intel_syntax)
6724        break;
6725
6726      USED_REX (REX_W);
6727      if (rex & REX_W)
6728        *p++ = 'q';
6729      else if (sizeflag & DFLAG)
6730        *p++ = 'l';
6731      else
6732        *p++ = 'w';
6733      used_prefixes |= (prefixes & PREFIX_DATA);
6734      break;
6735    default:
6736      oappend (INTERNAL_DISASSEMBLER_ERROR);
6737      break;
6738    }
6739  *p = '\0';
6740
6741  if (modrm.mod == 3)
6742    {
6743      int add;
6744
6745      /* Skip mod/rm byte.  */
6746      MODRM_CHECK;
6747      codep++;
6748
6749      USED_REX (REX_B);
6750      add = (rex & REX_B) ? 8 : 0;
6751      if (bytemode == b_mode)
6752        {
6753          USED_REX (0);
6754          if (rex)
6755            oappend (names8rex[modrm.rm + add]);
6756          else
6757            oappend (names8[modrm.rm + add]);
6758        }
6759      else
6760        {
6761          USED_REX (REX_W);
6762          if (rex & REX_W)
6763            oappend (names64[modrm.rm + add]);
6764          else if ((prefixes & PREFIX_DATA))
6765            oappend (names16[modrm.rm + add]);
6766          else
6767            oappend (names32[modrm.rm + add]);
6768        }
6769    }
6770  else
6771    OP_E (bytemode, sizeflag);
6772}
6773