qemu/target/mips/msa_helper.c
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   1/*
   2 * MIPS SIMD Architecture Module Instruction emulation helpers for QEMU.
   3 *
   4 * Copyright (c) 2014 Imagination Technologies
   5 *
   6 * This library is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU Lesser General Public
   8 * License as published by the Free Software Foundation; either
   9 * version 2 of the License, or (at your option) any later version.
  10 *
  11 * This library is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14 * Lesser General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU Lesser General Public
  17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18 */
  19
  20#include "qemu/osdep.h"
  21#include "cpu.h"
  22#include "internal.h"
  23#include "exec/exec-all.h"
  24#include "exec/helper-proto.h"
  25
  26/* Data format min and max values */
  27#define DF_BITS(df) (1 << ((df) + 3))
  28
  29#define DF_MAX_INT(df)  (int64_t)((1LL << (DF_BITS(df) - 1)) - 1)
  30#define M_MAX_INT(m)    (int64_t)((1LL << ((m)         - 1)) - 1)
  31
  32#define DF_MIN_INT(df)  (int64_t)(-(1LL << (DF_BITS(df) - 1)))
  33#define M_MIN_INT(m)    (int64_t)(-(1LL << ((m)         - 1)))
  34
  35#define DF_MAX_UINT(df) (uint64_t)(-1ULL >> (64 - DF_BITS(df)))
  36#define M_MAX_UINT(m)   (uint64_t)(-1ULL >> (64 - (m)))
  37
  38#define UNSIGNED(x, df) ((x) & DF_MAX_UINT(df))
  39#define SIGNED(x, df)                                                   \
  40    ((((int64_t)x) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df)))
  41
  42/* Element-by-element access macros */
  43#define DF_ELEMENTS(df) (MSA_WRLEN / DF_BITS(df))
  44
  45static inline void msa_move_v(wr_t *pwd, wr_t *pws)
  46{
  47    uint32_t i;
  48
  49    for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
  50        pwd->d[i] = pws->d[i];
  51    }
  52}
  53
  54#define MSA_FN_IMM8(FUNC, DEST, OPERATION)                              \
  55void helper_msa_ ## FUNC(CPUMIPSState *env, uint32_t wd, uint32_t ws,   \
  56        uint32_t i8)                                                    \
  57{                                                                       \
  58    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);                          \
  59    wr_t *pws = &(env->active_fpu.fpr[ws].wr);                          \
  60    uint32_t i;                                                         \
  61    for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {                        \
  62        DEST = OPERATION;                                               \
  63    }                                                                   \
  64}
  65
  66MSA_FN_IMM8(andi_b, pwd->b[i], pws->b[i] & i8)
  67MSA_FN_IMM8(ori_b, pwd->b[i], pws->b[i] | i8)
  68MSA_FN_IMM8(nori_b, pwd->b[i], ~(pws->b[i] | i8))
  69MSA_FN_IMM8(xori_b, pwd->b[i], pws->b[i] ^ i8)
  70
  71#define BIT_MOVE_IF_NOT_ZERO(dest, arg1, arg2, df) \
  72            UNSIGNED(((dest & (~arg2)) | (arg1 & arg2)), df)
  73MSA_FN_IMM8(bmnzi_b, pwd->b[i],
  74        BIT_MOVE_IF_NOT_ZERO(pwd->b[i], pws->b[i], i8, DF_BYTE))
  75
  76#define BIT_MOVE_IF_ZERO(dest, arg1, arg2, df) \
  77            UNSIGNED((dest & arg2) | (arg1 & (~arg2)), df)
  78MSA_FN_IMM8(bmzi_b, pwd->b[i],
  79        BIT_MOVE_IF_ZERO(pwd->b[i], pws->b[i], i8, DF_BYTE))
  80
  81#define BIT_SELECT(dest, arg1, arg2, df) \
  82            UNSIGNED((arg1 & (~dest)) | (arg2 & dest), df)
  83MSA_FN_IMM8(bseli_b, pwd->b[i],
  84        BIT_SELECT(pwd->b[i], pws->b[i], i8, DF_BYTE))
  85
  86#undef MSA_FN_IMM8
  87
  88#define SHF_POS(i, imm) (((i) & 0xfc) + (((imm) >> (2 * ((i) & 0x03))) & 0x03))
  89
  90void helper_msa_shf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
  91                       uint32_t ws, uint32_t imm)
  92{
  93    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
  94    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
  95    wr_t wx, *pwx = &wx;
  96    uint32_t i;
  97
  98    switch (df) {
  99    case DF_BYTE:
 100        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
 101            pwx->b[i] = pws->b[SHF_POS(i, imm)];
 102        }
 103        break;
 104    case DF_HALF:
 105        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
 106            pwx->h[i] = pws->h[SHF_POS(i, imm)];
 107        }
 108        break;
 109    case DF_WORD:
 110        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
 111            pwx->w[i] = pws->w[SHF_POS(i, imm)];
 112        }
 113        break;
 114    default:
 115        assert(0);
 116    }
 117    msa_move_v(pwd, pwx);
 118}
 119
 120#define MSA_FN_VECTOR(FUNC, DEST, OPERATION)                            \
 121void helper_msa_ ## FUNC(CPUMIPSState *env, uint32_t wd, uint32_t ws,   \
 122        uint32_t wt)                                                    \
 123{                                                                       \
 124    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);                          \
 125    wr_t *pws = &(env->active_fpu.fpr[ws].wr);                          \
 126    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);                          \
 127    uint32_t i;                                                         \
 128    for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {                      \
 129        DEST = OPERATION;                                               \
 130    }                                                                   \
 131}
 132
 133MSA_FN_VECTOR(and_v, pwd->d[i], pws->d[i] & pwt->d[i])
 134MSA_FN_VECTOR(or_v, pwd->d[i], pws->d[i] | pwt->d[i])
 135MSA_FN_VECTOR(nor_v, pwd->d[i], ~(pws->d[i] | pwt->d[i]))
 136MSA_FN_VECTOR(xor_v, pwd->d[i], pws->d[i] ^ pwt->d[i])
 137MSA_FN_VECTOR(bmnz_v, pwd->d[i],
 138        BIT_MOVE_IF_NOT_ZERO(pwd->d[i], pws->d[i], pwt->d[i], DF_DOUBLE))
 139MSA_FN_VECTOR(bmz_v, pwd->d[i],
 140        BIT_MOVE_IF_ZERO(pwd->d[i], pws->d[i], pwt->d[i], DF_DOUBLE))
 141MSA_FN_VECTOR(bsel_v, pwd->d[i],
 142        BIT_SELECT(pwd->d[i], pws->d[i], pwt->d[i], DF_DOUBLE))
 143#undef BIT_MOVE_IF_NOT_ZERO
 144#undef BIT_MOVE_IF_ZERO
 145#undef BIT_SELECT
 146#undef MSA_FN_VECTOR
 147
 148static inline int64_t msa_addv_df(uint32_t df, int64_t arg1, int64_t arg2)
 149{
 150    return arg1 + arg2;
 151}
 152
 153static inline int64_t msa_subv_df(uint32_t df, int64_t arg1, int64_t arg2)
 154{
 155    return arg1 - arg2;
 156}
 157
 158static inline int64_t msa_ceq_df(uint32_t df, int64_t arg1, int64_t arg2)
 159{
 160    return arg1 == arg2 ? -1 : 0;
 161}
 162
 163static inline int64_t msa_cle_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 164{
 165    return arg1 <= arg2 ? -1 : 0;
 166}
 167
 168static inline int64_t msa_cle_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 169{
 170    uint64_t u_arg1 = UNSIGNED(arg1, df);
 171    uint64_t u_arg2 = UNSIGNED(arg2, df);
 172    return u_arg1 <= u_arg2 ? -1 : 0;
 173}
 174
 175static inline int64_t msa_clt_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 176{
 177    return arg1 < arg2 ? -1 : 0;
 178}
 179
 180static inline int64_t msa_clt_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 181{
 182    uint64_t u_arg1 = UNSIGNED(arg1, df);
 183    uint64_t u_arg2 = UNSIGNED(arg2, df);
 184    return u_arg1 < u_arg2 ? -1 : 0;
 185}
 186
 187static inline int64_t msa_max_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 188{
 189    return arg1 > arg2 ? arg1 : arg2;
 190}
 191
 192static inline int64_t msa_max_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 193{
 194    uint64_t u_arg1 = UNSIGNED(arg1, df);
 195    uint64_t u_arg2 = UNSIGNED(arg2, df);
 196    return u_arg1 > u_arg2 ? arg1 : arg2;
 197}
 198
 199static inline int64_t msa_min_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 200{
 201    return arg1 < arg2 ? arg1 : arg2;
 202}
 203
 204static inline int64_t msa_min_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 205{
 206    uint64_t u_arg1 = UNSIGNED(arg1, df);
 207    uint64_t u_arg2 = UNSIGNED(arg2, df);
 208    return u_arg1 < u_arg2 ? arg1 : arg2;
 209}
 210
 211#define MSA_BINOP_IMM_DF(helper, func)                                  \
 212void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df,       \
 213                        uint32_t wd, uint32_t ws, int32_t u5)           \
 214{                                                                       \
 215    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);                          \
 216    wr_t *pws = &(env->active_fpu.fpr[ws].wr);                          \
 217    uint32_t i;                                                         \
 218                                                                        \
 219    switch (df) {                                                       \
 220    case DF_BYTE:                                                       \
 221        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {                    \
 222            pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], u5);         \
 223        }                                                               \
 224        break;                                                          \
 225    case DF_HALF:                                                       \
 226        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {                    \
 227            pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], u5);         \
 228        }                                                               \
 229        break;                                                          \
 230    case DF_WORD:                                                       \
 231        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {                    \
 232            pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], u5);         \
 233        }                                                               \
 234        break;                                                          \
 235    case DF_DOUBLE:                                                     \
 236        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {                  \
 237            pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], u5);         \
 238        }                                                               \
 239        break;                                                          \
 240    default:                                                            \
 241        assert(0);                                                      \
 242    }                                                                   \
 243}
 244
 245MSA_BINOP_IMM_DF(addvi, addv)
 246MSA_BINOP_IMM_DF(subvi, subv)
 247MSA_BINOP_IMM_DF(ceqi, ceq)
 248MSA_BINOP_IMM_DF(clei_s, cle_s)
 249MSA_BINOP_IMM_DF(clei_u, cle_u)
 250MSA_BINOP_IMM_DF(clti_s, clt_s)
 251MSA_BINOP_IMM_DF(clti_u, clt_u)
 252MSA_BINOP_IMM_DF(maxi_s, max_s)
 253MSA_BINOP_IMM_DF(maxi_u, max_u)
 254MSA_BINOP_IMM_DF(mini_s, min_s)
 255MSA_BINOP_IMM_DF(mini_u, min_u)
 256#undef MSA_BINOP_IMM_DF
 257
 258void helper_msa_ldi_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
 259                       int32_t s10)
 260{
 261    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
 262    uint32_t i;
 263
 264    switch (df) {
 265    case DF_BYTE:
 266        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
 267            pwd->b[i] = (int8_t)s10;
 268        }
 269        break;
 270    case DF_HALF:
 271        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
 272            pwd->h[i] = (int16_t)s10;
 273        }
 274        break;
 275    case DF_WORD:
 276        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
 277            pwd->w[i] = (int32_t)s10;
 278        }
 279        break;
 280    case DF_DOUBLE:
 281        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
 282            pwd->d[i] = (int64_t)s10;
 283        }
 284       break;
 285    default:
 286        assert(0);
 287    }
 288}
 289
 290/* Data format bit position and unsigned values */
 291#define BIT_POSITION(x, df) ((uint64_t)(x) % DF_BITS(df))
 292
 293static inline int64_t msa_sll_df(uint32_t df, int64_t arg1, int64_t arg2)
 294{
 295    int32_t b_arg2 = BIT_POSITION(arg2, df);
 296    return arg1 << b_arg2;
 297}
 298
 299static inline int64_t msa_sra_df(uint32_t df, int64_t arg1, int64_t arg2)
 300{
 301    int32_t b_arg2 = BIT_POSITION(arg2, df);
 302    return arg1 >> b_arg2;
 303}
 304
 305static inline int64_t msa_srl_df(uint32_t df, int64_t arg1, int64_t arg2)
 306{
 307    uint64_t u_arg1 = UNSIGNED(arg1, df);
 308    int32_t b_arg2 = BIT_POSITION(arg2, df);
 309    return u_arg1 >> b_arg2;
 310}
 311
 312static inline int64_t msa_bclr_df(uint32_t df, int64_t arg1, int64_t arg2)
 313{
 314    int32_t b_arg2 = BIT_POSITION(arg2, df);
 315    return UNSIGNED(arg1 & (~(1LL << b_arg2)), df);
 316}
 317
 318static inline int64_t msa_bset_df(uint32_t df, int64_t arg1,
 319        int64_t arg2)
 320{
 321    int32_t b_arg2 = BIT_POSITION(arg2, df);
 322    return UNSIGNED(arg1 | (1LL << b_arg2), df);
 323}
 324
 325static inline int64_t msa_bneg_df(uint32_t df, int64_t arg1, int64_t arg2)
 326{
 327    int32_t b_arg2 = BIT_POSITION(arg2, df);
 328    return UNSIGNED(arg1 ^ (1LL << b_arg2), df);
 329}
 330
 331static inline int64_t msa_binsl_df(uint32_t df, int64_t dest, int64_t arg1,
 332                                   int64_t arg2)
 333{
 334    uint64_t u_arg1 = UNSIGNED(arg1, df);
 335    uint64_t u_dest = UNSIGNED(dest, df);
 336    int32_t sh_d = BIT_POSITION(arg2, df) + 1;
 337    int32_t sh_a = DF_BITS(df) - sh_d;
 338    if (sh_d == DF_BITS(df)) {
 339        return u_arg1;
 340    } else {
 341        return UNSIGNED(UNSIGNED(u_dest << sh_d, df) >> sh_d, df) |
 342               UNSIGNED(UNSIGNED(u_arg1 >> sh_a, df) << sh_a, df);
 343    }
 344}
 345
 346static inline int64_t msa_binsr_df(uint32_t df, int64_t dest, int64_t arg1,
 347                                   int64_t arg2)
 348{
 349    uint64_t u_arg1 = UNSIGNED(arg1, df);
 350    uint64_t u_dest = UNSIGNED(dest, df);
 351    int32_t sh_d = BIT_POSITION(arg2, df) + 1;
 352    int32_t sh_a = DF_BITS(df) - sh_d;
 353    if (sh_d == DF_BITS(df)) {
 354        return u_arg1;
 355    } else {
 356        return UNSIGNED(UNSIGNED(u_dest >> sh_d, df) << sh_d, df) |
 357               UNSIGNED(UNSIGNED(u_arg1 << sh_a, df) >> sh_a, df);
 358    }
 359}
 360
 361static inline int64_t msa_sat_s_df(uint32_t df, int64_t arg, uint32_t m)
 362{
 363    return arg < M_MIN_INT(m+1) ? M_MIN_INT(m+1) :
 364                                  arg > M_MAX_INT(m+1) ? M_MAX_INT(m+1) :
 365                                                         arg;
 366}
 367
 368static inline int64_t msa_sat_u_df(uint32_t df, int64_t arg, uint32_t m)
 369{
 370    uint64_t u_arg = UNSIGNED(arg, df);
 371    return  u_arg < M_MAX_UINT(m+1) ? u_arg :
 372                                      M_MAX_UINT(m+1);
 373}
 374
 375static inline int64_t msa_srar_df(uint32_t df, int64_t arg1, int64_t arg2)
 376{
 377    int32_t b_arg2 = BIT_POSITION(arg2, df);
 378    if (b_arg2 == 0) {
 379        return arg1;
 380    } else {
 381        int64_t r_bit = (arg1 >> (b_arg2 - 1)) & 1;
 382        return (arg1 >> b_arg2) + r_bit;
 383    }
 384}
 385
 386static inline int64_t msa_srlr_df(uint32_t df, int64_t arg1, int64_t arg2)
 387{
 388    uint64_t u_arg1 = UNSIGNED(arg1, df);
 389    int32_t b_arg2 = BIT_POSITION(arg2, df);
 390    if (b_arg2 == 0) {
 391        return u_arg1;
 392    } else {
 393        uint64_t r_bit = (u_arg1 >> (b_arg2 - 1)) & 1;
 394        return (u_arg1 >> b_arg2) + r_bit;
 395    }
 396}
 397
 398#define MSA_BINOP_IMMU_DF(helper, func)                                  \
 399void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, uint32_t wd, \
 400                       uint32_t ws, uint32_t u5)                        \
 401{                                                                       \
 402    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);                          \
 403    wr_t *pws = &(env->active_fpu.fpr[ws].wr);                          \
 404    uint32_t i;                                                         \
 405                                                                        \
 406    switch (df) {                                                       \
 407    case DF_BYTE:                                                       \
 408        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {                    \
 409            pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], u5);         \
 410        }                                                               \
 411        break;                                                          \
 412    case DF_HALF:                                                       \
 413        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {                    \
 414            pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], u5);         \
 415        }                                                               \
 416        break;                                                          \
 417    case DF_WORD:                                                       \
 418        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {                    \
 419            pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], u5);         \
 420        }                                                               \
 421        break;                                                          \
 422    case DF_DOUBLE:                                                     \
 423        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {                  \
 424            pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], u5);         \
 425        }                                                               \
 426        break;                                                          \
 427    default:                                                            \
 428        assert(0);                                                      \
 429    }                                                                   \
 430}
 431
 432MSA_BINOP_IMMU_DF(slli, sll)
 433MSA_BINOP_IMMU_DF(srai, sra)
 434MSA_BINOP_IMMU_DF(srli, srl)
 435MSA_BINOP_IMMU_DF(bclri, bclr)
 436MSA_BINOP_IMMU_DF(bseti, bset)
 437MSA_BINOP_IMMU_DF(bnegi, bneg)
 438MSA_BINOP_IMMU_DF(sat_s, sat_s)
 439MSA_BINOP_IMMU_DF(sat_u, sat_u)
 440MSA_BINOP_IMMU_DF(srari, srar)
 441MSA_BINOP_IMMU_DF(srlri, srlr)
 442#undef MSA_BINOP_IMMU_DF
 443
 444#define MSA_TEROP_IMMU_DF(helper, func)                                  \
 445void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df,       \
 446                                  uint32_t wd, uint32_t ws, uint32_t u5) \
 447{                                                                       \
 448    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);                          \
 449    wr_t *pws = &(env->active_fpu.fpr[ws].wr);                          \
 450    uint32_t i;                                                         \
 451                                                                        \
 452    switch (df) {                                                       \
 453    case DF_BYTE:                                                       \
 454        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {                    \
 455            pwd->b[i] = msa_ ## func ## _df(df, pwd->b[i], pws->b[i],   \
 456                                            u5);                        \
 457        }                                                               \
 458        break;                                                          \
 459    case DF_HALF:                                                       \
 460        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {                    \
 461            pwd->h[i] = msa_ ## func ## _df(df, pwd->h[i], pws->h[i],   \
 462                                            u5);                        \
 463        }                                                               \
 464        break;                                                          \
 465    case DF_WORD:                                                       \
 466        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {                    \
 467            pwd->w[i] = msa_ ## func ## _df(df, pwd->w[i], pws->w[i],   \
 468                                            u5);                        \
 469        }                                                               \
 470        break;                                                          \
 471    case DF_DOUBLE:                                                     \
 472        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {                  \
 473            pwd->d[i] = msa_ ## func ## _df(df, pwd->d[i], pws->d[i],   \
 474                                            u5);                        \
 475        }                                                               \
 476        break;                                                          \
 477    default:                                                            \
 478        assert(0);                                                      \
 479    }                                                                   \
 480}
 481
 482MSA_TEROP_IMMU_DF(binsli, binsl)
 483MSA_TEROP_IMMU_DF(binsri, binsr)
 484#undef MSA_TEROP_IMMU_DF
 485
 486static inline int64_t msa_max_a_df(uint32_t df, int64_t arg1, int64_t arg2)
 487{
 488    uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
 489    uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
 490    return abs_arg1 > abs_arg2 ? arg1 : arg2;
 491}
 492
 493static inline int64_t msa_min_a_df(uint32_t df, int64_t arg1, int64_t arg2)
 494{
 495    uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
 496    uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
 497    return abs_arg1 < abs_arg2 ? arg1 : arg2;
 498}
 499
 500static inline int64_t msa_add_a_df(uint32_t df, int64_t arg1, int64_t arg2)
 501{
 502    uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
 503    uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
 504    return abs_arg1 + abs_arg2;
 505}
 506
 507static inline int64_t msa_adds_a_df(uint32_t df, int64_t arg1, int64_t arg2)
 508{
 509    uint64_t max_int = (uint64_t)DF_MAX_INT(df);
 510    uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
 511    uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
 512    if (abs_arg1 > max_int || abs_arg2 > max_int) {
 513        return (int64_t)max_int;
 514    } else {
 515        return (abs_arg1 < max_int - abs_arg2) ? abs_arg1 + abs_arg2 : max_int;
 516    }
 517}
 518
 519static inline int64_t msa_adds_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 520{
 521    int64_t max_int = DF_MAX_INT(df);
 522    int64_t min_int = DF_MIN_INT(df);
 523    if (arg1 < 0) {
 524        return (min_int - arg1 < arg2) ? arg1 + arg2 : min_int;
 525    } else {
 526        return (arg2 < max_int - arg1) ? arg1 + arg2 : max_int;
 527    }
 528}
 529
 530static inline uint64_t msa_adds_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
 531{
 532    uint64_t max_uint = DF_MAX_UINT(df);
 533    uint64_t u_arg1 = UNSIGNED(arg1, df);
 534    uint64_t u_arg2 = UNSIGNED(arg2, df);
 535    return (u_arg1 < max_uint - u_arg2) ? u_arg1 + u_arg2 : max_uint;
 536}
 537
 538static inline int64_t msa_ave_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 539{
 540    /* signed shift */
 541    return (arg1 >> 1) + (arg2 >> 1) + (arg1 & arg2 & 1);
 542}
 543
 544static inline uint64_t msa_ave_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
 545{
 546    uint64_t u_arg1 = UNSIGNED(arg1, df);
 547    uint64_t u_arg2 = UNSIGNED(arg2, df);
 548    /* unsigned shift */
 549    return (u_arg1 >> 1) + (u_arg2 >> 1) + (u_arg1 & u_arg2 & 1);
 550}
 551
 552static inline int64_t msa_aver_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 553{
 554    /* signed shift */
 555    return (arg1 >> 1) + (arg2 >> 1) + ((arg1 | arg2) & 1);
 556}
 557
 558static inline uint64_t msa_aver_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
 559{
 560    uint64_t u_arg1 = UNSIGNED(arg1, df);
 561    uint64_t u_arg2 = UNSIGNED(arg2, df);
 562    /* unsigned shift */
 563    return (u_arg1 >> 1) + (u_arg2 >> 1) + ((u_arg1 | u_arg2) & 1);
 564}
 565
 566static inline int64_t msa_subs_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 567{
 568    int64_t max_int = DF_MAX_INT(df);
 569    int64_t min_int = DF_MIN_INT(df);
 570    if (arg2 > 0) {
 571        return (min_int + arg2 < arg1) ? arg1 - arg2 : min_int;
 572    } else {
 573        return (arg1 < max_int + arg2) ? arg1 - arg2 : max_int;
 574    }
 575}
 576
 577static inline int64_t msa_subs_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 578{
 579    uint64_t u_arg1 = UNSIGNED(arg1, df);
 580    uint64_t u_arg2 = UNSIGNED(arg2, df);
 581    return (u_arg1 > u_arg2) ? u_arg1 - u_arg2 : 0;
 582}
 583
 584static inline int64_t msa_subsus_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 585{
 586    uint64_t u_arg1 = UNSIGNED(arg1, df);
 587    uint64_t max_uint = DF_MAX_UINT(df);
 588    if (arg2 >= 0) {
 589        uint64_t u_arg2 = (uint64_t)arg2;
 590        return (u_arg1 > u_arg2) ?
 591            (int64_t)(u_arg1 - u_arg2) :
 592            0;
 593    } else {
 594        uint64_t u_arg2 = (uint64_t)(-arg2);
 595        return (u_arg1 < max_uint - u_arg2) ?
 596            (int64_t)(u_arg1 + u_arg2) :
 597            (int64_t)max_uint;
 598    }
 599}
 600
 601static inline int64_t msa_subsuu_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 602{
 603    uint64_t u_arg1 = UNSIGNED(arg1, df);
 604    uint64_t u_arg2 = UNSIGNED(arg2, df);
 605    int64_t max_int = DF_MAX_INT(df);
 606    int64_t min_int = DF_MIN_INT(df);
 607    if (u_arg1 > u_arg2) {
 608        return u_arg1 - u_arg2 < (uint64_t)max_int ?
 609            (int64_t)(u_arg1 - u_arg2) :
 610            max_int;
 611    } else {
 612        return u_arg2 - u_arg1 < (uint64_t)(-min_int) ?
 613            (int64_t)(u_arg1 - u_arg2) :
 614            min_int;
 615    }
 616}
 617
 618static inline int64_t msa_asub_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 619{
 620    /* signed compare */
 621    return (arg1 < arg2) ?
 622        (uint64_t)(arg2 - arg1) : (uint64_t)(arg1 - arg2);
 623}
 624
 625static inline uint64_t msa_asub_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
 626{
 627    uint64_t u_arg1 = UNSIGNED(arg1, df);
 628    uint64_t u_arg2 = UNSIGNED(arg2, df);
 629    /* unsigned compare */
 630    return (u_arg1 < u_arg2) ?
 631        (uint64_t)(u_arg2 - u_arg1) : (uint64_t)(u_arg1 - u_arg2);
 632}
 633
 634static inline int64_t msa_mulv_df(uint32_t df, int64_t arg1, int64_t arg2)
 635{
 636    return arg1 * arg2;
 637}
 638
 639static inline int64_t msa_div_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 640{
 641    if (arg1 == DF_MIN_INT(df) && arg2 == -1) {
 642        return DF_MIN_INT(df);
 643    }
 644    return arg2 ? arg1 / arg2 : 0;
 645}
 646
 647static inline int64_t msa_div_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 648{
 649    uint64_t u_arg1 = UNSIGNED(arg1, df);
 650    uint64_t u_arg2 = UNSIGNED(arg2, df);
 651    return u_arg2 ? u_arg1 / u_arg2 : 0;
 652}
 653
 654static inline int64_t msa_mod_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 655{
 656    if (arg1 == DF_MIN_INT(df) && arg2 == -1) {
 657        return 0;
 658    }
 659    return arg2 ? arg1 % arg2 : 0;
 660}
 661
 662static inline int64_t msa_mod_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 663{
 664    uint64_t u_arg1 = UNSIGNED(arg1, df);
 665    uint64_t u_arg2 = UNSIGNED(arg2, df);
 666    return u_arg2 ? u_arg1 % u_arg2 : 0;
 667}
 668
 669#define SIGNED_EVEN(a, df) \
 670        ((((int64_t)(a)) << (64 - DF_BITS(df)/2)) >> (64 - DF_BITS(df)/2))
 671
 672#define UNSIGNED_EVEN(a, df) \
 673        ((((uint64_t)(a)) << (64 - DF_BITS(df)/2)) >> (64 - DF_BITS(df)/2))
 674
 675#define SIGNED_ODD(a, df) \
 676        ((((int64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df)/2))
 677
 678#define UNSIGNED_ODD(a, df) \
 679        ((((uint64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df)/2))
 680
 681#define SIGNED_EXTRACT(e, o, a, df)     \
 682    do {                                \
 683        e = SIGNED_EVEN(a, df);         \
 684        o = SIGNED_ODD(a, df);          \
 685    } while (0)
 686
 687#define UNSIGNED_EXTRACT(e, o, a, df)   \
 688    do {                                \
 689        e = UNSIGNED_EVEN(a, df);       \
 690        o = UNSIGNED_ODD(a, df);        \
 691    } while (0)
 692
 693static inline int64_t msa_dotp_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 694{
 695    int64_t even_arg1;
 696    int64_t even_arg2;
 697    int64_t odd_arg1;
 698    int64_t odd_arg2;
 699    SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
 700    SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
 701    return (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
 702}
 703
 704static inline int64_t msa_dotp_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 705{
 706    int64_t even_arg1;
 707    int64_t even_arg2;
 708    int64_t odd_arg1;
 709    int64_t odd_arg2;
 710    UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
 711    UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
 712    return (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
 713}
 714
 715#define CONCATENATE_AND_SLIDE(s, k)             \
 716    do {                                        \
 717        for (i = 0; i < s; i++) {               \
 718            v[i]     = pws->b[s * k + i];       \
 719            v[i + s] = pwd->b[s * k + i];       \
 720        }                                       \
 721        for (i = 0; i < s; i++) {               \
 722            pwd->b[s * k + i] = v[i + n];       \
 723        }                                       \
 724    } while (0)
 725
 726static inline void msa_sld_df(uint32_t df, wr_t *pwd,
 727                              wr_t *pws, target_ulong rt)
 728{
 729    uint32_t n = rt % DF_ELEMENTS(df);
 730    uint8_t v[64];
 731    uint32_t i, k;
 732
 733    switch (df) {
 734    case DF_BYTE:
 735        CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_BYTE), 0);
 736        break;
 737    case DF_HALF:
 738        for (k = 0; k < 2; k++) {
 739            CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_HALF), k);
 740        }
 741        break;
 742    case DF_WORD:
 743        for (k = 0; k < 4; k++) {
 744            CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_WORD), k);
 745        }
 746        break;
 747    case DF_DOUBLE:
 748        for (k = 0; k < 8; k++) {
 749            CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_DOUBLE), k);
 750        }
 751        break;
 752    default:
 753        assert(0);
 754    }
 755}
 756
 757static inline int64_t msa_hadd_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 758{
 759    return SIGNED_ODD(arg1, df) + SIGNED_EVEN(arg2, df);
 760}
 761
 762static inline int64_t msa_hadd_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 763{
 764    return UNSIGNED_ODD(arg1, df) + UNSIGNED_EVEN(arg2, df);
 765}
 766
 767static inline int64_t msa_hsub_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 768{
 769    return SIGNED_ODD(arg1, df) - SIGNED_EVEN(arg2, df);
 770}
 771
 772static inline int64_t msa_hsub_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 773{
 774    return UNSIGNED_ODD(arg1, df) - UNSIGNED_EVEN(arg2, df);
 775}
 776
 777static inline int64_t msa_mul_q_df(uint32_t df, int64_t arg1, int64_t arg2)
 778{
 779    int64_t q_min = DF_MIN_INT(df);
 780    int64_t q_max = DF_MAX_INT(df);
 781
 782    if (arg1 == q_min && arg2 == q_min) {
 783        return q_max;
 784    }
 785    return (arg1 * arg2) >> (DF_BITS(df) - 1);
 786}
 787
 788static inline int64_t msa_mulr_q_df(uint32_t df, int64_t arg1, int64_t arg2)
 789{
 790    int64_t q_min = DF_MIN_INT(df);
 791    int64_t q_max = DF_MAX_INT(df);
 792    int64_t r_bit = 1 << (DF_BITS(df) - 2);
 793
 794    if (arg1 == q_min && arg2 == q_min) {
 795        return q_max;
 796    }
 797    return (arg1 * arg2 + r_bit) >> (DF_BITS(df) - 1);
 798}
 799
 800#define MSA_BINOP_DF(func) \
 801void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df,         \
 802                                uint32_t wd, uint32_t ws, uint32_t wt)  \
 803{                                                                       \
 804    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);                          \
 805    wr_t *pws = &(env->active_fpu.fpr[ws].wr);                          \
 806    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);                          \
 807    uint32_t i;                                                         \
 808                                                                        \
 809    switch (df) {                                                       \
 810    case DF_BYTE:                                                       \
 811        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {                    \
 812            pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], pwt->b[i]);  \
 813        }                                                               \
 814        break;                                                          \
 815    case DF_HALF:                                                       \
 816        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {                    \
 817            pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], pwt->h[i]);  \
 818        }                                                               \
 819        break;                                                          \
 820    case DF_WORD:                                                       \
 821        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {                    \
 822            pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], pwt->w[i]);  \
 823        }                                                               \
 824        break;                                                          \
 825    case DF_DOUBLE:                                                     \
 826        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {                  \
 827            pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], pwt->d[i]);  \
 828        }                                                               \
 829        break;                                                          \
 830    default:                                                            \
 831        assert(0);                                                      \
 832    }                                                                   \
 833}
 834
 835MSA_BINOP_DF(sll)
 836MSA_BINOP_DF(sra)
 837MSA_BINOP_DF(srl)
 838MSA_BINOP_DF(bclr)
 839MSA_BINOP_DF(bset)
 840MSA_BINOP_DF(bneg)
 841MSA_BINOP_DF(addv)
 842MSA_BINOP_DF(subv)
 843MSA_BINOP_DF(max_s)
 844MSA_BINOP_DF(max_u)
 845MSA_BINOP_DF(min_s)
 846MSA_BINOP_DF(min_u)
 847MSA_BINOP_DF(max_a)
 848MSA_BINOP_DF(min_a)
 849MSA_BINOP_DF(ceq)
 850MSA_BINOP_DF(clt_s)
 851MSA_BINOP_DF(clt_u)
 852MSA_BINOP_DF(cle_s)
 853MSA_BINOP_DF(cle_u)
 854MSA_BINOP_DF(add_a)
 855MSA_BINOP_DF(adds_a)
 856MSA_BINOP_DF(adds_s)
 857MSA_BINOP_DF(adds_u)
 858MSA_BINOP_DF(ave_s)
 859MSA_BINOP_DF(ave_u)
 860MSA_BINOP_DF(aver_s)
 861MSA_BINOP_DF(aver_u)
 862MSA_BINOP_DF(subs_s)
 863MSA_BINOP_DF(subs_u)
 864MSA_BINOP_DF(subsus_u)
 865MSA_BINOP_DF(subsuu_s)
 866MSA_BINOP_DF(asub_s)
 867MSA_BINOP_DF(asub_u)
 868MSA_BINOP_DF(mulv)
 869MSA_BINOP_DF(div_s)
 870MSA_BINOP_DF(div_u)
 871MSA_BINOP_DF(mod_s)
 872MSA_BINOP_DF(mod_u)
 873MSA_BINOP_DF(dotp_s)
 874MSA_BINOP_DF(dotp_u)
 875MSA_BINOP_DF(srar)
 876MSA_BINOP_DF(srlr)
 877MSA_BINOP_DF(hadd_s)
 878MSA_BINOP_DF(hadd_u)
 879MSA_BINOP_DF(hsub_s)
 880MSA_BINOP_DF(hsub_u)
 881
 882MSA_BINOP_DF(mul_q)
 883MSA_BINOP_DF(mulr_q)
 884#undef MSA_BINOP_DF
 885
 886void helper_msa_sld_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
 887                       uint32_t ws, uint32_t rt)
 888{
 889    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
 890    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
 891
 892    msa_sld_df(df, pwd, pws, env->active_tc.gpr[rt]);
 893}
 894
 895static inline int64_t msa_maddv_df(uint32_t df, int64_t dest, int64_t arg1,
 896                                   int64_t arg2)
 897{
 898    return dest + arg1 * arg2;
 899}
 900
 901static inline int64_t msa_msubv_df(uint32_t df, int64_t dest, int64_t arg1,
 902                                   int64_t arg2)
 903{
 904    return dest - arg1 * arg2;
 905}
 906
 907static inline int64_t msa_dpadd_s_df(uint32_t df, int64_t dest, int64_t arg1,
 908                                     int64_t arg2)
 909{
 910    int64_t even_arg1;
 911    int64_t even_arg2;
 912    int64_t odd_arg1;
 913    int64_t odd_arg2;
 914    SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
 915    SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
 916    return dest + (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
 917}
 918
 919static inline int64_t msa_dpadd_u_df(uint32_t df, int64_t dest, int64_t arg1,
 920                                     int64_t arg2)
 921{
 922    int64_t even_arg1;
 923    int64_t even_arg2;
 924    int64_t odd_arg1;
 925    int64_t odd_arg2;
 926    UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
 927    UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
 928    return dest + (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
 929}
 930
 931static inline int64_t msa_dpsub_s_df(uint32_t df, int64_t dest, int64_t arg1,
 932                                     int64_t arg2)
 933{
 934    int64_t even_arg1;
 935    int64_t even_arg2;
 936    int64_t odd_arg1;
 937    int64_t odd_arg2;
 938    SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
 939    SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
 940    return dest - ((even_arg1 * even_arg2) + (odd_arg1 * odd_arg2));
 941}
 942
 943static inline int64_t msa_dpsub_u_df(uint32_t df, int64_t dest, int64_t arg1,
 944                                     int64_t arg2)
 945{
 946    int64_t even_arg1;
 947    int64_t even_arg2;
 948    int64_t odd_arg1;
 949    int64_t odd_arg2;
 950    UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
 951    UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
 952    return dest - ((even_arg1 * even_arg2) + (odd_arg1 * odd_arg2));
 953}
 954
 955static inline int64_t msa_madd_q_df(uint32_t df, int64_t dest, int64_t arg1,
 956                                    int64_t arg2)
 957{
 958    int64_t q_prod, q_ret;
 959
 960    int64_t q_max = DF_MAX_INT(df);
 961    int64_t q_min = DF_MIN_INT(df);
 962
 963    q_prod = arg1 * arg2;
 964    q_ret = ((dest << (DF_BITS(df) - 1)) + q_prod) >> (DF_BITS(df) - 1);
 965
 966    return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
 967}
 968
 969static inline int64_t msa_msub_q_df(uint32_t df, int64_t dest, int64_t arg1,
 970                                    int64_t arg2)
 971{
 972    int64_t q_prod, q_ret;
 973
 974    int64_t q_max = DF_MAX_INT(df);
 975    int64_t q_min = DF_MIN_INT(df);
 976
 977    q_prod = arg1 * arg2;
 978    q_ret = ((dest << (DF_BITS(df) - 1)) - q_prod) >> (DF_BITS(df) - 1);
 979
 980    return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
 981}
 982
 983static inline int64_t msa_maddr_q_df(uint32_t df, int64_t dest, int64_t arg1,
 984                                     int64_t arg2)
 985{
 986    int64_t q_prod, q_ret;
 987
 988    int64_t q_max = DF_MAX_INT(df);
 989    int64_t q_min = DF_MIN_INT(df);
 990    int64_t r_bit = 1 << (DF_BITS(df) - 2);
 991
 992    q_prod = arg1 * arg2;
 993    q_ret = ((dest << (DF_BITS(df) - 1)) + q_prod + r_bit) >> (DF_BITS(df) - 1);
 994
 995    return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
 996}
 997
 998static inline int64_t msa_msubr_q_df(uint32_t df, int64_t dest, int64_t arg1,
 999                                     int64_t arg2)
1000{
1001    int64_t q_prod, q_ret;
1002
1003    int64_t q_max = DF_MAX_INT(df);
1004    int64_t q_min = DF_MIN_INT(df);
1005    int64_t r_bit = 1 << (DF_BITS(df) - 2);
1006
1007    q_prod = arg1 * arg2;
1008    q_ret = ((dest << (DF_BITS(df) - 1)) - q_prod + r_bit) >> (DF_BITS(df) - 1);
1009
1010    return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
1011}
1012
1013#define MSA_TEROP_DF(func) \
1014void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, uint32_t wd,   \
1015                          uint32_t ws, uint32_t wt)                     \
1016{                                                                       \
1017    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);                          \
1018    wr_t *pws = &(env->active_fpu.fpr[ws].wr);                          \
1019    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);                          \
1020    uint32_t i;                                                         \
1021                                                                        \
1022    switch (df) {                                                       \
1023    case DF_BYTE:                                                       \
1024        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {                    \
1025            pwd->b[i] = msa_ ## func ## _df(df, pwd->b[i], pws->b[i],   \
1026                                            pwt->b[i]);                 \
1027        }                                                               \
1028        break;                                                          \
1029    case DF_HALF:                                                       \
1030        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {                    \
1031            pwd->h[i] = msa_ ## func ## _df(df, pwd->h[i], pws->h[i],   \
1032                                            pwt->h[i]);                 \
1033        }                                                               \
1034        break;                                                          \
1035    case DF_WORD:                                                       \
1036        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {                    \
1037            pwd->w[i] = msa_ ## func ## _df(df, pwd->w[i], pws->w[i],   \
1038                                            pwt->w[i]);                 \
1039        }                                                               \
1040        break;                                                          \
1041    case DF_DOUBLE:                                                     \
1042        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {                  \
1043            pwd->d[i] = msa_ ## func ## _df(df, pwd->d[i], pws->d[i],   \
1044                                            pwt->d[i]);                 \
1045        }                                                               \
1046        break;                                                          \
1047    default:                                                            \
1048        assert(0);                                                      \
1049    }                                                                   \
1050}
1051
1052MSA_TEROP_DF(maddv)
1053MSA_TEROP_DF(msubv)
1054MSA_TEROP_DF(dpadd_s)
1055MSA_TEROP_DF(dpadd_u)
1056MSA_TEROP_DF(dpsub_s)
1057MSA_TEROP_DF(dpsub_u)
1058MSA_TEROP_DF(binsl)
1059MSA_TEROP_DF(binsr)
1060MSA_TEROP_DF(madd_q)
1061MSA_TEROP_DF(msub_q)
1062MSA_TEROP_DF(maddr_q)
1063MSA_TEROP_DF(msubr_q)
1064#undef MSA_TEROP_DF
1065
1066static inline void msa_splat_df(uint32_t df, wr_t *pwd,
1067                                wr_t *pws, target_ulong rt)
1068{
1069    uint32_t n = rt % DF_ELEMENTS(df);
1070    uint32_t i;
1071
1072    switch (df) {
1073    case DF_BYTE:
1074        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
1075            pwd->b[i] = pws->b[n];
1076        }
1077        break;
1078    case DF_HALF:
1079        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
1080            pwd->h[i] = pws->h[n];
1081        }
1082        break;
1083    case DF_WORD:
1084        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
1085            pwd->w[i] = pws->w[n];
1086        }
1087        break;
1088    case DF_DOUBLE:
1089        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
1090            pwd->d[i] = pws->d[n];
1091        }
1092       break;
1093    default:
1094        assert(0);
1095    }
1096}
1097
1098void helper_msa_splat_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
1099                         uint32_t ws, uint32_t rt)
1100{
1101    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1102    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1103
1104    msa_splat_df(df, pwd, pws, env->active_tc.gpr[rt]);
1105}
1106
1107#define MSA_DO_B MSA_DO(b)
1108#define MSA_DO_H MSA_DO(h)
1109#define MSA_DO_W MSA_DO(w)
1110#define MSA_DO_D MSA_DO(d)
1111
1112#define MSA_LOOP_B MSA_LOOP(B)
1113#define MSA_LOOP_H MSA_LOOP(H)
1114#define MSA_LOOP_W MSA_LOOP(W)
1115#define MSA_LOOP_D MSA_LOOP(D)
1116
1117#define MSA_LOOP_COND_B MSA_LOOP_COND(DF_BYTE)
1118#define MSA_LOOP_COND_H MSA_LOOP_COND(DF_HALF)
1119#define MSA_LOOP_COND_W MSA_LOOP_COND(DF_WORD)
1120#define MSA_LOOP_COND_D MSA_LOOP_COND(DF_DOUBLE)
1121
1122#define MSA_LOOP(DF) \
1123    do { \
1124        for (i = 0; i < (MSA_LOOP_COND_ ## DF) ; i++) { \
1125            MSA_DO_ ## DF; \
1126        } \
1127    } while (0)
1128
1129#define MSA_FN_DF(FUNC)                                             \
1130void helper_msa_##FUNC(CPUMIPSState *env, uint32_t df, uint32_t wd, \
1131        uint32_t ws, uint32_t wt)                                   \
1132{                                                                   \
1133    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);                      \
1134    wr_t *pws = &(env->active_fpu.fpr[ws].wr);                      \
1135    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);                      \
1136    wr_t wx, *pwx = &wx;                                            \
1137    uint32_t i;                                                     \
1138    switch (df) {                                                   \
1139    case DF_BYTE:                                                   \
1140        MSA_LOOP_B;                                                 \
1141        break;                                                      \
1142    case DF_HALF:                                                   \
1143        MSA_LOOP_H;                                                 \
1144        break;                                                      \
1145    case DF_WORD:                                                   \
1146        MSA_LOOP_W;                                                 \
1147        break;                                                      \
1148    case DF_DOUBLE:                                                 \
1149        MSA_LOOP_D;                                                 \
1150        break;                                                      \
1151    default:                                                        \
1152        assert(0);                                                  \
1153    }                                                               \
1154    msa_move_v(pwd, pwx);                                           \
1155}
1156
1157#define MSA_LOOP_COND(DF) \
1158            (DF_ELEMENTS(DF) / 2)
1159
1160#define Rb(pwr, i) (pwr->b[i])
1161#define Lb(pwr, i) (pwr->b[i + DF_ELEMENTS(DF_BYTE)/2])
1162#define Rh(pwr, i) (pwr->h[i])
1163#define Lh(pwr, i) (pwr->h[i + DF_ELEMENTS(DF_HALF)/2])
1164#define Rw(pwr, i) (pwr->w[i])
1165#define Lw(pwr, i) (pwr->w[i + DF_ELEMENTS(DF_WORD)/2])
1166#define Rd(pwr, i) (pwr->d[i])
1167#define Ld(pwr, i) (pwr->d[i + DF_ELEMENTS(DF_DOUBLE)/2])
1168
1169#define MSA_DO(DF)                      \
1170    do {                                \
1171        R##DF(pwx, i) = pwt->DF[2*i];   \
1172        L##DF(pwx, i) = pws->DF[2*i];   \
1173    } while (0)
1174MSA_FN_DF(pckev_df)
1175#undef MSA_DO
1176
1177#define MSA_DO(DF)                      \
1178    do {                                \
1179        R##DF(pwx, i) = pwt->DF[2*i+1]; \
1180        L##DF(pwx, i) = pws->DF[2*i+1]; \
1181    } while (0)
1182MSA_FN_DF(pckod_df)
1183#undef MSA_DO
1184
1185#define MSA_DO(DF)                      \
1186    do {                                \
1187        pwx->DF[2*i]   = L##DF(pwt, i); \
1188        pwx->DF[2*i+1] = L##DF(pws, i); \
1189    } while (0)
1190MSA_FN_DF(ilvl_df)
1191#undef MSA_DO
1192
1193#define MSA_DO(DF)                      \
1194    do {                                \
1195        pwx->DF[2*i]   = R##DF(pwt, i); \
1196        pwx->DF[2*i+1] = R##DF(pws, i); \
1197    } while (0)
1198MSA_FN_DF(ilvr_df)
1199#undef MSA_DO
1200
1201#define MSA_DO(DF)                      \
1202    do {                                \
1203        pwx->DF[2*i]   = pwt->DF[2*i];  \
1204        pwx->DF[2*i+1] = pws->DF[2*i];  \
1205    } while (0)
1206MSA_FN_DF(ilvev_df)
1207#undef MSA_DO
1208
1209#define MSA_DO(DF)                          \
1210    do {                                    \
1211        pwx->DF[2*i]   = pwt->DF[2*i+1];    \
1212        pwx->DF[2*i+1] = pws->DF[2*i+1];    \
1213    } while (0)
1214MSA_FN_DF(ilvod_df)
1215#undef MSA_DO
1216#undef MSA_LOOP_COND
1217
1218#define MSA_LOOP_COND(DF) \
1219            (DF_ELEMENTS(DF))
1220
1221#define MSA_DO(DF)                                                          \
1222    do {                                                                    \
1223        uint32_t n = DF_ELEMENTS(df);                                       \
1224        uint32_t k = (pwd->DF[i] & 0x3f) % (2 * n);                         \
1225        pwx->DF[i] =                                                        \
1226            (pwd->DF[i] & 0xc0) ? 0 : k < n ? pwt->DF[k] : pws->DF[k - n];  \
1227    } while (0)
1228MSA_FN_DF(vshf_df)
1229#undef MSA_DO
1230#undef MSA_LOOP_COND
1231#undef MSA_FN_DF
1232
1233void helper_msa_sldi_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
1234                        uint32_t ws, uint32_t n)
1235{
1236    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1237    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1238
1239    msa_sld_df(df, pwd, pws, n);
1240}
1241
1242void helper_msa_splati_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
1243                          uint32_t ws, uint32_t n)
1244{
1245    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1246    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1247
1248    msa_splat_df(df, pwd, pws, n);
1249}
1250
1251void helper_msa_copy_s_df(CPUMIPSState *env, uint32_t df, uint32_t rd,
1252                          uint32_t ws, uint32_t n)
1253{
1254    n %= DF_ELEMENTS(df);
1255
1256    switch (df) {
1257    case DF_BYTE:
1258        env->active_tc.gpr[rd] = (int8_t)env->active_fpu.fpr[ws].wr.b[n];
1259        break;
1260    case DF_HALF:
1261        env->active_tc.gpr[rd] = (int16_t)env->active_fpu.fpr[ws].wr.h[n];
1262        break;
1263    case DF_WORD:
1264        env->active_tc.gpr[rd] = (int32_t)env->active_fpu.fpr[ws].wr.w[n];
1265        break;
1266#ifdef TARGET_MIPS64
1267    case DF_DOUBLE:
1268        env->active_tc.gpr[rd] = (int64_t)env->active_fpu.fpr[ws].wr.d[n];
1269        break;
1270#endif
1271    default:
1272        assert(0);
1273    }
1274}
1275
1276void helper_msa_copy_u_df(CPUMIPSState *env, uint32_t df, uint32_t rd,
1277                          uint32_t ws, uint32_t n)
1278{
1279    n %= DF_ELEMENTS(df);
1280
1281    switch (df) {
1282    case DF_BYTE:
1283        env->active_tc.gpr[rd] = (uint8_t)env->active_fpu.fpr[ws].wr.b[n];
1284        break;
1285    case DF_HALF:
1286        env->active_tc.gpr[rd] = (uint16_t)env->active_fpu.fpr[ws].wr.h[n];
1287        break;
1288    case DF_WORD:
1289        env->active_tc.gpr[rd] = (uint32_t)env->active_fpu.fpr[ws].wr.w[n];
1290        break;
1291#ifdef TARGET_MIPS64
1292    case DF_DOUBLE:
1293        env->active_tc.gpr[rd] = (uint64_t)env->active_fpu.fpr[ws].wr.d[n];
1294        break;
1295#endif
1296    default:
1297        assert(0);
1298    }
1299}
1300
1301void helper_msa_insert_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
1302                          uint32_t rs_num, uint32_t n)
1303{
1304    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1305    target_ulong rs = env->active_tc.gpr[rs_num];
1306
1307    switch (df) {
1308    case DF_BYTE:
1309        pwd->b[n] = (int8_t)rs;
1310        break;
1311    case DF_HALF:
1312        pwd->h[n] = (int16_t)rs;
1313        break;
1314    case DF_WORD:
1315        pwd->w[n] = (int32_t)rs;
1316        break;
1317    case DF_DOUBLE:
1318        pwd->d[n] = (int64_t)rs;
1319        break;
1320    default:
1321        assert(0);
1322    }
1323}
1324
1325void helper_msa_insve_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
1326                         uint32_t ws, uint32_t n)
1327{
1328    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1329    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1330
1331    switch (df) {
1332    case DF_BYTE:
1333        pwd->b[n] = (int8_t)pws->b[0];
1334        break;
1335    case DF_HALF:
1336        pwd->h[n] = (int16_t)pws->h[0];
1337        break;
1338    case DF_WORD:
1339        pwd->w[n] = (int32_t)pws->w[0];
1340        break;
1341    case DF_DOUBLE:
1342        pwd->d[n] = (int64_t)pws->d[0];
1343        break;
1344    default:
1345        assert(0);
1346    }
1347}
1348
1349void helper_msa_ctcmsa(CPUMIPSState *env, target_ulong elm, uint32_t cd)
1350{
1351    switch (cd) {
1352    case 0:
1353        break;
1354    case 1:
1355        env->active_tc.msacsr = (int32_t)elm & MSACSR_MASK;
1356        restore_msa_fp_status(env);
1357        /* check exception */
1358        if ((GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED)
1359            & GET_FP_CAUSE(env->active_tc.msacsr)) {
1360            do_raise_exception(env, EXCP_MSAFPE, GETPC());
1361        }
1362        break;
1363    }
1364}
1365
1366target_ulong helper_msa_cfcmsa(CPUMIPSState *env, uint32_t cs)
1367{
1368    switch (cs) {
1369    case 0:
1370        return env->msair;
1371    case 1:
1372        return env->active_tc.msacsr & MSACSR_MASK;
1373    }
1374    return 0;
1375}
1376
1377void helper_msa_move_v(CPUMIPSState *env, uint32_t wd, uint32_t ws)
1378{
1379    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1380    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1381
1382    msa_move_v(pwd, pws);
1383}
1384
1385static inline int64_t msa_pcnt_df(uint32_t df, int64_t arg)
1386{
1387    uint64_t x;
1388
1389    x = UNSIGNED(arg, df);
1390
1391    x = (x & 0x5555555555555555ULL) + ((x >>  1) & 0x5555555555555555ULL);
1392    x = (x & 0x3333333333333333ULL) + ((x >>  2) & 0x3333333333333333ULL);
1393    x = (x & 0x0F0F0F0F0F0F0F0FULL) + ((x >>  4) & 0x0F0F0F0F0F0F0F0FULL);
1394    x = (x & 0x00FF00FF00FF00FFULL) + ((x >>  8) & 0x00FF00FF00FF00FFULL);
1395    x = (x & 0x0000FFFF0000FFFFULL) + ((x >> 16) & 0x0000FFFF0000FFFFULL);
1396    x = (x & 0x00000000FFFFFFFFULL) + ((x >> 32));
1397
1398    return x;
1399}
1400
1401static inline int64_t msa_nlzc_df(uint32_t df, int64_t arg)
1402{
1403    uint64_t x, y;
1404    int n, c;
1405
1406    x = UNSIGNED(arg, df);
1407    n = DF_BITS(df);
1408    c = DF_BITS(df) / 2;
1409
1410    do {
1411        y = x >> c;
1412        if (y != 0) {
1413            n = n - c;
1414            x = y;
1415        }
1416        c = c >> 1;
1417    } while (c != 0);
1418
1419    return n - x;
1420}
1421
1422static inline int64_t msa_nloc_df(uint32_t df, int64_t arg)
1423{
1424    return msa_nlzc_df(df, UNSIGNED((~arg), df));
1425}
1426
1427void helper_msa_fill_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
1428                        uint32_t rs)
1429{
1430    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1431    uint32_t i;
1432
1433    switch (df) {
1434    case DF_BYTE:
1435        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
1436            pwd->b[i] = (int8_t)env->active_tc.gpr[rs];
1437        }
1438        break;
1439    case DF_HALF:
1440        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
1441            pwd->h[i] = (int16_t)env->active_tc.gpr[rs];
1442        }
1443        break;
1444    case DF_WORD:
1445        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
1446            pwd->w[i] = (int32_t)env->active_tc.gpr[rs];
1447        }
1448        break;
1449    case DF_DOUBLE:
1450        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
1451            pwd->d[i] = (int64_t)env->active_tc.gpr[rs];
1452        }
1453       break;
1454    default:
1455        assert(0);
1456    }
1457}
1458
1459#define MSA_UNOP_DF(func) \
1460void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df,         \
1461                              uint32_t wd, uint32_t ws)                 \
1462{                                                                       \
1463    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);                          \
1464    wr_t *pws = &(env->active_fpu.fpr[ws].wr);                          \
1465    uint32_t i;                                                         \
1466                                                                        \
1467    switch (df) {                                                       \
1468    case DF_BYTE:                                                       \
1469        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {                    \
1470            pwd->b[i] = msa_ ## func ## _df(df, pws->b[i]);             \
1471        }                                                               \
1472        break;                                                          \
1473    case DF_HALF:                                                       \
1474        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {                    \
1475            pwd->h[i] = msa_ ## func ## _df(df, pws->h[i]);             \
1476        }                                                               \
1477        break;                                                          \
1478    case DF_WORD:                                                       \
1479        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {                    \
1480            pwd->w[i] = msa_ ## func ## _df(df, pws->w[i]);             \
1481        }                                                               \
1482        break;                                                          \
1483    case DF_DOUBLE:                                                     \
1484        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {                  \
1485            pwd->d[i] = msa_ ## func ## _df(df, pws->d[i]);             \
1486        }                                                               \
1487        break;                                                          \
1488    default:                                                            \
1489        assert(0);                                                      \
1490    }                                                                   \
1491}
1492
1493MSA_UNOP_DF(nlzc)
1494MSA_UNOP_DF(nloc)
1495MSA_UNOP_DF(pcnt)
1496#undef MSA_UNOP_DF
1497
1498#define FLOAT_ONE32 make_float32(0x3f8 << 20)
1499#define FLOAT_ONE64 make_float64(0x3ffULL << 52)
1500
1501#define FLOAT_SNAN16(s) (float16_default_nan(s) ^ 0x0220)
1502        /* 0x7c20 */
1503#define FLOAT_SNAN32(s) (float32_default_nan(s) ^ 0x00400020)
1504        /* 0x7f800020 */
1505#define FLOAT_SNAN64(s) (float64_default_nan(s) ^ 0x0008000000000020ULL)
1506        /* 0x7ff0000000000020 */
1507
1508static inline void clear_msacsr_cause(CPUMIPSState *env)
1509{
1510    SET_FP_CAUSE(env->active_tc.msacsr, 0);
1511}
1512
1513static inline void check_msacsr_cause(CPUMIPSState *env, uintptr_t retaddr)
1514{
1515    if ((GET_FP_CAUSE(env->active_tc.msacsr) &
1516            (GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED)) == 0) {
1517        UPDATE_FP_FLAGS(env->active_tc.msacsr,
1518                GET_FP_CAUSE(env->active_tc.msacsr));
1519    } else {
1520        do_raise_exception(env, EXCP_MSAFPE, retaddr);
1521    }
1522}
1523
1524/* Flush-to-zero use cases for update_msacsr() */
1525#define CLEAR_FS_UNDERFLOW 1
1526#define CLEAR_IS_INEXACT   2
1527#define RECIPROCAL_INEXACT 4
1528
1529static inline int update_msacsr(CPUMIPSState *env, int action, int denormal)
1530{
1531    int ieee_ex;
1532
1533    int c;
1534    int cause;
1535    int enable;
1536
1537    ieee_ex = get_float_exception_flags(&env->active_tc.msa_fp_status);
1538
1539    /* QEMU softfloat does not signal all underflow cases */
1540    if (denormal) {
1541        ieee_ex |= float_flag_underflow;
1542    }
1543
1544    c = ieee_ex_to_mips(ieee_ex);
1545    enable = GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED;
1546
1547    /* Set Inexact (I) when flushing inputs to zero */
1548    if ((ieee_ex & float_flag_input_denormal) &&
1549            (env->active_tc.msacsr & MSACSR_FS_MASK) != 0) {
1550        if (action & CLEAR_IS_INEXACT) {
1551            c &= ~FP_INEXACT;
1552        } else {
1553            c |=  FP_INEXACT;
1554        }
1555    }
1556
1557    /* Set Inexact (I) and Underflow (U) when flushing outputs to zero */
1558    if ((ieee_ex & float_flag_output_denormal) &&
1559            (env->active_tc.msacsr & MSACSR_FS_MASK) != 0) {
1560        c |= FP_INEXACT;
1561        if (action & CLEAR_FS_UNDERFLOW) {
1562            c &= ~FP_UNDERFLOW;
1563        } else {
1564            c |=  FP_UNDERFLOW;
1565        }
1566    }
1567
1568    /* Set Inexact (I) when Overflow (O) is not enabled */
1569    if ((c & FP_OVERFLOW) != 0 && (enable & FP_OVERFLOW) == 0) {
1570        c |= FP_INEXACT;
1571    }
1572
1573    /* Clear Exact Underflow when Underflow (U) is not enabled */
1574    if ((c & FP_UNDERFLOW) != 0 && (enable & FP_UNDERFLOW) == 0 &&
1575            (c & FP_INEXACT) == 0) {
1576        c &= ~FP_UNDERFLOW;
1577    }
1578
1579    /* Reciprocal operations set only Inexact when valid and not
1580       divide by zero */
1581    if ((action & RECIPROCAL_INEXACT) &&
1582            (c & (FP_INVALID | FP_DIV0)) == 0) {
1583        c = FP_INEXACT;
1584    }
1585
1586    cause = c & enable;    /* all current enabled exceptions */
1587
1588    if (cause == 0) {
1589        /* No enabled exception, update the MSACSR Cause
1590         with all current exceptions */
1591        SET_FP_CAUSE(env->active_tc.msacsr,
1592                (GET_FP_CAUSE(env->active_tc.msacsr) | c));
1593    } else {
1594        /* Current exceptions are enabled */
1595        if ((env->active_tc.msacsr & MSACSR_NX_MASK) == 0) {
1596            /* Exception(s) will trap, update MSACSR Cause
1597           with all enabled exceptions */
1598            SET_FP_CAUSE(env->active_tc.msacsr,
1599                    (GET_FP_CAUSE(env->active_tc.msacsr) | c));
1600        }
1601    }
1602
1603    return c;
1604}
1605
1606static inline int get_enabled_exceptions(const CPUMIPSState *env, int c)
1607{
1608    int enable = GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED;
1609    return c & enable;
1610}
1611
1612static inline float16 float16_from_float32(int32_t a, flag ieee,
1613                                           float_status *status)
1614{
1615      float16 f_val;
1616
1617      f_val = float32_to_float16((float32)a, ieee, status);
1618
1619      return a < 0 ? (f_val | (1 << 15)) : f_val;
1620}
1621
1622static inline float32 float32_from_float64(int64_t a, float_status *status)
1623{
1624      float32 f_val;
1625
1626      f_val = float64_to_float32((float64)a, status);
1627
1628      return a < 0 ? (f_val | (1 << 31)) : f_val;
1629}
1630
1631static inline float32 float32_from_float16(int16_t a, flag ieee,
1632                                           float_status *status)
1633{
1634      float32 f_val;
1635
1636      f_val = float16_to_float32((float16)a, ieee, status);
1637
1638      return a < 0 ? (f_val | (1 << 31)) : f_val;
1639}
1640
1641static inline float64 float64_from_float32(int32_t a, float_status *status)
1642{
1643      float64 f_val;
1644
1645      f_val = float32_to_float64((float64)a, status);
1646
1647      return a < 0 ? (f_val | (1ULL << 63)) : f_val;
1648}
1649
1650static inline float32 float32_from_q16(int16_t a, float_status *status)
1651{
1652    float32 f_val;
1653
1654    /* conversion as integer and scaling */
1655    f_val = int32_to_float32(a, status);
1656    f_val = float32_scalbn(f_val, -15, status);
1657
1658    return f_val;
1659}
1660
1661static inline float64 float64_from_q32(int32_t a, float_status *status)
1662{
1663    float64 f_val;
1664
1665    /* conversion as integer and scaling */
1666    f_val = int32_to_float64(a, status);
1667    f_val = float64_scalbn(f_val, -31, status);
1668
1669    return f_val;
1670}
1671
1672static inline int16_t float32_to_q16(float32 a, float_status *status)
1673{
1674    int32_t q_val;
1675    int32_t q_min = 0xffff8000;
1676    int32_t q_max = 0x00007fff;
1677
1678    int ieee_ex;
1679
1680    if (float32_is_any_nan(a)) {
1681        float_raise(float_flag_invalid, status);
1682        return 0;
1683    }
1684
1685    /* scaling */
1686    a = float32_scalbn(a, 15, status);
1687
1688    ieee_ex = get_float_exception_flags(status);
1689    set_float_exception_flags(ieee_ex & (~float_flag_underflow)
1690                             , status);
1691
1692    if (ieee_ex & float_flag_overflow) {
1693        float_raise(float_flag_inexact, status);
1694        return (int32_t)a < 0 ? q_min : q_max;
1695    }
1696
1697    /* conversion to int */
1698    q_val = float32_to_int32(a, status);
1699
1700    ieee_ex = get_float_exception_flags(status);
1701    set_float_exception_flags(ieee_ex & (~float_flag_underflow)
1702                             , status);
1703
1704    if (ieee_ex & float_flag_invalid) {
1705        set_float_exception_flags(ieee_ex & (~float_flag_invalid)
1706                               , status);
1707        float_raise(float_flag_overflow | float_flag_inexact, status);
1708        return (int32_t)a < 0 ? q_min : q_max;
1709    }
1710
1711    if (q_val < q_min) {
1712        float_raise(float_flag_overflow | float_flag_inexact, status);
1713        return (int16_t)q_min;
1714    }
1715
1716    if (q_max < q_val) {
1717        float_raise(float_flag_overflow | float_flag_inexact, status);
1718        return (int16_t)q_max;
1719    }
1720
1721    return (int16_t)q_val;
1722}
1723
1724static inline int32_t float64_to_q32(float64 a, float_status *status)
1725{
1726    int64_t q_val;
1727    int64_t q_min = 0xffffffff80000000LL;
1728    int64_t q_max = 0x000000007fffffffLL;
1729
1730    int ieee_ex;
1731
1732    if (float64_is_any_nan(a)) {
1733        float_raise(float_flag_invalid, status);
1734        return 0;
1735    }
1736
1737    /* scaling */
1738    a = float64_scalbn(a, 31, status);
1739
1740    ieee_ex = get_float_exception_flags(status);
1741    set_float_exception_flags(ieee_ex & (~float_flag_underflow)
1742           , status);
1743
1744    if (ieee_ex & float_flag_overflow) {
1745        float_raise(float_flag_inexact, status);
1746        return (int64_t)a < 0 ? q_min : q_max;
1747    }
1748
1749    /* conversion to integer */
1750    q_val = float64_to_int64(a, status);
1751
1752    ieee_ex = get_float_exception_flags(status);
1753    set_float_exception_flags(ieee_ex & (~float_flag_underflow)
1754           , status);
1755
1756    if (ieee_ex & float_flag_invalid) {
1757        set_float_exception_flags(ieee_ex & (~float_flag_invalid)
1758               , status);
1759        float_raise(float_flag_overflow | float_flag_inexact, status);
1760        return (int64_t)a < 0 ? q_min : q_max;
1761    }
1762
1763    if (q_val < q_min) {
1764        float_raise(float_flag_overflow | float_flag_inexact, status);
1765        return (int32_t)q_min;
1766    }
1767
1768    if (q_max < q_val) {
1769        float_raise(float_flag_overflow | float_flag_inexact, status);
1770        return (int32_t)q_max;
1771    }
1772
1773    return (int32_t)q_val;
1774}
1775
1776#define MSA_FLOAT_COND(DEST, OP, ARG1, ARG2, BITS, QUIET)                   \
1777    do {                                                                    \
1778        float_status *status = &env->active_tc.msa_fp_status;               \
1779        int c;                                                              \
1780        int64_t cond;                                                       \
1781        set_float_exception_flags(0, status);                               \
1782        if (!QUIET) {                                                       \
1783            cond = float ## BITS ## _ ## OP(ARG1, ARG2, status);            \
1784        } else {                                                            \
1785            cond = float ## BITS ## _ ## OP ## _quiet(ARG1, ARG2, status);  \
1786        }                                                                   \
1787        DEST = cond ? M_MAX_UINT(BITS) : 0;                                 \
1788        c = update_msacsr(env, CLEAR_IS_INEXACT, 0);                        \
1789                                                                            \
1790        if (get_enabled_exceptions(env, c)) {                               \
1791            DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c;            \
1792        }                                                                   \
1793    } while (0)
1794
1795#define MSA_FLOAT_AF(DEST, ARG1, ARG2, BITS, QUIET)                 \
1796    do {                                                            \
1797        MSA_FLOAT_COND(DEST, eq, ARG1, ARG2, BITS, QUIET);          \
1798        if ((DEST & M_MAX_UINT(BITS)) == M_MAX_UINT(BITS)) {        \
1799            DEST = 0;                                               \
1800        }                                                           \
1801    } while (0)
1802
1803#define MSA_FLOAT_UEQ(DEST, ARG1, ARG2, BITS, QUIET)                \
1804    do {                                                            \
1805        MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET);   \
1806        if (DEST == 0) {                                            \
1807            MSA_FLOAT_COND(DEST, eq, ARG1, ARG2, BITS, QUIET);      \
1808        }                                                           \
1809    } while (0)
1810
1811#define MSA_FLOAT_NE(DEST, ARG1, ARG2, BITS, QUIET)                 \
1812    do {                                                            \
1813        MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET);          \
1814        if (DEST == 0) {                                            \
1815            MSA_FLOAT_COND(DEST, lt, ARG2, ARG1, BITS, QUIET);      \
1816        }                                                           \
1817    } while (0)
1818
1819#define MSA_FLOAT_UNE(DEST, ARG1, ARG2, BITS, QUIET)                \
1820    do {                                                            \
1821        MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET);   \
1822        if (DEST == 0) {                                            \
1823            MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET);      \
1824            if (DEST == 0) {                                        \
1825                MSA_FLOAT_COND(DEST, lt, ARG2, ARG1, BITS, QUIET);  \
1826            }                                                       \
1827        }                                                           \
1828    } while (0)
1829
1830#define MSA_FLOAT_ULE(DEST, ARG1, ARG2, BITS, QUIET)                \
1831    do {                                                            \
1832        MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET);   \
1833        if (DEST == 0) {                                            \
1834            MSA_FLOAT_COND(DEST, le, ARG1, ARG2, BITS, QUIET);      \
1835        }                                                           \
1836    } while (0)
1837
1838#define MSA_FLOAT_ULT(DEST, ARG1, ARG2, BITS, QUIET)                \
1839    do {                                                            \
1840        MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET);   \
1841        if (DEST == 0) {                                            \
1842            MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET);      \
1843        }                                                           \
1844    } while (0)
1845
1846#define MSA_FLOAT_OR(DEST, ARG1, ARG2, BITS, QUIET)                 \
1847    do {                                                            \
1848        MSA_FLOAT_COND(DEST, le, ARG1, ARG2, BITS, QUIET);          \
1849        if (DEST == 0) {                                            \
1850            MSA_FLOAT_COND(DEST, le, ARG2, ARG1, BITS, QUIET);      \
1851        }                                                           \
1852    } while (0)
1853
1854static inline void compare_af(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
1855                              wr_t *pwt, uint32_t df, int quiet,
1856                              uintptr_t retaddr)
1857{
1858    wr_t wx, *pwx = &wx;
1859    uint32_t i;
1860
1861    clear_msacsr_cause(env);
1862
1863    switch (df) {
1864    case DF_WORD:
1865        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
1866            MSA_FLOAT_AF(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
1867        }
1868        break;
1869    case DF_DOUBLE:
1870        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
1871            MSA_FLOAT_AF(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
1872        }
1873        break;
1874    default:
1875        assert(0);
1876    }
1877
1878    check_msacsr_cause(env, retaddr);
1879
1880    msa_move_v(pwd, pwx);
1881}
1882
1883static inline void compare_un(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
1884                              wr_t *pwt, uint32_t df, int quiet,
1885                              uintptr_t retaddr)
1886{
1887    wr_t wx, *pwx = &wx;
1888    uint32_t i;
1889
1890    clear_msacsr_cause(env);
1891
1892    switch (df) {
1893    case DF_WORD:
1894        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
1895            MSA_FLOAT_COND(pwx->w[i], unordered, pws->w[i], pwt->w[i], 32,
1896                    quiet);
1897        }
1898        break;
1899    case DF_DOUBLE:
1900        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
1901            MSA_FLOAT_COND(pwx->d[i], unordered, pws->d[i], pwt->d[i], 64,
1902                    quiet);
1903        }
1904        break;
1905    default:
1906        assert(0);
1907    }
1908
1909    check_msacsr_cause(env, retaddr);
1910
1911    msa_move_v(pwd, pwx);
1912}
1913
1914static inline void compare_eq(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
1915                              wr_t *pwt, uint32_t df, int quiet,
1916                              uintptr_t retaddr)
1917{
1918    wr_t wx, *pwx = &wx;
1919    uint32_t i;
1920
1921    clear_msacsr_cause(env);
1922
1923    switch (df) {
1924    case DF_WORD:
1925        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
1926            MSA_FLOAT_COND(pwx->w[i], eq, pws->w[i], pwt->w[i], 32, quiet);
1927        }
1928        break;
1929    case DF_DOUBLE:
1930        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
1931            MSA_FLOAT_COND(pwx->d[i], eq, pws->d[i], pwt->d[i], 64, quiet);
1932        }
1933        break;
1934    default:
1935        assert(0);
1936    }
1937
1938    check_msacsr_cause(env, retaddr);
1939
1940    msa_move_v(pwd, pwx);
1941}
1942
1943static inline void compare_ueq(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
1944                               wr_t *pwt, uint32_t df, int quiet,
1945                               uintptr_t retaddr)
1946{
1947    wr_t wx, *pwx = &wx;
1948    uint32_t i;
1949
1950    clear_msacsr_cause(env);
1951
1952    switch (df) {
1953    case DF_WORD:
1954        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
1955            MSA_FLOAT_UEQ(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
1956        }
1957        break;
1958    case DF_DOUBLE:
1959        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
1960            MSA_FLOAT_UEQ(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
1961        }
1962        break;
1963    default:
1964        assert(0);
1965    }
1966
1967    check_msacsr_cause(env, retaddr);
1968
1969    msa_move_v(pwd, pwx);
1970}
1971
1972static inline void compare_lt(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
1973                              wr_t *pwt, uint32_t df, int quiet,
1974                              uintptr_t retaddr)
1975{
1976    wr_t wx, *pwx = &wx;
1977    uint32_t i;
1978
1979    clear_msacsr_cause(env);
1980
1981    switch (df) {
1982    case DF_WORD:
1983        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
1984            MSA_FLOAT_COND(pwx->w[i], lt, pws->w[i], pwt->w[i], 32, quiet);
1985        }
1986        break;
1987    case DF_DOUBLE:
1988        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
1989            MSA_FLOAT_COND(pwx->d[i], lt, pws->d[i], pwt->d[i], 64, quiet);
1990        }
1991        break;
1992    default:
1993        assert(0);
1994    }
1995
1996    check_msacsr_cause(env, retaddr);
1997
1998    msa_move_v(pwd, pwx);
1999}
2000
2001static inline void compare_ult(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
2002                               wr_t *pwt, uint32_t df, int quiet,
2003                               uintptr_t retaddr)
2004{
2005    wr_t wx, *pwx = &wx;
2006    uint32_t i;
2007
2008    clear_msacsr_cause(env);
2009
2010    switch (df) {
2011    case DF_WORD:
2012        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2013            MSA_FLOAT_ULT(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
2014        }
2015        break;
2016    case DF_DOUBLE:
2017        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2018            MSA_FLOAT_ULT(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
2019        }
2020        break;
2021    default:
2022        assert(0);
2023    }
2024
2025    check_msacsr_cause(env, retaddr);
2026
2027    msa_move_v(pwd, pwx);
2028}
2029
2030static inline void compare_le(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
2031                              wr_t *pwt, uint32_t df, int quiet,
2032                              uintptr_t retaddr)
2033{
2034    wr_t wx, *pwx = &wx;
2035    uint32_t i;
2036
2037    clear_msacsr_cause(env);
2038
2039    switch (df) {
2040    case DF_WORD:
2041        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2042            MSA_FLOAT_COND(pwx->w[i], le, pws->w[i], pwt->w[i], 32, quiet);
2043        }
2044        break;
2045    case DF_DOUBLE:
2046        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2047            MSA_FLOAT_COND(pwx->d[i], le, pws->d[i], pwt->d[i], 64, quiet);
2048        }
2049        break;
2050    default:
2051        assert(0);
2052    }
2053
2054    check_msacsr_cause(env, retaddr);
2055
2056    msa_move_v(pwd, pwx);
2057}
2058
2059static inline void compare_ule(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
2060                               wr_t *pwt, uint32_t df, int quiet,
2061                               uintptr_t retaddr)
2062{
2063    wr_t wx, *pwx = &wx;
2064    uint32_t i;
2065
2066    clear_msacsr_cause(env);
2067
2068    switch (df) {
2069    case DF_WORD:
2070        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2071            MSA_FLOAT_ULE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
2072        }
2073        break;
2074    case DF_DOUBLE:
2075        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2076            MSA_FLOAT_ULE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
2077        }
2078        break;
2079    default:
2080        assert(0);
2081    }
2082
2083    check_msacsr_cause(env, retaddr);
2084
2085    msa_move_v(pwd, pwx);
2086}
2087
2088static inline void compare_or(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
2089                              wr_t *pwt, uint32_t df, int quiet,
2090                              uintptr_t retaddr)
2091{
2092    wr_t wx, *pwx = &wx;
2093    uint32_t i;
2094
2095    clear_msacsr_cause(env);
2096
2097    switch (df) {
2098    case DF_WORD:
2099        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2100            MSA_FLOAT_OR(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
2101        }
2102        break;
2103    case DF_DOUBLE:
2104        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2105            MSA_FLOAT_OR(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
2106        }
2107        break;
2108    default:
2109        assert(0);
2110    }
2111
2112    check_msacsr_cause(env, retaddr);
2113
2114    msa_move_v(pwd, pwx);
2115}
2116
2117static inline void compare_une(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
2118                               wr_t *pwt, uint32_t df, int quiet,
2119                               uintptr_t retaddr)
2120{
2121    wr_t wx, *pwx = &wx;
2122    uint32_t i;
2123
2124    clear_msacsr_cause(env);
2125
2126    switch (df) {
2127    case DF_WORD:
2128        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2129            MSA_FLOAT_UNE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
2130        }
2131        break;
2132    case DF_DOUBLE:
2133        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2134            MSA_FLOAT_UNE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
2135        }
2136        break;
2137    default:
2138        assert(0);
2139    }
2140
2141    check_msacsr_cause(env, retaddr);
2142
2143    msa_move_v(pwd, pwx);
2144}
2145
2146static inline void compare_ne(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
2147                              wr_t *pwt, uint32_t df, int quiet,
2148                              uintptr_t retaddr)
2149{
2150    wr_t wx, *pwx = &wx;
2151    uint32_t i;
2152
2153    clear_msacsr_cause(env);
2154
2155    switch (df) {
2156    case DF_WORD:
2157        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2158            MSA_FLOAT_NE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
2159        }
2160        break;
2161    case DF_DOUBLE:
2162        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2163            MSA_FLOAT_NE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
2164        }
2165        break;
2166    default:
2167        assert(0);
2168    }
2169
2170    check_msacsr_cause(env, retaddr);
2171
2172    msa_move_v(pwd, pwx);
2173}
2174
2175void helper_msa_fcaf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2176                        uint32_t ws, uint32_t wt)
2177{
2178    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2179    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2180    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2181    compare_af(env, pwd, pws, pwt, df, 1, GETPC());
2182}
2183
2184void helper_msa_fcun_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2185                        uint32_t ws, uint32_t wt)
2186{
2187    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2188    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2189    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2190    compare_un(env, pwd, pws, pwt, df, 1, GETPC());
2191}
2192
2193void helper_msa_fceq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2194                        uint32_t ws, uint32_t wt)
2195{
2196    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2197    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2198    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2199    compare_eq(env, pwd, pws, pwt, df, 1, GETPC());
2200}
2201
2202void helper_msa_fcueq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2203                         uint32_t ws, uint32_t wt)
2204{
2205    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2206    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2207    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2208    compare_ueq(env, pwd, pws, pwt, df, 1, GETPC());
2209}
2210
2211void helper_msa_fclt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2212                        uint32_t ws, uint32_t wt)
2213{
2214    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2215    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2216    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2217    compare_lt(env, pwd, pws, pwt, df, 1, GETPC());
2218}
2219
2220void helper_msa_fcult_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2221                         uint32_t ws, uint32_t wt)
2222{
2223    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2224    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2225    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2226    compare_ult(env, pwd, pws, pwt, df, 1, GETPC());
2227}
2228
2229void helper_msa_fcle_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2230                        uint32_t ws, uint32_t wt)
2231{
2232    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2233    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2234    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2235    compare_le(env, pwd, pws, pwt, df, 1, GETPC());
2236}
2237
2238void helper_msa_fcule_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2239                         uint32_t ws, uint32_t wt)
2240{
2241    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2242    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2243    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2244    compare_ule(env, pwd, pws, pwt, df, 1, GETPC());
2245}
2246
2247void helper_msa_fsaf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2248                        uint32_t ws, uint32_t wt)
2249{
2250    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2251    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2252    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2253    compare_af(env, pwd, pws, pwt, df, 0, GETPC());
2254}
2255
2256void helper_msa_fsun_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2257                        uint32_t ws, uint32_t wt)
2258{
2259    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2260    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2261    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2262    compare_un(env, pwd, pws, pwt, df, 0, GETPC());
2263}
2264
2265void helper_msa_fseq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2266                        uint32_t ws, uint32_t wt)
2267{
2268    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2269    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2270    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2271    compare_eq(env, pwd, pws, pwt, df, 0, GETPC());
2272}
2273
2274void helper_msa_fsueq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2275                         uint32_t ws, uint32_t wt)
2276{
2277    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2278    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2279    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2280    compare_ueq(env, pwd, pws, pwt, df, 0, GETPC());
2281}
2282
2283void helper_msa_fslt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2284                        uint32_t ws, uint32_t wt)
2285{
2286    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2287    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2288    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2289    compare_lt(env, pwd, pws, pwt, df, 0, GETPC());
2290}
2291
2292void helper_msa_fsult_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2293                         uint32_t ws, uint32_t wt)
2294{
2295    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2296    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2297    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2298    compare_ult(env, pwd, pws, pwt, df, 0, GETPC());
2299}
2300
2301void helper_msa_fsle_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2302                        uint32_t ws, uint32_t wt)
2303{
2304    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2305    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2306    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2307    compare_le(env, pwd, pws, pwt, df, 0, GETPC());
2308}
2309
2310void helper_msa_fsule_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2311                         uint32_t ws, uint32_t wt)
2312{
2313    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2314    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2315    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2316    compare_ule(env, pwd, pws, pwt, df, 0, GETPC());
2317}
2318
2319void helper_msa_fcor_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2320                        uint32_t ws, uint32_t wt)
2321{
2322    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2323    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2324    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2325    compare_or(env, pwd, pws, pwt, df, 1, GETPC());
2326}
2327
2328void helper_msa_fcune_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2329                         uint32_t ws, uint32_t wt)
2330{
2331    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2332    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2333    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2334    compare_une(env, pwd, pws, pwt, df, 1, GETPC());
2335}
2336
2337void helper_msa_fcne_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2338                        uint32_t ws, uint32_t wt)
2339{
2340    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2341    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2342    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2343    compare_ne(env, pwd, pws, pwt, df, 1, GETPC());
2344}
2345
2346void helper_msa_fsor_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2347                        uint32_t ws, uint32_t wt)
2348{
2349    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2350    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2351    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2352    compare_or(env, pwd, pws, pwt, df, 0, GETPC());
2353}
2354
2355void helper_msa_fsune_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2356                         uint32_t ws, uint32_t wt)
2357{
2358    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2359    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2360    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2361    compare_une(env, pwd, pws, pwt, df, 0, GETPC());
2362}
2363
2364void helper_msa_fsne_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2365                        uint32_t ws, uint32_t wt)
2366{
2367    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2368    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2369    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2370    compare_ne(env, pwd, pws, pwt, df, 0, GETPC());
2371}
2372
2373#define float16_is_zero(ARG) 0
2374#define float16_is_zero_or_denormal(ARG) 0
2375
2376#define IS_DENORMAL(ARG, BITS)                      \
2377    (!float ## BITS ## _is_zero(ARG)                \
2378    && float ## BITS ## _is_zero_or_denormal(ARG))
2379
2380#define MSA_FLOAT_BINOP(DEST, OP, ARG1, ARG2, BITS)                         \
2381    do {                                                                    \
2382        float_status *status = &env->active_tc.msa_fp_status;               \
2383        int c;                                                              \
2384                                                                            \
2385        set_float_exception_flags(0, status);                               \
2386        DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status);                \
2387        c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS));                 \
2388                                                                            \
2389        if (get_enabled_exceptions(env, c)) {                               \
2390            DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c;            \
2391        }                                                                   \
2392    } while (0)
2393
2394void helper_msa_fadd_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2395        uint32_t ws, uint32_t wt)
2396{
2397    wr_t wx, *pwx = &wx;
2398    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2399    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2400    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2401    uint32_t i;
2402
2403    clear_msacsr_cause(env);
2404
2405    switch (df) {
2406    case DF_WORD:
2407        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2408            MSA_FLOAT_BINOP(pwx->w[i], add, pws->w[i], pwt->w[i], 32);
2409        }
2410        break;
2411    case DF_DOUBLE:
2412        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2413            MSA_FLOAT_BINOP(pwx->d[i], add, pws->d[i], pwt->d[i], 64);
2414        }
2415        break;
2416    default:
2417        assert(0);
2418    }
2419
2420    check_msacsr_cause(env, GETPC());
2421    msa_move_v(pwd, pwx);
2422}
2423
2424void helper_msa_fsub_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2425        uint32_t ws, uint32_t wt)
2426{
2427    wr_t wx, *pwx = &wx;
2428    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2429    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2430    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2431    uint32_t i;
2432
2433    clear_msacsr_cause(env);
2434
2435    switch (df) {
2436    case DF_WORD:
2437        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2438            MSA_FLOAT_BINOP(pwx->w[i], sub, pws->w[i], pwt->w[i], 32);
2439        }
2440        break;
2441    case DF_DOUBLE:
2442        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2443            MSA_FLOAT_BINOP(pwx->d[i], sub, pws->d[i], pwt->d[i], 64);
2444        }
2445        break;
2446    default:
2447        assert(0);
2448    }
2449
2450    check_msacsr_cause(env, GETPC());
2451    msa_move_v(pwd, pwx);
2452}
2453
2454void helper_msa_fmul_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2455        uint32_t ws, uint32_t wt)
2456{
2457    wr_t wx, *pwx = &wx;
2458    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2459    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2460    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2461    uint32_t i;
2462
2463    clear_msacsr_cause(env);
2464
2465    switch (df) {
2466    case DF_WORD:
2467        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2468            MSA_FLOAT_BINOP(pwx->w[i], mul, pws->w[i], pwt->w[i], 32);
2469        }
2470        break;
2471    case DF_DOUBLE:
2472        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2473            MSA_FLOAT_BINOP(pwx->d[i], mul, pws->d[i], pwt->d[i], 64);
2474        }
2475        break;
2476    default:
2477        assert(0);
2478    }
2479
2480    check_msacsr_cause(env, GETPC());
2481
2482    msa_move_v(pwd, pwx);
2483}
2484
2485void helper_msa_fdiv_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2486        uint32_t ws, uint32_t wt)
2487{
2488    wr_t wx, *pwx = &wx;
2489    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2490    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2491    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2492    uint32_t i;
2493
2494    clear_msacsr_cause(env);
2495
2496    switch (df) {
2497    case DF_WORD:
2498        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2499            MSA_FLOAT_BINOP(pwx->w[i], div, pws->w[i], pwt->w[i], 32);
2500        }
2501        break;
2502    case DF_DOUBLE:
2503        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2504            MSA_FLOAT_BINOP(pwx->d[i], div, pws->d[i], pwt->d[i], 64);
2505        }
2506        break;
2507    default:
2508        assert(0);
2509    }
2510
2511    check_msacsr_cause(env, GETPC());
2512
2513    msa_move_v(pwd, pwx);
2514}
2515
2516#define MSA_FLOAT_MULADD(DEST, ARG1, ARG2, ARG3, NEGATE, BITS)              \
2517    do {                                                                    \
2518        float_status *status = &env->active_tc.msa_fp_status;               \
2519        int c;                                                              \
2520                                                                            \
2521        set_float_exception_flags(0, status);                               \
2522        DEST = float ## BITS ## _muladd(ARG2, ARG3, ARG1, NEGATE, status);  \
2523        c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS));                 \
2524                                                                            \
2525        if (get_enabled_exceptions(env, c)) {                               \
2526            DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c;            \
2527        }                                                                   \
2528    } while (0)
2529
2530void helper_msa_fmadd_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2531        uint32_t ws, uint32_t wt)
2532{
2533    wr_t wx, *pwx = &wx;
2534    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2535    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2536    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2537    uint32_t i;
2538
2539    clear_msacsr_cause(env);
2540
2541    switch (df) {
2542    case DF_WORD:
2543        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2544            MSA_FLOAT_MULADD(pwx->w[i], pwd->w[i],
2545                           pws->w[i], pwt->w[i], 0, 32);
2546        }
2547        break;
2548    case DF_DOUBLE:
2549        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2550            MSA_FLOAT_MULADD(pwx->d[i], pwd->d[i],
2551                           pws->d[i], pwt->d[i], 0, 64);
2552        }
2553        break;
2554    default:
2555        assert(0);
2556    }
2557
2558    check_msacsr_cause(env, GETPC());
2559
2560    msa_move_v(pwd, pwx);
2561}
2562
2563void helper_msa_fmsub_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2564        uint32_t ws, uint32_t wt)
2565{
2566    wr_t wx, *pwx = &wx;
2567    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2568    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2569    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2570    uint32_t i;
2571
2572    clear_msacsr_cause(env);
2573
2574    switch (df) {
2575    case DF_WORD:
2576        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2577            MSA_FLOAT_MULADD(pwx->w[i], pwd->w[i],
2578                           pws->w[i], pwt->w[i],
2579                           float_muladd_negate_product, 32);
2580      }
2581      break;
2582    case DF_DOUBLE:
2583        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2584            MSA_FLOAT_MULADD(pwx->d[i], pwd->d[i],
2585                           pws->d[i], pwt->d[i],
2586                           float_muladd_negate_product, 64);
2587        }
2588        break;
2589    default:
2590        assert(0);
2591    }
2592
2593    check_msacsr_cause(env, GETPC());
2594
2595    msa_move_v(pwd, pwx);
2596}
2597
2598void helper_msa_fexp2_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2599        uint32_t ws, uint32_t wt)
2600{
2601    wr_t wx, *pwx = &wx;
2602    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2603    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2604    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2605    uint32_t i;
2606
2607    clear_msacsr_cause(env);
2608
2609    switch (df) {
2610    case DF_WORD:
2611        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2612            MSA_FLOAT_BINOP(pwx->w[i], scalbn, pws->w[i],
2613                            pwt->w[i] >  0x200 ?  0x200 :
2614                            pwt->w[i] < -0x200 ? -0x200 : pwt->w[i],
2615                            32);
2616        }
2617        break;
2618    case DF_DOUBLE:
2619        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2620            MSA_FLOAT_BINOP(pwx->d[i], scalbn, pws->d[i],
2621                            pwt->d[i] >  0x1000 ?  0x1000 :
2622                            pwt->d[i] < -0x1000 ? -0x1000 : pwt->d[i],
2623                            64);
2624        }
2625        break;
2626    default:
2627        assert(0);
2628    }
2629
2630    check_msacsr_cause(env, GETPC());
2631
2632    msa_move_v(pwd, pwx);
2633}
2634
2635#define MSA_FLOAT_UNOP(DEST, OP, ARG, BITS)                                 \
2636    do {                                                                    \
2637        float_status *status = &env->active_tc.msa_fp_status;               \
2638        int c;                                                              \
2639                                                                            \
2640        set_float_exception_flags(0, status);                               \
2641        DEST = float ## BITS ## _ ## OP(ARG, status);                       \
2642        c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS));                 \
2643                                                                            \
2644        if (get_enabled_exceptions(env, c)) {                               \
2645            DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c;            \
2646        }                                                                   \
2647    } while (0)
2648
2649void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2650                         uint32_t ws, uint32_t wt)
2651{
2652    wr_t wx, *pwx = &wx;
2653    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2654    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2655    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2656    uint32_t i;
2657
2658    clear_msacsr_cause(env);
2659
2660    switch (df) {
2661    case DF_WORD:
2662        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2663            /* Half precision floats come in two formats: standard
2664               IEEE and "ARM" format.  The latter gains extra exponent
2665               range by omitting the NaN/Inf encodings.  */
2666            flag ieee = 1;
2667
2668            MSA_FLOAT_BINOP(Lh(pwx, i), from_float32, pws->w[i], ieee, 16);
2669            MSA_FLOAT_BINOP(Rh(pwx, i), from_float32, pwt->w[i], ieee, 16);
2670        }
2671        break;
2672    case DF_DOUBLE:
2673        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2674            MSA_FLOAT_UNOP(Lw(pwx, i), from_float64, pws->d[i], 32);
2675            MSA_FLOAT_UNOP(Rw(pwx, i), from_float64, pwt->d[i], 32);
2676        }
2677        break;
2678    default:
2679        assert(0);
2680    }
2681
2682    check_msacsr_cause(env, GETPC());
2683    msa_move_v(pwd, pwx);
2684}
2685
2686#define MSA_FLOAT_UNOP_XD(DEST, OP, ARG, BITS, XBITS)                       \
2687    do {                                                                    \
2688        float_status *status = &env->active_tc.msa_fp_status;               \
2689        int c;                                                              \
2690                                                                            \
2691        set_float_exception_flags(0, status);                               \
2692        DEST = float ## BITS ## _ ## OP(ARG, status);                       \
2693        c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0);                      \
2694                                                                            \
2695        if (get_enabled_exceptions(env, c)) {                               \
2696            DEST = ((FLOAT_SNAN ## XBITS(status) >> 6) << 6) | c;           \
2697        }                                                                   \
2698    } while (0)
2699
2700void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2701                       uint32_t ws, uint32_t wt)
2702{
2703    wr_t wx, *pwx = &wx;
2704    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2705    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2706    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2707    uint32_t i;
2708
2709    clear_msacsr_cause(env);
2710
2711    switch (df) {
2712    case DF_WORD:
2713        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2714            MSA_FLOAT_UNOP_XD(Lh(pwx, i), to_q16, pws->w[i], 32, 16);
2715            MSA_FLOAT_UNOP_XD(Rh(pwx, i), to_q16, pwt->w[i], 32, 16);
2716        }
2717        break;
2718    case DF_DOUBLE:
2719        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2720            MSA_FLOAT_UNOP_XD(Lw(pwx, i), to_q32, pws->d[i], 64, 32);
2721            MSA_FLOAT_UNOP_XD(Rw(pwx, i), to_q32, pwt->d[i], 64, 32);
2722        }
2723        break;
2724    default:
2725        assert(0);
2726    }
2727
2728    check_msacsr_cause(env, GETPC());
2729
2730    msa_move_v(pwd, pwx);
2731}
2732
2733#define NUMBER_QNAN_PAIR(ARG1, ARG2, BITS, STATUS)      \
2734    !float ## BITS ## _is_any_nan(ARG1)                 \
2735    && float ## BITS ## _is_quiet_nan(ARG2, STATUS)
2736
2737#define MSA_FLOAT_MAXOP(DEST, OP, ARG1, ARG2, BITS)                         \
2738    do {                                                                    \
2739        float_status *status = &env->active_tc.msa_fp_status;               \
2740        int c;                                                              \
2741                                                                            \
2742        set_float_exception_flags(0, status);                               \
2743        DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status);                \
2744        c = update_msacsr(env, 0, 0);                                       \
2745                                                                            \
2746        if (get_enabled_exceptions(env, c)) {                               \
2747            DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c;            \
2748        }                                                                   \
2749    } while (0)
2750
2751#define FMAXMIN_A(F, G, X, _S, _T, BITS, STATUS)                    \
2752    do {                                                            \
2753        uint## BITS ##_t S = _S, T = _T;                            \
2754        uint## BITS ##_t as, at, xs, xt, xd;                        \
2755        if (NUMBER_QNAN_PAIR(S, T, BITS, STATUS)) {                 \
2756            T = S;                                                  \
2757        }                                                           \
2758        else if (NUMBER_QNAN_PAIR(T, S, BITS, STATUS)) {            \
2759            S = T;                                                  \
2760        }                                                           \
2761        as = float## BITS ##_abs(S);                                \
2762        at = float## BITS ##_abs(T);                                \
2763        MSA_FLOAT_MAXOP(xs, F,  S,  T, BITS);                       \
2764        MSA_FLOAT_MAXOP(xt, G,  S,  T, BITS);                       \
2765        MSA_FLOAT_MAXOP(xd, F, as, at, BITS);                       \
2766        X = (as == at || xd == float## BITS ##_abs(xs)) ? xs : xt;  \
2767    } while (0)
2768
2769void helper_msa_fmin_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2770        uint32_t ws, uint32_t wt)
2771{
2772    float_status *status = &env->active_tc.msa_fp_status;
2773    wr_t wx, *pwx = &wx;
2774    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2775    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2776    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2777    uint32_t i;
2778
2779    clear_msacsr_cause(env);
2780
2781    switch (df) {
2782    case DF_WORD:
2783        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2784            if (NUMBER_QNAN_PAIR(pws->w[i], pwt->w[i], 32, status)) {
2785                MSA_FLOAT_MAXOP(pwx->w[i], min, pws->w[i], pws->w[i], 32);
2786            } else if (NUMBER_QNAN_PAIR(pwt->w[i], pws->w[i], 32, status)) {
2787                MSA_FLOAT_MAXOP(pwx->w[i], min, pwt->w[i], pwt->w[i], 32);
2788            } else {
2789                MSA_FLOAT_MAXOP(pwx->w[i], min, pws->w[i], pwt->w[i], 32);
2790            }
2791        }
2792        break;
2793    case DF_DOUBLE:
2794        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2795            if (NUMBER_QNAN_PAIR(pws->d[i], pwt->d[i], 64, status)) {
2796                MSA_FLOAT_MAXOP(pwx->d[i], min, pws->d[i], pws->d[i], 64);
2797            } else if (NUMBER_QNAN_PAIR(pwt->d[i], pws->d[i], 64, status)) {
2798                MSA_FLOAT_MAXOP(pwx->d[i], min, pwt->d[i], pwt->d[i], 64);
2799            } else {
2800                MSA_FLOAT_MAXOP(pwx->d[i], min, pws->d[i], pwt->d[i], 64);
2801            }
2802        }
2803        break;
2804    default:
2805        assert(0);
2806    }
2807
2808    check_msacsr_cause(env, GETPC());
2809
2810    msa_move_v(pwd, pwx);
2811}
2812
2813void helper_msa_fmin_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2814        uint32_t ws, uint32_t wt)
2815{
2816    float_status *status = &env->active_tc.msa_fp_status;
2817    wr_t wx, *pwx = &wx;
2818    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2819    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2820    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2821    uint32_t i;
2822
2823    clear_msacsr_cause(env);
2824
2825    switch (df) {
2826    case DF_WORD:
2827        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2828            FMAXMIN_A(min, max, pwx->w[i], pws->w[i], pwt->w[i], 32, status);
2829        }
2830        break;
2831    case DF_DOUBLE:
2832        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2833            FMAXMIN_A(min, max, pwx->d[i], pws->d[i], pwt->d[i], 64, status);
2834        }
2835        break;
2836    default:
2837        assert(0);
2838    }
2839
2840    check_msacsr_cause(env, GETPC());
2841
2842    msa_move_v(pwd, pwx);
2843}
2844
2845void helper_msa_fmax_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2846        uint32_t ws, uint32_t wt)
2847{
2848    float_status *status = &env->active_tc.msa_fp_status;
2849    wr_t wx, *pwx = &wx;
2850    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2851    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2852    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2853    uint32_t i;
2854
2855    clear_msacsr_cause(env);
2856
2857    switch (df) {
2858    case DF_WORD:
2859        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2860            if (NUMBER_QNAN_PAIR(pws->w[i], pwt->w[i], 32, status)) {
2861                MSA_FLOAT_MAXOP(pwx->w[i], max, pws->w[i], pws->w[i], 32);
2862            } else if (NUMBER_QNAN_PAIR(pwt->w[i], pws->w[i], 32, status)) {
2863                MSA_FLOAT_MAXOP(pwx->w[i], max, pwt->w[i], pwt->w[i], 32);
2864            } else {
2865                MSA_FLOAT_MAXOP(pwx->w[i], max, pws->w[i], pwt->w[i], 32);
2866            }
2867        }
2868        break;
2869    case DF_DOUBLE:
2870        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2871            if (NUMBER_QNAN_PAIR(pws->d[i], pwt->d[i], 64, status)) {
2872                MSA_FLOAT_MAXOP(pwx->d[i], max, pws->d[i], pws->d[i], 64);
2873            } else if (NUMBER_QNAN_PAIR(pwt->d[i], pws->d[i], 64, status)) {
2874                MSA_FLOAT_MAXOP(pwx->d[i], max, pwt->d[i], pwt->d[i], 64);
2875            } else {
2876                MSA_FLOAT_MAXOP(pwx->d[i], max, pws->d[i], pwt->d[i], 64);
2877            }
2878        }
2879        break;
2880    default:
2881        assert(0);
2882    }
2883
2884    check_msacsr_cause(env, GETPC());
2885
2886    msa_move_v(pwd, pwx);
2887}
2888
2889void helper_msa_fmax_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2890        uint32_t ws, uint32_t wt)
2891{
2892    float_status *status = &env->active_tc.msa_fp_status;
2893    wr_t wx, *pwx = &wx;
2894    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2895    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2896    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2897    uint32_t i;
2898
2899    clear_msacsr_cause(env);
2900
2901    switch (df) {
2902    case DF_WORD:
2903        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2904            FMAXMIN_A(max, min, pwx->w[i], pws->w[i], pwt->w[i], 32, status);
2905        }
2906        break;
2907    case DF_DOUBLE:
2908        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2909            FMAXMIN_A(max, min, pwx->d[i], pws->d[i], pwt->d[i], 64, status);
2910        }
2911        break;
2912    default:
2913        assert(0);
2914    }
2915
2916    check_msacsr_cause(env, GETPC());
2917
2918    msa_move_v(pwd, pwx);
2919}
2920
2921void helper_msa_fclass_df(CPUMIPSState *env, uint32_t df,
2922        uint32_t wd, uint32_t ws)
2923{
2924    float_status* status = &env->active_tc.msa_fp_status;
2925
2926    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2927    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2928    if (df == DF_WORD) {
2929        pwd->w[0] = float_class_s(pws->w[0], status);
2930        pwd->w[1] = float_class_s(pws->w[1], status);
2931        pwd->w[2] = float_class_s(pws->w[2], status);
2932        pwd->w[3] = float_class_s(pws->w[3], status);
2933    } else {
2934        pwd->d[0] = float_class_d(pws->d[0], status);
2935        pwd->d[1] = float_class_d(pws->d[1], status);
2936    }
2937}
2938
2939#define MSA_FLOAT_UNOP0(DEST, OP, ARG, BITS)                                \
2940    do {                                                                    \
2941        float_status *status = &env->active_tc.msa_fp_status;               \
2942        int c;                                                              \
2943                                                                            \
2944        set_float_exception_flags(0, status);                               \
2945        DEST = float ## BITS ## _ ## OP(ARG, status);                       \
2946        c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0);                      \
2947                                                                            \
2948        if (get_enabled_exceptions(env, c)) {                               \
2949            DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c;            \
2950        } else if (float ## BITS ## _is_any_nan(ARG)) {                     \
2951            DEST = 0;                                                       \
2952        }                                                                   \
2953    } while (0)
2954
2955void helper_msa_ftrunc_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2956                            uint32_t ws)
2957{
2958    wr_t wx, *pwx = &wx;
2959    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2960    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2961    uint32_t i;
2962
2963    clear_msacsr_cause(env);
2964
2965    switch (df) {
2966    case DF_WORD:
2967        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2968            MSA_FLOAT_UNOP0(pwx->w[i], to_int32_round_to_zero, pws->w[i], 32);
2969        }
2970        break;
2971    case DF_DOUBLE:
2972        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2973            MSA_FLOAT_UNOP0(pwx->d[i], to_int64_round_to_zero, pws->d[i], 64);
2974        }
2975        break;
2976    default:
2977        assert(0);
2978    }
2979
2980    check_msacsr_cause(env, GETPC());
2981
2982    msa_move_v(pwd, pwx);
2983}
2984
2985void helper_msa_ftrunc_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2986                            uint32_t ws)
2987{
2988    wr_t wx, *pwx = &wx;
2989    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2990    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2991    uint32_t i;
2992
2993    clear_msacsr_cause(env);
2994
2995    switch (df) {
2996    case DF_WORD:
2997        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2998            MSA_FLOAT_UNOP0(pwx->w[i], to_uint32_round_to_zero, pws->w[i], 32);
2999        }
3000        break;
3001    case DF_DOUBLE:
3002        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3003            MSA_FLOAT_UNOP0(pwx->d[i], to_uint64_round_to_zero, pws->d[i], 64);
3004        }
3005        break;
3006    default:
3007        assert(0);
3008    }
3009
3010    check_msacsr_cause(env, GETPC());
3011
3012    msa_move_v(pwd, pwx);
3013}
3014
3015void helper_msa_fsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3016                         uint32_t ws)
3017{
3018    wr_t wx, *pwx = &wx;
3019    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3020    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3021    uint32_t i;
3022
3023    clear_msacsr_cause(env);
3024
3025    switch (df) {
3026    case DF_WORD:
3027        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3028            MSA_FLOAT_UNOP(pwx->w[i], sqrt, pws->w[i], 32);
3029        }
3030        break;
3031    case DF_DOUBLE:
3032        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3033            MSA_FLOAT_UNOP(pwx->d[i], sqrt, pws->d[i], 64);
3034        }
3035        break;
3036    default:
3037        assert(0);
3038    }
3039
3040    check_msacsr_cause(env, GETPC());
3041
3042    msa_move_v(pwd, pwx);
3043}
3044
3045#define MSA_FLOAT_RECIPROCAL(DEST, ARG, BITS)                               \
3046    do {                                                                    \
3047        float_status *status = &env->active_tc.msa_fp_status;               \
3048        int c;                                                              \
3049                                                                            \
3050        set_float_exception_flags(0, status);                               \
3051        DEST = float ## BITS ## _ ## div(FLOAT_ONE ## BITS, ARG, status);   \
3052        c = update_msacsr(env, float ## BITS ## _is_infinity(ARG) ||        \
3053                          float ## BITS ## _is_quiet_nan(DEST, status) ?    \
3054                          0 : RECIPROCAL_INEXACT,                           \
3055                          IS_DENORMAL(DEST, BITS));                         \
3056                                                                            \
3057        if (get_enabled_exceptions(env, c)) {                               \
3058            DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c;            \
3059        }                                                                   \
3060    } while (0)
3061
3062void helper_msa_frsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3063                          uint32_t ws)
3064{
3065    wr_t wx, *pwx = &wx;
3066    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3067    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3068    uint32_t i;
3069
3070    clear_msacsr_cause(env);
3071
3072    switch (df) {
3073    case DF_WORD:
3074        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3075            MSA_FLOAT_RECIPROCAL(pwx->w[i], float32_sqrt(pws->w[i],
3076                    &env->active_tc.msa_fp_status), 32);
3077        }
3078        break;
3079    case DF_DOUBLE:
3080        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3081            MSA_FLOAT_RECIPROCAL(pwx->d[i], float64_sqrt(pws->d[i],
3082                    &env->active_tc.msa_fp_status), 64);
3083        }
3084        break;
3085    default:
3086        assert(0);
3087    }
3088
3089    check_msacsr_cause(env, GETPC());
3090
3091    msa_move_v(pwd, pwx);
3092}
3093
3094void helper_msa_frcp_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3095                        uint32_t ws)
3096{
3097    wr_t wx, *pwx = &wx;
3098    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3099    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3100    uint32_t i;
3101
3102    clear_msacsr_cause(env);
3103
3104    switch (df) {
3105    case DF_WORD:
3106        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3107            MSA_FLOAT_RECIPROCAL(pwx->w[i], pws->w[i], 32);
3108        }
3109        break;
3110    case DF_DOUBLE:
3111        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3112            MSA_FLOAT_RECIPROCAL(pwx->d[i], pws->d[i], 64);
3113        }
3114        break;
3115    default:
3116        assert(0);
3117    }
3118
3119    check_msacsr_cause(env, GETPC());
3120
3121    msa_move_v(pwd, pwx);
3122}
3123
3124void helper_msa_frint_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3125                         uint32_t ws)
3126{
3127    wr_t wx, *pwx = &wx;
3128    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3129    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3130    uint32_t i;
3131
3132    clear_msacsr_cause(env);
3133
3134    switch (df) {
3135    case DF_WORD:
3136        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3137            MSA_FLOAT_UNOP(pwx->w[i], round_to_int, pws->w[i], 32);
3138        }
3139        break;
3140    case DF_DOUBLE:
3141        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3142            MSA_FLOAT_UNOP(pwx->d[i], round_to_int, pws->d[i], 64);
3143        }
3144        break;
3145    default:
3146        assert(0);
3147    }
3148
3149    check_msacsr_cause(env, GETPC());
3150
3151    msa_move_v(pwd, pwx);
3152}
3153
3154#define MSA_FLOAT_LOGB(DEST, ARG, BITS)                                     \
3155    do {                                                                    \
3156        float_status *status = &env->active_tc.msa_fp_status;               \
3157        int c;                                                              \
3158                                                                            \
3159        set_float_exception_flags(0, status);                               \
3160        set_float_rounding_mode(float_round_down, status);                  \
3161        DEST = float ## BITS ## _ ## log2(ARG, status);                     \
3162        DEST = float ## BITS ## _ ## round_to_int(DEST, status);            \
3163        set_float_rounding_mode(ieee_rm[(env->active_tc.msacsr &            \
3164                                         MSACSR_RM_MASK) >> MSACSR_RM],     \
3165                                status);                                    \
3166                                                                            \
3167        set_float_exception_flags(get_float_exception_flags(status) &       \
3168                                  (~float_flag_inexact),                    \
3169                                  status);                                  \
3170                                                                            \
3171        c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS));                 \
3172                                                                            \
3173        if (get_enabled_exceptions(env, c)) {                               \
3174            DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c;            \
3175        }                                                                   \
3176    } while (0)
3177
3178void helper_msa_flog2_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3179                         uint32_t ws)
3180{
3181    wr_t wx, *pwx = &wx;
3182    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3183    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3184    uint32_t i;
3185
3186    clear_msacsr_cause(env);
3187
3188    switch (df) {
3189    case DF_WORD:
3190        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3191            MSA_FLOAT_LOGB(pwx->w[i], pws->w[i], 32);
3192        }
3193        break;
3194    case DF_DOUBLE:
3195        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3196            MSA_FLOAT_LOGB(pwx->d[i], pws->d[i], 64);
3197        }
3198        break;
3199    default:
3200        assert(0);
3201    }
3202
3203    check_msacsr_cause(env, GETPC());
3204
3205    msa_move_v(pwd, pwx);
3206}
3207
3208void helper_msa_fexupl_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3209                          uint32_t ws)
3210{
3211    wr_t wx, *pwx = &wx;
3212    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3213    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3214    uint32_t i;
3215
3216    clear_msacsr_cause(env);
3217
3218    switch (df) {
3219    case DF_WORD:
3220        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3221            /* Half precision floats come in two formats: standard
3222               IEEE and "ARM" format.  The latter gains extra exponent
3223               range by omitting the NaN/Inf encodings.  */
3224            flag ieee = 1;
3225
3226            MSA_FLOAT_BINOP(pwx->w[i], from_float16, Lh(pws, i), ieee, 32);
3227        }
3228        break;
3229    case DF_DOUBLE:
3230        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3231            MSA_FLOAT_UNOP(pwx->d[i], from_float32, Lw(pws, i), 64);
3232        }
3233        break;
3234    default:
3235        assert(0);
3236    }
3237
3238    check_msacsr_cause(env, GETPC());
3239    msa_move_v(pwd, pwx);
3240}
3241
3242void helper_msa_fexupr_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3243                          uint32_t ws)
3244{
3245    wr_t wx, *pwx = &wx;
3246    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3247    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3248    uint32_t i;
3249
3250    clear_msacsr_cause(env);
3251
3252    switch (df) {
3253    case DF_WORD:
3254        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3255            /* Half precision floats come in two formats: standard
3256               IEEE and "ARM" format.  The latter gains extra exponent
3257               range by omitting the NaN/Inf encodings.  */
3258            flag ieee = 1;
3259
3260            MSA_FLOAT_BINOP(pwx->w[i], from_float16, Rh(pws, i), ieee, 32);
3261        }
3262        break;
3263    case DF_DOUBLE:
3264        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3265            MSA_FLOAT_UNOP(pwx->d[i], from_float32, Rw(pws, i), 64);
3266        }
3267        break;
3268    default:
3269        assert(0);
3270    }
3271
3272    check_msacsr_cause(env, GETPC());
3273    msa_move_v(pwd, pwx);
3274}
3275
3276void helper_msa_ffql_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3277                        uint32_t ws)
3278{
3279    wr_t wx, *pwx = &wx;
3280    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3281    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3282    uint32_t i;
3283
3284    switch (df) {
3285    case DF_WORD:
3286        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3287            MSA_FLOAT_UNOP(pwx->w[i], from_q16, Lh(pws, i), 32);
3288        }
3289        break;
3290    case DF_DOUBLE:
3291        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3292            MSA_FLOAT_UNOP(pwx->d[i], from_q32, Lw(pws, i), 64);
3293        }
3294        break;
3295    default:
3296        assert(0);
3297    }
3298
3299    msa_move_v(pwd, pwx);
3300}
3301
3302void helper_msa_ffqr_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3303                        uint32_t ws)
3304{
3305    wr_t wx, *pwx = &wx;
3306    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3307    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3308    uint32_t i;
3309
3310    switch (df) {
3311    case DF_WORD:
3312        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3313            MSA_FLOAT_UNOP(pwx->w[i], from_q16, Rh(pws, i), 32);
3314        }
3315        break;
3316    case DF_DOUBLE:
3317        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3318            MSA_FLOAT_UNOP(pwx->d[i], from_q32, Rw(pws, i), 64);
3319        }
3320        break;
3321    default:
3322        assert(0);
3323    }
3324
3325    msa_move_v(pwd, pwx);
3326}
3327
3328void helper_msa_ftint_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3329                           uint32_t ws)
3330{
3331    wr_t wx, *pwx = &wx;
3332    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3333    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3334    uint32_t i;
3335
3336    clear_msacsr_cause(env);
3337
3338    switch (df) {
3339    case DF_WORD:
3340        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3341            MSA_FLOAT_UNOP0(pwx->w[i], to_int32, pws->w[i], 32);
3342        }
3343        break;
3344    case DF_DOUBLE:
3345        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3346            MSA_FLOAT_UNOP0(pwx->d[i], to_int64, pws->d[i], 64);
3347        }
3348        break;
3349    default:
3350        assert(0);
3351    }
3352
3353    check_msacsr_cause(env, GETPC());
3354
3355    msa_move_v(pwd, pwx);
3356}
3357
3358void helper_msa_ftint_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3359                           uint32_t ws)
3360{
3361    wr_t wx, *pwx = &wx;
3362    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3363    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3364    uint32_t i;
3365
3366    clear_msacsr_cause(env);
3367
3368    switch (df) {
3369    case DF_WORD:
3370        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3371            MSA_FLOAT_UNOP0(pwx->w[i], to_uint32, pws->w[i], 32);
3372        }
3373        break;
3374    case DF_DOUBLE:
3375        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3376            MSA_FLOAT_UNOP0(pwx->d[i], to_uint64, pws->d[i], 64);
3377        }
3378        break;
3379    default:
3380        assert(0);
3381    }
3382
3383    check_msacsr_cause(env, GETPC());
3384
3385    msa_move_v(pwd, pwx);
3386}
3387
3388#define float32_from_int32 int32_to_float32
3389#define float32_from_uint32 uint32_to_float32
3390
3391#define float64_from_int64 int64_to_float64
3392#define float64_from_uint64 uint64_to_float64
3393
3394void helper_msa_ffint_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3395                           uint32_t ws)
3396{
3397    wr_t wx, *pwx = &wx;
3398    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3399    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3400    uint32_t i;
3401
3402    clear_msacsr_cause(env);
3403
3404    switch (df) {
3405    case DF_WORD:
3406        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3407            MSA_FLOAT_UNOP(pwx->w[i], from_int32, pws->w[i], 32);
3408        }
3409        break;
3410    case DF_DOUBLE:
3411        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3412            MSA_FLOAT_UNOP(pwx->d[i], from_int64, pws->d[i], 64);
3413        }
3414        break;
3415    default:
3416        assert(0);
3417    }
3418
3419    check_msacsr_cause(env, GETPC());
3420
3421    msa_move_v(pwd, pwx);
3422}
3423
3424void helper_msa_ffint_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3425                           uint32_t ws)
3426{
3427    wr_t wx, *pwx = &wx;
3428    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3429    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3430    uint32_t i;
3431
3432    clear_msacsr_cause(env);
3433
3434    switch (df) {
3435    case DF_WORD:
3436        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3437            MSA_FLOAT_UNOP(pwx->w[i], from_uint32, pws->w[i], 32);
3438        }
3439        break;
3440    case DF_DOUBLE:
3441        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3442            MSA_FLOAT_UNOP(pwx->d[i], from_uint64, pws->d[i], 64);
3443        }
3444        break;
3445    default:
3446        assert(0);
3447    }
3448
3449    check_msacsr_cause(env, GETPC());
3450
3451    msa_move_v(pwd, pwx);
3452}
3453