qemu/hw/intc/xics_kvm.c
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   1/*
   2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
   3 *
   4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation
   5 *
   6 * Copyright (c) 2013 David Gibson, IBM Corporation.
   7 *
   8 * Permission is hereby granted, free of charge, to any person obtaining a copy
   9 * of this software and associated documentation files (the "Software"), to deal
  10 * in the Software without restriction, including without limitation the rights
  11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12 * copies of the Software, and to permit persons to whom the Software is
  13 * furnished to do so, subject to the following conditions:
  14 *
  15 * The above copyright notice and this permission notice shall be included in
  16 * all copies or substantial portions of the Software.
  17 *
  18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24 * THE SOFTWARE.
  25 *
  26 */
  27
  28#include "qemu/osdep.h"
  29#include "qapi/error.h"
  30#include "qemu-common.h"
  31#include "cpu.h"
  32#include "hw/hw.h"
  33#include "trace.h"
  34#include "sysemu/kvm.h"
  35#include "hw/ppc/spapr.h"
  36#include "hw/ppc/xics.h"
  37#include "kvm_ppc.h"
  38#include "qemu/config-file.h"
  39#include "qemu/error-report.h"
  40
  41#include <sys/ioctl.h>
  42
  43static int kernel_xics_fd = -1;
  44
  45typedef struct KVMEnabledICP {
  46    unsigned long vcpu_id;
  47    QLIST_ENTRY(KVMEnabledICP) node;
  48} KVMEnabledICP;
  49
  50static QLIST_HEAD(, KVMEnabledICP)
  51    kvm_enabled_icps = QLIST_HEAD_INITIALIZER(&kvm_enabled_icps);
  52
  53/*
  54 * ICP-KVM
  55 */
  56static void icp_get_kvm_state(ICPState *icp)
  57{
  58    uint64_t state;
  59    int ret;
  60
  61    /* ICP for this CPU thread is not in use, exiting */
  62    if (!icp->cs) {
  63        return;
  64    }
  65
  66    ret = kvm_get_one_reg(icp->cs, KVM_REG_PPC_ICP_STATE, &state);
  67    if (ret != 0) {
  68        error_report("Unable to retrieve KVM interrupt controller state"
  69                " for CPU %ld: %s", kvm_arch_vcpu_id(icp->cs), strerror(errno));
  70        exit(1);
  71    }
  72
  73    icp->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT;
  74    icp->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT)
  75        & KVM_REG_PPC_ICP_MFRR_MASK;
  76    icp->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT)
  77        & KVM_REG_PPC_ICP_PPRI_MASK;
  78}
  79
  80static void do_icp_synchronize_state(CPUState *cpu, run_on_cpu_data arg)
  81{
  82    icp_get_kvm_state(arg.host_ptr);
  83}
  84
  85static void icp_synchronize_state(ICPState *icp)
  86{
  87    if (icp->cs) {
  88        run_on_cpu(icp->cs, do_icp_synchronize_state, RUN_ON_CPU_HOST_PTR(icp));
  89    }
  90}
  91
  92static int icp_set_kvm_state(ICPState *icp, int version_id)
  93{
  94    uint64_t state;
  95    int ret;
  96
  97    /* ICP for this CPU thread is not in use, exiting */
  98    if (!icp->cs) {
  99        return 0;
 100    }
 101
 102    state = ((uint64_t)icp->xirr << KVM_REG_PPC_ICP_XISR_SHIFT)
 103        | ((uint64_t)icp->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT)
 104        | ((uint64_t)icp->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT);
 105
 106    ret = kvm_set_one_reg(icp->cs, KVM_REG_PPC_ICP_STATE, &state);
 107    if (ret != 0) {
 108        error_report("Unable to restore KVM interrupt controller state (0x%"
 109                PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(icp->cs),
 110                strerror(errno));
 111        return ret;
 112    }
 113
 114    return 0;
 115}
 116
 117static void icp_kvm_reset(DeviceState *dev)
 118{
 119    ICPStateClass *icpc = ICP_GET_CLASS(dev);
 120
 121    icpc->parent_reset(dev);
 122
 123    icp_set_kvm_state(ICP(dev), 1);
 124}
 125
 126static void icp_kvm_realize(DeviceState *dev, Error **errp)
 127{
 128    ICPState *icp = ICP(dev);
 129    ICPStateClass *icpc = ICP_GET_CLASS(icp);
 130    Error *local_err = NULL;
 131    CPUState *cs;
 132    KVMEnabledICP *enabled_icp;
 133    unsigned long vcpu_id;
 134    int ret;
 135
 136    if (kernel_xics_fd == -1) {
 137        abort();
 138    }
 139
 140    icpc->parent_realize(dev, &local_err);
 141    if (local_err) {
 142        error_propagate(errp, local_err);
 143        return;
 144    }
 145
 146    cs = icp->cs;
 147    vcpu_id = kvm_arch_vcpu_id(cs);
 148
 149    /*
 150     * If we are reusing a parked vCPU fd corresponding to the CPU
 151     * which was hot-removed earlier we don't have to renable
 152     * KVM_CAP_IRQ_XICS capability again.
 153     */
 154    QLIST_FOREACH(enabled_icp, &kvm_enabled_icps, node) {
 155        if (enabled_icp->vcpu_id == vcpu_id) {
 156            return;
 157        }
 158    }
 159
 160    ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd, vcpu_id);
 161    if (ret < 0) {
 162        error_setg(errp, "Unable to connect CPU%ld to kernel XICS: %s", vcpu_id,
 163                   strerror(errno));
 164        return;
 165    }
 166    enabled_icp = g_malloc(sizeof(*enabled_icp));
 167    enabled_icp->vcpu_id = vcpu_id;
 168    QLIST_INSERT_HEAD(&kvm_enabled_icps, enabled_icp, node);
 169}
 170
 171static void icp_kvm_class_init(ObjectClass *klass, void *data)
 172{
 173    DeviceClass *dc = DEVICE_CLASS(klass);
 174    ICPStateClass *icpc = ICP_CLASS(klass);
 175
 176    device_class_set_parent_realize(dc, icp_kvm_realize,
 177                                    &icpc->parent_realize);
 178    device_class_set_parent_reset(dc, icp_kvm_reset,
 179                                  &icpc->parent_reset);
 180
 181    icpc->pre_save = icp_get_kvm_state;
 182    icpc->post_load = icp_set_kvm_state;
 183    icpc->synchronize_state = icp_synchronize_state;
 184}
 185
 186static const TypeInfo icp_kvm_info = {
 187    .name = TYPE_KVM_ICP,
 188    .parent = TYPE_ICP,
 189    .instance_size = sizeof(ICPState),
 190    .class_init = icp_kvm_class_init,
 191    .class_size = sizeof(ICPStateClass),
 192};
 193
 194/*
 195 * ICS-KVM
 196 */
 197static void ics_get_kvm_state(ICSState *ics)
 198{
 199    uint64_t state;
 200    int i;
 201
 202    for (i = 0; i < ics->nr_irqs; i++) {
 203        ICSIRQState *irq = &ics->irqs[i];
 204
 205        kvm_device_access(kernel_xics_fd, KVM_DEV_XICS_GRP_SOURCES,
 206                          i + ics->offset, &state, false, &error_fatal);
 207
 208        irq->server = state & KVM_XICS_DESTINATION_MASK;
 209        irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT)
 210            & KVM_XICS_PRIORITY_MASK;
 211        /*
 212         * To be consistent with the software emulation in xics.c, we
 213         * split out the masked state + priority that we get from the
 214         * kernel into 'current priority' (0xff if masked) and
 215         * 'saved priority' (if masked, this is the priority the
 216         * interrupt had before it was masked).  Masking and unmasking
 217         * are done with the ibm,int-off and ibm,int-on RTAS calls.
 218         */
 219        if (state & KVM_XICS_MASKED) {
 220            irq->priority = 0xff;
 221        } else {
 222            irq->priority = irq->saved_priority;
 223        }
 224
 225        irq->status = 0;
 226        if (state & KVM_XICS_PENDING) {
 227            if (state & KVM_XICS_LEVEL_SENSITIVE) {
 228                irq->status |= XICS_STATUS_ASSERTED;
 229            } else {
 230                /*
 231                 * A pending edge-triggered interrupt (or MSI)
 232                 * must have been rejected previously when we
 233                 * first detected it and tried to deliver it,
 234                 * so mark it as pending and previously rejected
 235                 * for consistency with how xics.c works.
 236                 */
 237                irq->status |= XICS_STATUS_MASKED_PENDING
 238                    | XICS_STATUS_REJECTED;
 239            }
 240        }
 241        if (state & KVM_XICS_PRESENTED) {
 242                irq->status |= XICS_STATUS_PRESENTED;
 243        }
 244        if (state & KVM_XICS_QUEUED) {
 245                irq->status |= XICS_STATUS_QUEUED;
 246        }
 247    }
 248}
 249
 250static void ics_synchronize_state(ICSState *ics)
 251{
 252    ics_get_kvm_state(ics);
 253}
 254
 255static int ics_set_kvm_state(ICSState *ics, int version_id)
 256{
 257    uint64_t state;
 258    int i;
 259    Error *local_err = NULL;
 260
 261    for (i = 0; i < ics->nr_irqs; i++) {
 262        ICSIRQState *irq = &ics->irqs[i];
 263        int ret;
 264
 265        state = irq->server;
 266        state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
 267            << KVM_XICS_PRIORITY_SHIFT;
 268        if (irq->priority != irq->saved_priority) {
 269            assert(irq->priority == 0xff);
 270            state |= KVM_XICS_MASKED;
 271        }
 272
 273        if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
 274            state |= KVM_XICS_LEVEL_SENSITIVE;
 275            if (irq->status & XICS_STATUS_ASSERTED) {
 276                state |= KVM_XICS_PENDING;
 277            }
 278        } else {
 279            if (irq->status & XICS_STATUS_MASKED_PENDING) {
 280                state |= KVM_XICS_PENDING;
 281            }
 282        }
 283        if (irq->status & XICS_STATUS_PRESENTED) {
 284                state |= KVM_XICS_PRESENTED;
 285        }
 286        if (irq->status & XICS_STATUS_QUEUED) {
 287                state |= KVM_XICS_QUEUED;
 288        }
 289
 290        ret = kvm_device_access(kernel_xics_fd, KVM_DEV_XICS_GRP_SOURCES,
 291                                i + ics->offset, &state, true, &local_err);
 292        if (local_err) {
 293            error_report_err(local_err);
 294            return ret;
 295        }
 296    }
 297
 298    return 0;
 299}
 300
 301static void ics_kvm_set_irq(void *opaque, int srcno, int val)
 302{
 303    ICSState *ics = opaque;
 304    struct kvm_irq_level args;
 305    int rc;
 306
 307    args.irq = srcno + ics->offset;
 308    if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) {
 309        if (!val) {
 310            return;
 311        }
 312        args.level = KVM_INTERRUPT_SET;
 313    } else {
 314        args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
 315    }
 316    rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
 317    if (rc < 0) {
 318        perror("kvm_irq_line");
 319    }
 320}
 321
 322static void ics_kvm_reset(DeviceState *dev)
 323{
 324    ICSStateClass *icsc = ICS_BASE_GET_CLASS(dev);
 325
 326    icsc->parent_reset(dev);
 327
 328    ics_set_kvm_state(ICS_KVM(dev), 1);
 329}
 330
 331static void ics_kvm_reset_handler(void *dev)
 332{
 333    ics_kvm_reset(dev);
 334}
 335
 336static void ics_kvm_realize(DeviceState *dev, Error **errp)
 337{
 338    ICSState *ics = ICS_KVM(dev);
 339    ICSStateClass *icsc = ICS_BASE_GET_CLASS(ics);
 340    Error *local_err = NULL;
 341
 342    icsc->parent_realize(dev, &local_err);
 343    if (local_err) {
 344        error_propagate(errp, local_err);
 345        return;
 346    }
 347    ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);
 348
 349    qemu_register_reset(ics_kvm_reset_handler, ics);
 350}
 351
 352static void ics_kvm_class_init(ObjectClass *klass, void *data)
 353{
 354    ICSStateClass *icsc = ICS_BASE_CLASS(klass);
 355    DeviceClass *dc = DEVICE_CLASS(klass);
 356
 357    device_class_set_parent_realize(dc, ics_kvm_realize,
 358                                    &icsc->parent_realize);
 359    device_class_set_parent_reset(dc, ics_kvm_reset,
 360                                  &icsc->parent_reset);
 361
 362    icsc->pre_save = ics_get_kvm_state;
 363    icsc->post_load = ics_set_kvm_state;
 364    icsc->synchronize_state = ics_synchronize_state;
 365}
 366
 367static const TypeInfo ics_kvm_info = {
 368    .name = TYPE_ICS_KVM,
 369    .parent = TYPE_ICS_BASE,
 370    .instance_size = sizeof(ICSState),
 371    .class_init = ics_kvm_class_init,
 372};
 373
 374/*
 375 * XICS-KVM
 376 */
 377
 378static void rtas_dummy(PowerPCCPU *cpu, sPAPRMachineState *spapr,
 379                       uint32_t token,
 380                       uint32_t nargs, target_ulong args,
 381                       uint32_t nret, target_ulong rets)
 382{
 383    error_report("pseries: %s must never be called for in-kernel XICS",
 384                 __func__);
 385}
 386
 387int xics_kvm_init(sPAPRMachineState *spapr, Error **errp)
 388{
 389    int rc;
 390
 391    if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
 392        error_setg(errp,
 393                   "KVM and IRQ_XICS capability must be present for in-kernel XICS");
 394        goto fail;
 395    }
 396
 397    spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_dummy);
 398    spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_dummy);
 399    spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_dummy);
 400    spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_dummy);
 401
 402    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive");
 403    if (rc < 0) {
 404        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive");
 405        goto fail;
 406    }
 407
 408    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive");
 409    if (rc < 0) {
 410        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive");
 411        goto fail;
 412    }
 413
 414    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on");
 415    if (rc < 0) {
 416        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on");
 417        goto fail;
 418    }
 419
 420    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off");
 421    if (rc < 0) {
 422        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off");
 423        goto fail;
 424    }
 425
 426    /* Create the KVM XICS device */
 427    rc = kvm_create_device(kvm_state, KVM_DEV_TYPE_XICS, false);
 428    if (rc < 0) {
 429        error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS");
 430        goto fail;
 431    }
 432
 433    kernel_xics_fd = rc;
 434    kvm_kernel_irqchip = true;
 435    kvm_msi_via_irqfd_allowed = true;
 436    kvm_gsi_direct_mapping = true;
 437
 438    return 0;
 439
 440fail:
 441    kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
 442    kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
 443    kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
 444    kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
 445    return -1;
 446}
 447
 448static void xics_kvm_register_types(void)
 449{
 450    type_register_static(&ics_kvm_info);
 451    type_register_static(&icp_kvm_info);
 452}
 453
 454type_init(xics_kvm_register_types)
 455