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28#include "qemu/osdep.h"
29#include "qemu/event_notifier.h"
30#include "qemu/thread.h"
31#include "qemu/sockets.h"
32#include "qapi/error.h"
33#include "chardev/char.h"
34#include "hw/hw.h"
35#include "hw/pci/pci.h"
36#include "net/can_emu.h"
37
38#include "can_sja1000.h"
39
40#define TYPE_CAN_PCI_DEV "pcm3680_pci"
41
42#define PCM3680i_PCI_DEV(obj) \
43 OBJECT_CHECK(Pcm3680iPCIState, (obj), TYPE_CAN_PCI_DEV)
44
45
46#ifndef PCM3680i_PCI_VENDOR_ID1
47#define PCM3680i_PCI_VENDOR_ID1 0x13fe
48#endif
49
50#ifndef PCM3680i_PCI_DEVICE_ID1
51#define PCM3680i_PCI_DEVICE_ID1 0xc002
52#endif
53
54#define PCM3680i_PCI_SJA_COUNT 2
55#define PCM3680i_PCI_SJA_RANGE 0x100
56
57#define PCM3680i_PCI_BYTES_PER_SJA 0x20
58
59typedef struct Pcm3680iPCIState {
60
61 PCIDevice dev;
62
63 MemoryRegion sja_io[PCM3680i_PCI_SJA_COUNT];
64
65 CanSJA1000State sja_state[PCM3680i_PCI_SJA_COUNT];
66 qemu_irq irq;
67
68 char *model;
69 CanBusState *canbus[PCM3680i_PCI_SJA_COUNT];
70} Pcm3680iPCIState;
71
72static void pcm3680i_pci_reset(DeviceState *dev)
73{
74 Pcm3680iPCIState *d = PCM3680i_PCI_DEV(dev);
75 int i;
76
77 for (i = 0; i < PCM3680i_PCI_SJA_COUNT; i++) {
78 can_sja_hardware_reset(&d->sja_state[i]);
79 }
80}
81
82static uint64_t pcm3680i_pci_sja1_io_read(void *opaque, hwaddr addr,
83 unsigned size)
84{
85 Pcm3680iPCIState *d = opaque;
86 CanSJA1000State *s = &d->sja_state[0];
87
88 if (addr >= PCM3680i_PCI_BYTES_PER_SJA) {
89 return 0;
90 }
91
92 return can_sja_mem_read(s, addr, size);
93}
94
95static void pcm3680i_pci_sja1_io_write(void *opaque, hwaddr addr,
96 uint64_t data, unsigned size)
97{
98 Pcm3680iPCIState *d = opaque;
99 CanSJA1000State *s = &d->sja_state[0];
100
101 if (addr >= PCM3680i_PCI_BYTES_PER_SJA) {
102 return;
103 }
104
105 can_sja_mem_write(s, addr, data, size);
106}
107
108static uint64_t pcm3680i_pci_sja2_io_read(void *opaque, hwaddr addr,
109 unsigned size)
110{
111 Pcm3680iPCIState *d = opaque;
112 CanSJA1000State *s = &d->sja_state[1];
113
114 if (addr >= PCM3680i_PCI_BYTES_PER_SJA) {
115 return 0;
116 }
117
118 return can_sja_mem_read(s, addr, size);
119}
120
121static void pcm3680i_pci_sja2_io_write(void *opaque, hwaddr addr, uint64_t data,
122 unsigned size)
123{
124 Pcm3680iPCIState *d = opaque;
125 CanSJA1000State *s = &d->sja_state[1];
126
127 if (addr >= PCM3680i_PCI_BYTES_PER_SJA) {
128 return;
129 }
130
131 can_sja_mem_write(s, addr, data, size);
132}
133
134static const MemoryRegionOps pcm3680i_pci_sja1_io_ops = {
135 .read = pcm3680i_pci_sja1_io_read,
136 .write = pcm3680i_pci_sja1_io_write,
137 .endianness = DEVICE_LITTLE_ENDIAN,
138 .impl = {
139 .max_access_size = 1,
140 },
141};
142
143static const MemoryRegionOps pcm3680i_pci_sja2_io_ops = {
144 .read = pcm3680i_pci_sja2_io_read,
145 .write = pcm3680i_pci_sja2_io_write,
146 .endianness = DEVICE_LITTLE_ENDIAN,
147 .impl = {
148 .max_access_size = 1,
149 },
150};
151
152static void pcm3680i_pci_realize(PCIDevice *pci_dev, Error **errp)
153{
154 Pcm3680iPCIState *d = PCM3680i_PCI_DEV(pci_dev);
155 uint8_t *pci_conf;
156 int i;
157
158 pci_conf = pci_dev->config;
159 pci_conf[PCI_INTERRUPT_PIN] = 0x01;
160
161 d->irq = pci_allocate_irq(&d->dev);
162
163 for (i = 0; i < PCM3680i_PCI_SJA_COUNT; i++) {
164 can_sja_init(&d->sja_state[i], d->irq);
165 }
166
167 for (i = 0; i < PCM3680i_PCI_SJA_COUNT; i++) {
168 if (can_sja_connect_to_bus(&d->sja_state[i], d->canbus[i]) < 0) {
169 error_setg(errp, "can_sja_connect_to_bus failed");
170 return;
171 }
172 }
173
174 memory_region_init_io(&d->sja_io[0], OBJECT(d), &pcm3680i_pci_sja1_io_ops,
175 d, "pcm3680i_pci-sja1", PCM3680i_PCI_SJA_RANGE);
176
177 memory_region_init_io(&d->sja_io[1], OBJECT(d), &pcm3680i_pci_sja2_io_ops,
178 d, "pcm3680i_pci-sja2", PCM3680i_PCI_SJA_RANGE);
179
180 for (i = 0; i < PCM3680i_PCI_SJA_COUNT; i++) {
181 pci_register_bar(&d->dev, i, PCI_BASE_ADDRESS_SPACE_IO,
182 &d->sja_io[i]);
183 }
184}
185
186static void pcm3680i_pci_exit(PCIDevice *pci_dev)
187{
188 Pcm3680iPCIState *d = PCM3680i_PCI_DEV(pci_dev);
189 int i;
190
191 for (i = 0; i < PCM3680i_PCI_SJA_COUNT; i++) {
192 can_sja_disconnect(&d->sja_state[i]);
193 }
194
195 qemu_free_irq(d->irq);
196}
197
198static const VMStateDescription vmstate_pcm3680i_pci = {
199 .name = "pcm3680i_pci",
200 .version_id = 1,
201 .minimum_version_id = 1,
202 .minimum_version_id_old = 1,
203 .fields = (VMStateField[]) {
204 VMSTATE_PCI_DEVICE(dev, Pcm3680iPCIState),
205 VMSTATE_STRUCT(sja_state[0], Pcm3680iPCIState, 0,
206 vmstate_can_sja, CanSJA1000State),
207 VMSTATE_STRUCT(sja_state[1], Pcm3680iPCIState, 0,
208 vmstate_can_sja, CanSJA1000State),
209 VMSTATE_END_OF_LIST()
210 }
211};
212
213static void pcm3680i_pci_instance_init(Object *obj)
214{
215 Pcm3680iPCIState *d = PCM3680i_PCI_DEV(obj);
216
217 object_property_add_link(obj, "canbus0", TYPE_CAN_BUS,
218 (Object **)&d->canbus[0],
219 qdev_prop_allow_set_link_before_realize,
220 0, &error_abort);
221 object_property_add_link(obj, "canbus1", TYPE_CAN_BUS,
222 (Object **)&d->canbus[1],
223 qdev_prop_allow_set_link_before_realize,
224 0, &error_abort);
225}
226
227static void pcm3680i_pci_class_init(ObjectClass *klass, void *data)
228{
229 DeviceClass *dc = DEVICE_CLASS(klass);
230 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
231
232 k->realize = pcm3680i_pci_realize;
233 k->exit = pcm3680i_pci_exit;
234 k->vendor_id = PCM3680i_PCI_VENDOR_ID1;
235 k->device_id = PCM3680i_PCI_DEVICE_ID1;
236 k->revision = 0x00;
237 k->class_id = 0x000c09;
238 k->subsystem_vendor_id = PCM3680i_PCI_VENDOR_ID1;
239 k->subsystem_id = PCM3680i_PCI_DEVICE_ID1;
240 dc->desc = "Pcm3680i PCICANx";
241 dc->vmsd = &vmstate_pcm3680i_pci;
242 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
243 dc->reset = pcm3680i_pci_reset;
244}
245
246static const TypeInfo pcm3680i_pci_info = {
247 .name = TYPE_CAN_PCI_DEV,
248 .parent = TYPE_PCI_DEVICE,
249 .instance_size = sizeof(Pcm3680iPCIState),
250 .class_init = pcm3680i_pci_class_init,
251 .instance_init = pcm3680i_pci_instance_init,
252 .interfaces = (InterfaceInfo[]) {
253 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
254 { },
255 },
256};
257
258static void pcm3680i_pci_register_types(void)
259{
260 type_register_static(&pcm3680i_pci_info);
261}
262
263type_init(pcm3680i_pci_register_types)
264
