qemu/hw/ppc/mac_newworld.c
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   1/*
   2 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
   3 *
   4 * Copyright (c) 2004-2007 Fabrice Bellard
   5 * Copyright (c) 2007 Jocelyn Mayer
   6 *
   7 * Permission is hereby granted, free of charge, to any person obtaining a copy
   8 * of this software and associated documentation files (the "Software"), to deal
   9 * in the Software without restriction, including without limitation the rights
  10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11 * copies of the Software, and to permit persons to whom the Software is
  12 * furnished to do so, subject to the following conditions:
  13 *
  14 * The above copyright notice and this permission notice shall be included in
  15 * all copies or substantial portions of the Software.
  16 *
  17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23 * THE SOFTWARE.
  24 *
  25 * PCI bus layout on a real G5 (U3 based):
  26 *
  27 * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
  28 * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
  29 * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
  30 * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
  31 * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
  32 * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
  33 * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
  34 * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
  35 * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
  36 * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
  37 * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
  38 * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
  39 * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
  40 * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
  41 * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
  42 * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
  43 * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
  44 * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
  45 * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
  46 * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
  47 *
  48 */
  49#include "qemu/osdep.h"
  50#include "qapi/error.h"
  51#include "hw/hw.h"
  52#include "hw/ppc/ppc.h"
  53#include "hw/ppc/mac.h"
  54#include "hw/input/adb.h"
  55#include "hw/ppc/mac_dbdma.h"
  56#include "hw/timer/m48t59.h"
  57#include "hw/pci/pci.h"
  58#include "net/net.h"
  59#include "sysemu/sysemu.h"
  60#include "hw/boards.h"
  61#include "hw/nvram/fw_cfg.h"
  62#include "hw/char/escc.h"
  63#include "hw/misc/macio/macio.h"
  64#include "hw/ppc/openpic.h"
  65#include "hw/ide.h"
  66#include "hw/loader.h"
  67#include "hw/fw-path-provider.h"
  68#include "elf.h"
  69#include "qemu/error-report.h"
  70#include "sysemu/kvm.h"
  71#include "kvm_ppc.h"
  72#include "hw/usb.h"
  73#include "exec/address-spaces.h"
  74#include "hw/sysbus.h"
  75#include "trace.h"
  76
  77#define MAX_IDE_BUS 2
  78#define CFG_ADDR 0xf0000510
  79#define TBFREQ (100UL * 1000UL * 1000UL)
  80#define CLOCKFREQ (900UL * 1000UL * 1000UL)
  81#define BUSFREQ (100UL * 1000UL * 1000UL)
  82
  83#define NDRV_VGA_FILENAME "qemu_vga.ndrv"
  84
  85
  86static void fw_cfg_boot_set(void *opaque, const char *boot_device,
  87                            Error **errp)
  88{
  89    fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
  90}
  91
  92static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
  93{
  94    return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
  95}
  96
  97static void ppc_core99_reset(void *opaque)
  98{
  99    PowerPCCPU *cpu = opaque;
 100
 101    cpu_reset(CPU(cpu));
 102    /* 970 CPUs want to get their initial IP as part of their boot protocol */
 103    cpu->env.nip = PROM_ADDR + 0x100;
 104}
 105
 106/* PowerPC Mac99 hardware initialisation */
 107static void ppc_core99_init(MachineState *machine)
 108{
 109    ram_addr_t ram_size = machine->ram_size;
 110    const char *kernel_filename = machine->kernel_filename;
 111    const char *kernel_cmdline = machine->kernel_cmdline;
 112    const char *initrd_filename = machine->initrd_filename;
 113    const char *boot_device = machine->boot_order;
 114    Core99MachineState *core99_machine = CORE99_MACHINE(machine);
 115    PowerPCCPU *cpu = NULL;
 116    CPUPPCState *env = NULL;
 117    char *filename;
 118    qemu_irq **openpic_irqs;
 119    int linux_boot, i, j, k;
 120    MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
 121    hwaddr kernel_base, initrd_base, cmdline_base = 0;
 122    long kernel_size, initrd_size;
 123    UNINHostState *uninorth_pci;
 124    PCIBus *pci_bus;
 125    NewWorldMacIOState *macio;
 126    bool has_pmu, has_adb;
 127    MACIOIDEState *macio_ide;
 128    BusState *adb_bus;
 129    MacIONVRAMState *nvr;
 130    int bios_size, ndrv_size;
 131    uint8_t *ndrv_file;
 132    int ppc_boot_device;
 133    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 134    void *fw_cfg;
 135    int machine_arch;
 136    SysBusDevice *s;
 137    DeviceState *dev, *pic_dev;
 138    hwaddr nvram_addr = 0xFFF04000;
 139    uint64_t tbfreq;
 140
 141    linux_boot = (kernel_filename != NULL);
 142
 143    /* init CPUs */
 144    for (i = 0; i < smp_cpus; i++) {
 145        cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
 146        env = &cpu->env;
 147
 148        /* Set time-base frequency to 100 Mhz */
 149        cpu_ppc_tb_init(env, TBFREQ);
 150        qemu_register_reset(ppc_core99_reset, cpu);
 151    }
 152
 153    /* allocate RAM */
 154    memory_region_allocate_system_memory(ram, NULL, "ppc_core99.ram", ram_size);
 155    memory_region_add_subregion(get_system_memory(), 0, ram);
 156
 157    /* allocate and load BIOS */
 158    memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE,
 159                           &error_fatal);
 160
 161    if (bios_name == NULL)
 162        bios_name = PROM_FILENAME;
 163    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 164    memory_region_set_readonly(bios, true);
 165    memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios);
 166
 167    /* Load OpenBIOS (ELF) */
 168    if (filename) {
 169        bios_size = load_elf(filename, NULL, NULL, NULL,
 170                             NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
 171
 172        g_free(filename);
 173    } else {
 174        bios_size = -1;
 175    }
 176    if (bios_size < 0 || bios_size > BIOS_SIZE) {
 177        error_report("could not load PowerPC bios '%s'", bios_name);
 178        exit(1);
 179    }
 180
 181    if (linux_boot) {
 182        uint64_t lowaddr = 0;
 183        int bswap_needed;
 184
 185#ifdef BSWAP_NEEDED
 186        bswap_needed = 1;
 187#else
 188        bswap_needed = 0;
 189#endif
 190        kernel_base = KERNEL_LOAD_ADDR;
 191
 192        kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
 193                               NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE,
 194                               0, 0);
 195        if (kernel_size < 0)
 196            kernel_size = load_aout(kernel_filename, kernel_base,
 197                                    ram_size - kernel_base, bswap_needed,
 198                                    TARGET_PAGE_SIZE);
 199        if (kernel_size < 0)
 200            kernel_size = load_image_targphys(kernel_filename,
 201                                              kernel_base,
 202                                              ram_size - kernel_base);
 203        if (kernel_size < 0) {
 204            error_report("could not load kernel '%s'", kernel_filename);
 205            exit(1);
 206        }
 207        /* load initrd */
 208        if (initrd_filename) {
 209            initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
 210            initrd_size = load_image_targphys(initrd_filename, initrd_base,
 211                                              ram_size - initrd_base);
 212            if (initrd_size < 0) {
 213                error_report("could not load initial ram disk '%s'",
 214                             initrd_filename);
 215                exit(1);
 216            }
 217            cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
 218        } else {
 219            initrd_base = 0;
 220            initrd_size = 0;
 221            cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
 222        }
 223        ppc_boot_device = 'm';
 224    } else {
 225        kernel_base = 0;
 226        kernel_size = 0;
 227        initrd_base = 0;
 228        initrd_size = 0;
 229        ppc_boot_device = '\0';
 230        /* We consider that NewWorld PowerMac never have any floppy drive
 231         * For now, OHW cannot boot from the network.
 232         */
 233        for (i = 0; boot_device[i] != '\0'; i++) {
 234            if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
 235                ppc_boot_device = boot_device[i];
 236                break;
 237            }
 238        }
 239        if (ppc_boot_device == '\0') {
 240            error_report("No valid boot device for Mac99 machine");
 241            exit(1);
 242        }
 243    }
 244
 245    /* UniN init */
 246    dev = qdev_create(NULL, TYPE_UNI_NORTH);
 247    qdev_init_nofail(dev);
 248    s = SYS_BUS_DEVICE(dev);
 249    memory_region_add_subregion(get_system_memory(), 0xf8000000,
 250                                sysbus_mmio_get_region(s, 0));
 251
 252    openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
 253    openpic_irqs[0] =
 254        g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 255    for (i = 0; i < smp_cpus; i++) {
 256        /* Mac99 IRQ connection between OpenPIC outputs pins
 257         * and PowerPC input pins
 258         */
 259        switch (PPC_INPUT(env)) {
 260        case PPC_FLAGS_INPUT_6xx:
 261            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 262            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 263                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 264            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 265                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 266            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 267                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
 268            /* Not connected ? */
 269            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 270            /* Check this */
 271            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 272                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
 273            break;
 274#if defined(TARGET_PPC64)
 275        case PPC_FLAGS_INPUT_970:
 276            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 277            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 278                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 279            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 280                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 281            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 282                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
 283            /* Not connected ? */
 284            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 285            /* Check this */
 286            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 287                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
 288            break;
 289#endif /* defined(TARGET_PPC64) */
 290        default:
 291            error_report("Bus model not supported on mac99 machine");
 292            exit(1);
 293        }
 294    }
 295
 296    pic_dev = qdev_create(NULL, TYPE_OPENPIC);
 297    qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO);
 298    qdev_init_nofail(pic_dev);
 299    s = SYS_BUS_DEVICE(pic_dev);
 300    k = 0;
 301    for (i = 0; i < smp_cpus; i++) {
 302        for (j = 0; j < OPENPIC_OUTPUT_NB; j++) {
 303            sysbus_connect_irq(s, k++, openpic_irqs[i][j]);
 304        }
 305    }
 306    g_free(openpic_irqs);
 307
 308    if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
 309        /* 970 gets a U3 bus */
 310        /* Uninorth AGP bus */
 311        dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE);
 312        object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
 313                                 &error_abort);
 314        qdev_init_nofail(dev);
 315        uninorth_pci = U3_AGP_HOST_BRIDGE(dev);
 316        s = SYS_BUS_DEVICE(dev);
 317        /* PCI hole */
 318        memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
 319                                    sysbus_mmio_get_region(s, 2));
 320        /* Register 8 MB of ISA IO space */
 321        memory_region_add_subregion(get_system_memory(), 0xf2000000,
 322                                    sysbus_mmio_get_region(s, 3));
 323        sysbus_mmio_map(s, 0, 0xf0800000);
 324        sysbus_mmio_map(s, 1, 0xf0c00000);
 325
 326        machine_arch = ARCH_MAC99_U3;
 327    } else {
 328        /* Use values found on a real PowerMac */
 329        /* Uninorth AGP bus */
 330        dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
 331        object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
 332                                 &error_abort);
 333        qdev_init_nofail(dev);
 334        s = SYS_BUS_DEVICE(dev);
 335        sysbus_mmio_map(s, 0, 0xf0800000);
 336        sysbus_mmio_map(s, 1, 0xf0c00000);
 337
 338        /* Uninorth internal bus */
 339        dev = qdev_create(NULL, TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
 340        object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
 341                                 &error_abort);
 342        qdev_init_nofail(dev);
 343        s = SYS_BUS_DEVICE(dev);
 344        sysbus_mmio_map(s, 0, 0xf4800000);
 345        sysbus_mmio_map(s, 1, 0xf4c00000);
 346
 347        /* Uninorth main bus */
 348        dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
 349        qdev_prop_set_uint32(dev, "ofw-addr", 0xf2000000);
 350        object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
 351                                 &error_abort);
 352        qdev_init_nofail(dev);
 353        uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev);
 354        s = SYS_BUS_DEVICE(dev);
 355        /* PCI hole */
 356        memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
 357                                    sysbus_mmio_get_region(s, 2));
 358        /* Register 8 MB of ISA IO space */
 359        memory_region_add_subregion(get_system_memory(), 0xf2000000,
 360                                    sysbus_mmio_get_region(s, 3));
 361        sysbus_mmio_map(s, 0, 0xf2800000);
 362        sysbus_mmio_map(s, 1, 0xf2c00000);
 363
 364        machine_arch = ARCH_MAC99;
 365    }
 366
 367    machine->usb |= defaults_enabled() && !machine->usb_disabled;
 368    has_pmu = (core99_machine->via_config != CORE99_VIA_CONFIG_CUDA);
 369    has_adb = (core99_machine->via_config == CORE99_VIA_CONFIG_CUDA ||
 370               core99_machine->via_config == CORE99_VIA_CONFIG_PMU_ADB);
 371
 372    /* Timebase Frequency */
 373    if (kvm_enabled()) {
 374        tbfreq = kvmppc_get_tbfreq();
 375    } else {
 376        tbfreq = TBFREQ;
 377    }
 378
 379    /* init basic PC hardware */
 380    pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus;
 381
 382    /* MacIO */
 383    macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO));
 384    dev = DEVICE(macio);
 385    qdev_prop_set_uint64(dev, "frequency", tbfreq);
 386    qdev_prop_set_bit(dev, "has-pmu", has_pmu);
 387    qdev_prop_set_bit(dev, "has-adb", has_adb);
 388    object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
 389                             &error_abort);
 390    qdev_init_nofail(dev);
 391
 392    /* We only emulate 2 out of 3 IDE controllers for now */
 393    ide_drive_get(hd, ARRAY_SIZE(hd));
 394
 395    macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
 396                                                        "ide[0]"));
 397    macio_ide_init_drives(macio_ide, hd);
 398
 399    macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
 400                                                        "ide[1]"));
 401    macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
 402
 403    if (has_adb) {
 404        if (has_pmu) {
 405            dev = DEVICE(object_resolve_path_component(OBJECT(macio), "pmu"));
 406        } else {
 407            dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
 408        }
 409
 410        adb_bus = qdev_get_child_bus(dev, "adb.0");
 411        dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
 412        qdev_prop_set_bit(dev, "disable-direct-reg3-writes", true);
 413        qdev_init_nofail(dev);
 414
 415        dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
 416        qdev_prop_set_bit(dev, "disable-direct-reg3-writes", true);
 417        qdev_init_nofail(dev);
 418    }
 419
 420    if (machine->usb) {
 421        pci_create_simple(pci_bus, -1, "pci-ohci");
 422
 423        /* U3 needs to use USB for input because Linux doesn't support via-cuda
 424        on PPC64 */
 425        if (!has_adb || machine_arch == ARCH_MAC99_U3) {
 426            USBBus *usb_bus = usb_bus_find(-1);
 427
 428            usb_create_simple(usb_bus, "usb-kbd");
 429            usb_create_simple(usb_bus, "usb-mouse");
 430        }
 431    }
 432
 433    pci_vga_init(pci_bus);
 434
 435    if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) {
 436        graphic_depth = 15;
 437    }
 438
 439    for (i = 0; i < nb_nics; i++) {
 440        pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL);
 441    }
 442
 443    /* The NewWorld NVRAM is not located in the MacIO device */
 444#ifdef CONFIG_KVM
 445    if (kvm_enabled() && getpagesize() > 4096) {
 446        /* We can't combine read-write and read-only in a single page, so
 447           move the NVRAM out of ROM again for KVM */
 448        nvram_addr = 0xFFE00000;
 449    }
 450#endif
 451    dev = qdev_create(NULL, TYPE_MACIO_NVRAM);
 452    qdev_prop_set_uint32(dev, "size", 0x2000);
 453    qdev_prop_set_uint32(dev, "it_shift", 1);
 454    qdev_init_nofail(dev);
 455    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr);
 456    nvr = MACIO_NVRAM(dev);
 457    pmac_format_nvram_partition(nvr, 0x2000);
 458    /* No PCI init: the BIOS will do it */
 459
 460    dev = qdev_create(NULL, TYPE_FW_CFG_MEM);
 461    fw_cfg = FW_CFG(dev);
 462    qdev_prop_set_uint32(dev, "data_width", 1);
 463    qdev_prop_set_bit(dev, "dma_enabled", false);
 464    object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
 465                              OBJECT(fw_cfg), NULL);
 466    qdev_init_nofail(dev);
 467    s = SYS_BUS_DEVICE(dev);
 468    sysbus_mmio_map(s, 0, CFG_ADDR);
 469    sysbus_mmio_map(s, 1, CFG_ADDR + 2);
 470
 471    fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
 472    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
 473    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 474    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
 475    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
 476    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 477    if (kernel_cmdline) {
 478        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
 479        pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
 480    } else {
 481        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
 482    }
 483    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
 484    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 485    fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
 486
 487    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
 488    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
 489    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
 490
 491    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_VIACONFIG, core99_machine->via_config);
 492
 493    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
 494    if (kvm_enabled()) {
 495#ifdef CONFIG_KVM
 496        uint8_t *hypercall;
 497
 498        hypercall = g_malloc(16);
 499        kvmppc_get_hypercall(env, hypercall, 16);
 500        fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
 501        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
 502#endif
 503    }
 504    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
 505    /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
 506    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
 507    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
 508    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr);
 509
 510    /* MacOS NDRV VGA driver */
 511    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
 512    if (filename) {
 513        ndrv_size = get_image_size(filename);
 514        if (ndrv_size != -1) {
 515            ndrv_file = g_malloc(ndrv_size);
 516            ndrv_size = load_image(filename, ndrv_file);
 517
 518            fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
 519        }
 520        g_free(filename);
 521    }
 522
 523    qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
 524}
 525
 526/*
 527 * Implementation of an interface to adjust firmware path
 528 * for the bootindex property handling.
 529 */
 530static char *core99_fw_dev_path(FWPathProvider *p, BusState *bus,
 531                                DeviceState *dev)
 532{
 533    PCIDevice *pci;
 534    IDEBus *ide_bus;
 535    IDEState *ide_s;
 536    MACIOIDEState *macio_ide;
 537
 538    if (!strcmp(object_get_typename(OBJECT(dev)), "macio-newworld")) {
 539        pci = PCI_DEVICE(dev);
 540        return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
 541    }
 542
 543    if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
 544        macio_ide = MACIO_IDE(dev);
 545        return g_strdup_printf("ata-3@%x", macio_ide->addr);
 546    }
 547
 548    if (!strcmp(object_get_typename(OBJECT(dev)), "ide-drive")) {
 549        ide_bus = IDE_BUS(qdev_get_parent_bus(dev));
 550        ide_s = idebus_active_if(ide_bus);
 551
 552        if (ide_s->drive_kind == IDE_CD) {
 553            return g_strdup("cdrom");
 554        }
 555
 556        return g_strdup("hd");
 557    }
 558
 559    if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
 560        return g_strdup("hd");
 561    }
 562
 563    if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
 564        return g_strdup("cdrom");
 565    }
 566
 567    if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
 568        return g_strdup("disk");
 569    }
 570
 571    return NULL;
 572}
 573
 574static int core99_kvm_type(const char *arg)
 575{
 576    /* Always force PR KVM */
 577    return 2;
 578}
 579
 580static void core99_machine_class_init(ObjectClass *oc, void *data)
 581{
 582    MachineClass *mc = MACHINE_CLASS(oc);
 583    FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
 584
 585    mc->desc = "Mac99 based PowerMAC";
 586    mc->init = ppc_core99_init;
 587    mc->block_default_type = IF_IDE;
 588    mc->max_cpus = MAX_CPUS;
 589    mc->default_boot_order = "cd";
 590    mc->default_display = "std";
 591    mc->kvm_type = core99_kvm_type;
 592#ifdef TARGET_PPC64
 593    mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1");
 594#else
 595    mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9");
 596#endif
 597    mc->ignore_boot_device_suffixes = true;
 598    fwc->get_dev_path = core99_fw_dev_path;
 599}
 600
 601static char *core99_get_via_config(Object *obj, Error **errp)
 602{
 603    Core99MachineState *cms = CORE99_MACHINE(obj);
 604
 605    switch (cms->via_config) {
 606    default:
 607    case CORE99_VIA_CONFIG_CUDA:
 608        return g_strdup("cuda");
 609
 610    case CORE99_VIA_CONFIG_PMU:
 611        return g_strdup("pmu");
 612
 613    case CORE99_VIA_CONFIG_PMU_ADB:
 614        return g_strdup("pmu-adb");
 615    }
 616}
 617
 618static void core99_set_via_config(Object *obj, const char *value, Error **errp)
 619{
 620    Core99MachineState *cms = CORE99_MACHINE(obj);
 621
 622    if (!strcmp(value, "cuda")) {
 623        cms->via_config = CORE99_VIA_CONFIG_CUDA;
 624    } else if (!strcmp(value, "pmu")) {
 625        cms->via_config = CORE99_VIA_CONFIG_PMU;
 626    } else if (!strcmp(value, "pmu-adb")) {
 627        cms->via_config = CORE99_VIA_CONFIG_PMU_ADB;
 628    } else {
 629        error_setg(errp, "Invalid via value");
 630        error_append_hint(errp, "Valid values are cuda, pmu, pmu-adb.\n");
 631    }
 632}
 633
 634static void core99_instance_init(Object *obj)
 635{
 636    Core99MachineState *cms = CORE99_MACHINE(obj);
 637
 638    /* Default via_config is CORE99_VIA_CONFIG_CUDA */
 639    cms->via_config = CORE99_VIA_CONFIG_CUDA;
 640    object_property_add_str(obj, "via", core99_get_via_config,
 641                            core99_set_via_config, NULL);
 642    object_property_set_description(obj, "via",
 643                                    "Set VIA configuration. "
 644                                    "Valid values are cuda, pmu and pmu-adb",
 645                                    NULL);
 646
 647    return;
 648}
 649
 650static const TypeInfo core99_machine_info = {
 651    .name          = MACHINE_TYPE_NAME("mac99"),
 652    .parent        = TYPE_MACHINE,
 653    .class_init    = core99_machine_class_init,
 654    .instance_init = core99_instance_init,
 655    .instance_size = sizeof(Core99MachineState),
 656    .interfaces = (InterfaceInfo[]) {
 657        { TYPE_FW_PATH_PROVIDER },
 658        { }
 659    },
 660};
 661
 662static void mac_machine_register_types(void)
 663{
 664    type_register_static(&core99_machine_info);
 665}
 666
 667type_init(mac_machine_register_types)
 668