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26#include "qemu/osdep.h"
27#include "qemu/units.h"
28#include "qapi/error.h"
29#include "hw/hw.h"
30#include "hw/ppc/ppc.h"
31#include "mac.h"
32#include "hw/input/adb.h"
33#include "hw/timer/m48t59.h"
34#include "sysemu/sysemu.h"
35#include "net/net.h"
36#include "hw/isa/isa.h"
37#include "hw/pci/pci.h"
38#include "hw/pci/pci_host.h"
39#include "hw/boards.h"
40#include "hw/nvram/fw_cfg.h"
41#include "hw/char/escc.h"
42#include "hw/misc/macio/macio.h"
43#include "hw/ide.h"
44#include "hw/loader.h"
45#include "hw/fw-path-provider.h"
46#include "elf.h"
47#include "qemu/error-report.h"
48#include "sysemu/kvm.h"
49#include "kvm_ppc.h"
50#include "exec/address-spaces.h"
51
52#define MAX_IDE_BUS 2
53#define CFG_ADDR 0xf0000510
54#define TBFREQ 16600000UL
55#define CLOCKFREQ 266000000UL
56#define BUSFREQ 66000000UL
57
58#define NDRV_VGA_FILENAME "qemu_vga.ndrv"
59
60#define GRACKLE_BASE 0xfec00000
61
62static void fw_cfg_boot_set(void *opaque, const char *boot_device,
63 Error **errp)
64{
65 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
66}
67
68static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
69{
70 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
71}
72
73static void ppc_heathrow_reset(void *opaque)
74{
75 PowerPCCPU *cpu = opaque;
76
77 cpu_reset(CPU(cpu));
78}
79
80static void ppc_heathrow_init(MachineState *machine)
81{
82 ram_addr_t ram_size = machine->ram_size;
83 const char *kernel_filename = machine->kernel_filename;
84 const char *kernel_cmdline = machine->kernel_cmdline;
85 const char *initrd_filename = machine->initrd_filename;
86 const char *boot_device = machine->boot_order;
87 MemoryRegion *sysmem = get_system_memory();
88 PowerPCCPU *cpu = NULL;
89 CPUPPCState *env = NULL;
90 char *filename;
91 int linux_boot, i;
92 MemoryRegion *ram = g_new(MemoryRegion, 1);
93 MemoryRegion *bios = g_new(MemoryRegion, 1);
94 uint32_t kernel_base, initrd_base, cmdline_base = 0;
95 int32_t kernel_size, initrd_size;
96 PCIBus *pci_bus;
97 OldWorldMacIOState *macio;
98 MACIOIDEState *macio_ide;
99 SysBusDevice *s;
100 DeviceState *dev, *pic_dev;
101 BusState *adb_bus;
102 int bios_size, ndrv_size;
103 uint8_t *ndrv_file;
104 uint16_t ppc_boot_device;
105 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
106 void *fw_cfg;
107 uint64_t tbfreq;
108
109 linux_boot = (kernel_filename != NULL);
110
111
112 for (i = 0; i < smp_cpus; i++) {
113 cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
114 env = &cpu->env;
115
116
117 cpu_ppc_tb_init(env, TBFREQ);
118 qemu_register_reset(ppc_heathrow_reset, cpu);
119 }
120
121
122 if (ram_size > 2047 * MiB) {
123 error_report("Too much memory for this machine: %" PRId64 " MB, "
124 "maximum 2047 MB", ram_size / MiB);
125 exit(1);
126 }
127
128 memory_region_allocate_system_memory(ram, NULL, "ppc_heathrow.ram",
129 ram_size);
130 memory_region_add_subregion(sysmem, 0, ram);
131
132
133 memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE,
134 &error_fatal);
135
136 if (bios_name == NULL)
137 bios_name = PROM_FILENAME;
138 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
139 memory_region_set_readonly(bios, true);
140 memory_region_add_subregion(sysmem, PROM_ADDR, bios);
141
142
143 if (filename) {
144 bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL,
145 1, PPC_ELF_MACHINE, 0, 0);
146 g_free(filename);
147 } else {
148 bios_size = -1;
149 }
150 if (bios_size < 0 || bios_size > BIOS_SIZE) {
151 error_report("could not load PowerPC bios '%s'", bios_name);
152 exit(1);
153 }
154
155 if (linux_boot) {
156 uint64_t lowaddr = 0;
157 int bswap_needed;
158
159#ifdef BSWAP_NEEDED
160 bswap_needed = 1;
161#else
162 bswap_needed = 0;
163#endif
164 kernel_base = KERNEL_LOAD_ADDR;
165 kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
166 NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE,
167 0, 0);
168 if (kernel_size < 0)
169 kernel_size = load_aout(kernel_filename, kernel_base,
170 ram_size - kernel_base, bswap_needed,
171 TARGET_PAGE_SIZE);
172 if (kernel_size < 0)
173 kernel_size = load_image_targphys(kernel_filename,
174 kernel_base,
175 ram_size - kernel_base);
176 if (kernel_size < 0) {
177 error_report("could not load kernel '%s'", kernel_filename);
178 exit(1);
179 }
180
181 if (initrd_filename) {
182 initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
183 initrd_size = load_image_targphys(initrd_filename, initrd_base,
184 ram_size - initrd_base);
185 if (initrd_size < 0) {
186 error_report("could not load initial ram disk '%s'",
187 initrd_filename);
188 exit(1);
189 }
190 cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
191 } else {
192 initrd_base = 0;
193 initrd_size = 0;
194 cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
195 }
196 ppc_boot_device = 'm';
197 } else {
198 kernel_base = 0;
199 kernel_size = 0;
200 initrd_base = 0;
201 initrd_size = 0;
202 ppc_boot_device = '\0';
203 for (i = 0; boot_device[i] != '\0'; i++) {
204
205
206
207
208#if 0
209 if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
210 ppc_boot_device = boot_device[i];
211 break;
212 }
213#else
214 if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
215 ppc_boot_device = boot_device[i];
216 break;
217 }
218#endif
219 }
220 if (ppc_boot_device == '\0') {
221 error_report("No valid boot device for G3 Beige machine");
222 exit(1);
223 }
224 }
225
226
227 pic_dev = qdev_create(NULL, TYPE_HEATHROW);
228 qdev_init_nofail(pic_dev);
229
230
231 for (i = 0; i < smp_cpus; i++) {
232 switch (PPC_INPUT(env)) {
233 case PPC_FLAGS_INPUT_6xx:
234 qdev_connect_gpio_out(pic_dev, 0,
235 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]);
236 break;
237 default:
238 error_report("Bus model not supported on OldWorld Mac machine");
239 exit(1);
240 }
241 }
242
243
244 if (kvm_enabled()) {
245 tbfreq = kvmppc_get_tbfreq();
246 } else {
247 tbfreq = TBFREQ;
248 }
249
250
251 if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
252 error_report("Only 6xx bus is supported on heathrow machine");
253 exit(1);
254 }
255
256
257 dev = qdev_create(NULL, TYPE_GRACKLE_PCI_HOST_BRIDGE);
258 qdev_prop_set_uint32(dev, "ofw-addr", 0x80000000);
259 object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
260 &error_abort);
261 qdev_init_nofail(dev);
262 s = SYS_BUS_DEVICE(dev);
263 sysbus_mmio_map(s, 0, GRACKLE_BASE);
264 sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000);
265
266 memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
267 sysbus_mmio_get_region(s, 2));
268
269 memory_region_add_subregion(get_system_memory(), 0xfe000000,
270 sysbus_mmio_get_region(s, 3));
271
272 pci_bus = PCI_HOST_BRIDGE(dev)->bus;
273
274 pci_vga_init(pci_bus);
275
276 for (i = 0; i < nb_nics; i++) {
277 pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL);
278 }
279
280 ide_drive_get(hd, ARRAY_SIZE(hd));
281
282
283 macio = OLDWORLD_MACIO(pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO));
284 dev = DEVICE(macio);
285 qdev_prop_set_uint64(dev, "frequency", tbfreq);
286 object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
287 &error_abort);
288 qdev_init_nofail(dev);
289
290 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
291 "ide[0]"));
292 macio_ide_init_drives(macio_ide, hd);
293
294 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
295 "ide[1]"));
296 macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
297
298 dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
299 adb_bus = qdev_get_child_bus(dev, "adb.0");
300 dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
301 qdev_init_nofail(dev);
302 dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
303 qdev_init_nofail(dev);
304
305 if (machine_usb(machine)) {
306 pci_create_simple(pci_bus, -1, "pci-ohci");
307 }
308
309 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
310 graphic_depth = 15;
311
312
313
314 dev = qdev_create(NULL, TYPE_FW_CFG_MEM);
315 fw_cfg = FW_CFG(dev);
316 qdev_prop_set_uint32(dev, "data_width", 1);
317 qdev_prop_set_bit(dev, "dma_enabled", false);
318 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
319 OBJECT(fw_cfg), NULL);
320 qdev_init_nofail(dev);
321 s = SYS_BUS_DEVICE(dev);
322 sysbus_mmio_map(s, 0, CFG_ADDR);
323 sysbus_mmio_map(s, 1, CFG_ADDR + 2);
324
325 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
326 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
327 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
328 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
329 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
330 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
331 if (kernel_cmdline) {
332 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
333 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
334 } else {
335 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
336 }
337 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
338 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
339 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
340
341 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
342 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
343 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
344
345 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
346 if (kvm_enabled()) {
347#ifdef CONFIG_KVM
348 uint8_t *hypercall;
349
350 hypercall = g_malloc(16);
351 kvmppc_get_hypercall(env, hypercall, 16);
352 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
353 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
354#endif
355 }
356 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
357
358 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
359 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
360
361
362 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
363 if (filename) {
364 ndrv_size = get_image_size(filename);
365 if (ndrv_size != -1) {
366 ndrv_file = g_malloc(ndrv_size);
367 ndrv_size = load_image(filename, ndrv_file);
368
369 fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
370 }
371 g_free(filename);
372 }
373
374 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
375}
376
377
378
379
380
381static char *heathrow_fw_dev_path(FWPathProvider *p, BusState *bus,
382 DeviceState *dev)
383{
384 PCIDevice *pci;
385 IDEBus *ide_bus;
386 IDEState *ide_s;
387 MACIOIDEState *macio_ide;
388
389 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-oldworld")) {
390 pci = PCI_DEVICE(dev);
391 return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
392 }
393
394 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
395 macio_ide = MACIO_IDE(dev);
396 return g_strdup_printf("ata-3@%x", macio_ide->addr);
397 }
398
399 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-drive")) {
400 ide_bus = IDE_BUS(qdev_get_parent_bus(dev));
401 ide_s = idebus_active_if(ide_bus);
402
403 if (ide_s->drive_kind == IDE_CD) {
404 return g_strdup("cdrom");
405 }
406
407 return g_strdup("hd");
408 }
409
410 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
411 return g_strdup("hd");
412 }
413
414 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
415 return g_strdup("cdrom");
416 }
417
418 if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
419 return g_strdup("disk");
420 }
421
422 return NULL;
423}
424
425static int heathrow_kvm_type(const char *arg)
426{
427
428 return 2;
429}
430
431static void heathrow_class_init(ObjectClass *oc, void *data)
432{
433 MachineClass *mc = MACHINE_CLASS(oc);
434 FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
435
436 mc->desc = "Heathrow based PowerMAC";
437 mc->init = ppc_heathrow_init;
438 mc->block_default_type = IF_IDE;
439 mc->max_cpus = MAX_CPUS;
440#ifndef TARGET_PPC64
441 mc->is_default = 1;
442#endif
443
444 mc->default_boot_order = "cd";
445 mc->kvm_type = heathrow_kvm_type;
446 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("750_v3.1");
447 mc->default_display = "std";
448 mc->ignore_boot_device_suffixes = true;
449 fwc->get_dev_path = heathrow_fw_dev_path;
450}
451
452static const TypeInfo ppc_heathrow_machine_info = {
453 .name = MACHINE_TYPE_NAME("g3beige"),
454 .parent = TYPE_MACHINE,
455 .class_init = heathrow_class_init,
456 .interfaces = (InterfaceInfo[]) {
457 { TYPE_FW_PATH_PROVIDER },
458 { }
459 },
460};
461
462static void ppc_heathrow_register_types(void)
463{
464 type_register_static(&ppc_heathrow_machine_info);
465}
466
467type_init(ppc_heathrow_register_types);
468
