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15#ifndef QEMU_ACPI_DEFS_H
16#define QEMU_ACPI_DEFS_H
17
18enum {
19 ACPI_FADT_F_WBINVD,
20 ACPI_FADT_F_WBINVD_FLUSH,
21 ACPI_FADT_F_PROC_C1,
22 ACPI_FADT_F_P_LVL2_UP,
23 ACPI_FADT_F_PWR_BUTTON,
24 ACPI_FADT_F_SLP_BUTTON,
25 ACPI_FADT_F_FIX_RTC,
26 ACPI_FADT_F_RTC_S4,
27 ACPI_FADT_F_TMR_VAL_EXT,
28 ACPI_FADT_F_DCK_CAP,
29 ACPI_FADT_F_RESET_REG_SUP,
30 ACPI_FADT_F_SEALED_CASE,
31 ACPI_FADT_F_HEADLESS,
32 ACPI_FADT_F_CPU_SW_SLP,
33 ACPI_FADT_F_PCI_EXP_WAK,
34 ACPI_FADT_F_USE_PLATFORM_CLOCK,
35 ACPI_FADT_F_S4_RTC_STS_VALID,
36 ACPI_FADT_F_REMOTE_POWER_ON_CAPABLE,
37 ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL,
38 ACPI_FADT_F_FORCE_APIC_PHYSICAL_DESTINATION_MODE,
39 ACPI_FADT_F_HW_REDUCED_ACPI,
40 ACPI_FADT_F_LOW_POWER_S0_IDLE_CAPABLE,
41};
42
43struct AcpiRsdpDescriptor {
44 uint64_t signature;
45 uint8_t checksum;
46 uint8_t oem_id [6];
47 uint8_t revision;
48 uint32_t rsdt_physical_address;
49 uint32_t length;
50 uint64_t xsdt_physical_address;
51 uint8_t extended_checksum;
52 uint8_t reserved [3];
53} QEMU_PACKED;
54typedef struct AcpiRsdpDescriptor AcpiRsdpDescriptor;
55
56
57
58
59
60#define ACPI_TABLE_HEADER_DEF \
61 uint32_t signature; \
62 uint32_t length; \
63 uint8_t revision; \
64 uint8_t checksum; \
65 uint8_t oem_id [6]; \
66 uint8_t oem_table_id [8]; \
67 uint32_t oem_revision; \
68 uint8_t asl_compiler_id [4]; \
69 uint32_t asl_compiler_revision;
70
71
72
73struct AcpiTableHeader {
74 ACPI_TABLE_HEADER_DEF
75} QEMU_PACKED;
76typedef struct AcpiTableHeader AcpiTableHeader;
77
78struct AcpiGenericAddress {
79 uint8_t space_id;
80 uint8_t bit_width;
81 uint8_t bit_offset;
82 uint8_t access_width;
83
84 uint64_t address;
85} QEMU_PACKED;
86
87typedef struct AcpiFadtData {
88 struct AcpiGenericAddress pm1a_cnt;
89 struct AcpiGenericAddress pm1a_evt;
90 struct AcpiGenericAddress pm_tmr;
91 struct AcpiGenericAddress gpe0_blk;
92 struct AcpiGenericAddress reset_reg;
93 uint8_t reset_val;
94 uint8_t rev;
95 uint32_t flags;
96 uint32_t smi_cmd;
97 uint16_t sci_int;
98 uint8_t int_model;
99 uint8_t acpi_enable_cmd;
100 uint8_t acpi_disable_cmd;
101 uint8_t rtc_century;
102 uint16_t plvl2_lat;
103 uint16_t plvl3_lat;
104 uint16_t arm_boot_arch;
105 uint8_t minor_ver;
106
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110
111
112 unsigned *facs_tbl_offset;
113 unsigned *dsdt_tbl_offset;
114 unsigned *xdsdt_tbl_offset;
115} AcpiFadtData;
116
117#define ACPI_FADT_ARM_PSCI_COMPLIANT (1 << 0)
118#define ACPI_FADT_ARM_PSCI_USE_HVC (1 << 1)
119
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121
122
123
124
125
126struct AcpiSerialPortConsoleRedirection {
127 ACPI_TABLE_HEADER_DEF
128 uint8_t interface_type;
129 uint8_t reserved1[3];
130 struct AcpiGenericAddress base_address;
131 uint8_t interrupt_types;
132 uint8_t irq;
133 uint32_t gsi;
134 uint8_t baud;
135 uint8_t parity;
136 uint8_t stopbits;
137 uint8_t flowctrl;
138 uint8_t term_type;
139 uint8_t reserved2;
140 uint16_t pci_device_id;
141 uint16_t pci_vendor_id;
142 uint8_t pci_bus;
143 uint8_t pci_slot;
144 uint8_t pci_func;
145 uint32_t pci_flags;
146 uint8_t pci_seg;
147 uint32_t reserved3;
148} QEMU_PACKED;
149typedef struct AcpiSerialPortConsoleRedirection
150 AcpiSerialPortConsoleRedirection;
151
152
153
154
155struct AcpiRsdtDescriptorRev1 {
156 ACPI_TABLE_HEADER_DEF
157 uint32_t table_offset_entry[0];
158
159} QEMU_PACKED;
160typedef struct AcpiRsdtDescriptorRev1 AcpiRsdtDescriptorRev1;
161
162
163
164
165struct AcpiXsdtDescriptorRev2 {
166 ACPI_TABLE_HEADER_DEF
167 uint64_t table_offset_entry[0];
168
169} QEMU_PACKED;
170typedef struct AcpiXsdtDescriptorRev2 AcpiXsdtDescriptorRev2;
171
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173
174
175struct AcpiFacsDescriptorRev1 {
176 uint32_t signature;
177 uint32_t length;
178 uint32_t hardware_signature;
179 uint32_t firmware_waking_vector;
180 uint32_t global_lock;
181 uint32_t flags;
182 uint8_t resverved3 [40];
183} QEMU_PACKED;
184typedef struct AcpiFacsDescriptorRev1 AcpiFacsDescriptorRev1;
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194
195
196#define ACPI_DUAL_PIC 0
197#define ACPI_MULTIPLE_APIC 1
198
199
200
201struct AcpiMultipleApicTable {
202 ACPI_TABLE_HEADER_DEF
203 uint32_t local_apic_address;
204 uint32_t flags;
205} QEMU_PACKED;
206typedef struct AcpiMultipleApicTable AcpiMultipleApicTable;
207
208
209
210#define ACPI_APIC_PROCESSOR 0
211#define ACPI_APIC_IO 1
212#define ACPI_APIC_XRUPT_OVERRIDE 2
213#define ACPI_APIC_NMI 3
214#define ACPI_APIC_LOCAL_NMI 4
215#define ACPI_APIC_ADDRESS_OVERRIDE 5
216#define ACPI_APIC_IO_SAPIC 6
217#define ACPI_APIC_LOCAL_SAPIC 7
218#define ACPI_APIC_XRUPT_SOURCE 8
219#define ACPI_APIC_LOCAL_X2APIC 9
220#define ACPI_APIC_LOCAL_X2APIC_NMI 10
221#define ACPI_APIC_GENERIC_CPU_INTERFACE 11
222#define ACPI_APIC_GENERIC_DISTRIBUTOR 12
223#define ACPI_APIC_GENERIC_MSI_FRAME 13
224#define ACPI_APIC_GENERIC_REDISTRIBUTOR 14
225#define ACPI_APIC_GENERIC_TRANSLATOR 15
226#define ACPI_APIC_RESERVED 16
227
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229
230
231#define ACPI_SUB_HEADER_DEF \
232 uint8_t type; \
233 uint8_t length;
234
235
236
237struct AcpiMadtProcessorApic {
238 ACPI_SUB_HEADER_DEF
239 uint8_t processor_id;
240 uint8_t local_apic_id;
241 uint32_t flags;
242} QEMU_PACKED;
243typedef struct AcpiMadtProcessorApic AcpiMadtProcessorApic;
244
245struct AcpiMadtIoApic {
246 ACPI_SUB_HEADER_DEF
247 uint8_t io_apic_id;
248 uint8_t reserved;
249 uint32_t address;
250 uint32_t interrupt;
251
252} QEMU_PACKED;
253typedef struct AcpiMadtIoApic AcpiMadtIoApic;
254
255struct AcpiMadtIntsrcovr {
256 ACPI_SUB_HEADER_DEF
257 uint8_t bus;
258 uint8_t source;
259 uint32_t gsi;
260 uint16_t flags;
261} QEMU_PACKED;
262typedef struct AcpiMadtIntsrcovr AcpiMadtIntsrcovr;
263
264struct AcpiMadtLocalNmi {
265 ACPI_SUB_HEADER_DEF
266 uint8_t processor_id;
267 uint16_t flags;
268 uint8_t lint;
269} QEMU_PACKED;
270typedef struct AcpiMadtLocalNmi AcpiMadtLocalNmi;
271
272struct AcpiMadtProcessorX2Apic {
273 ACPI_SUB_HEADER_DEF
274 uint16_t reserved;
275 uint32_t x2apic_id;
276 uint32_t flags;
277 uint32_t uid;
278} QEMU_PACKED;
279typedef struct AcpiMadtProcessorX2Apic AcpiMadtProcessorX2Apic;
280
281struct AcpiMadtLocalX2ApicNmi {
282 ACPI_SUB_HEADER_DEF
283 uint16_t flags;
284 uint32_t uid;
285 uint8_t lint;
286 uint8_t reserved[3];
287} QEMU_PACKED;
288typedef struct AcpiMadtLocalX2ApicNmi AcpiMadtLocalX2ApicNmi;
289
290struct AcpiMadtGenericCpuInterface {
291 ACPI_SUB_HEADER_DEF
292 uint16_t reserved;
293 uint32_t cpu_interface_number;
294 uint32_t uid;
295 uint32_t flags;
296 uint32_t parking_version;
297 uint32_t performance_interrupt;
298 uint64_t parked_address;
299 uint64_t base_address;
300 uint64_t gicv_base_address;
301 uint64_t gich_base_address;
302 uint32_t vgic_interrupt;
303 uint64_t gicr_base_address;
304 uint64_t arm_mpidr;
305} QEMU_PACKED;
306
307typedef struct AcpiMadtGenericCpuInterface AcpiMadtGenericCpuInterface;
308
309
310#define ACPI_MADT_GICC_ENABLED 1
311
312struct AcpiMadtGenericDistributor {
313 ACPI_SUB_HEADER_DEF
314 uint16_t reserved;
315 uint32_t gic_id;
316 uint64_t base_address;
317 uint32_t global_irq_base;
318
319 uint8_t version;
320 uint8_t reserved2[3];
321} QEMU_PACKED;
322
323typedef struct AcpiMadtGenericDistributor AcpiMadtGenericDistributor;
324
325struct AcpiMadtGenericMsiFrame {
326 ACPI_SUB_HEADER_DEF
327 uint16_t reserved;
328 uint32_t gic_msi_frame_id;
329 uint64_t base_address;
330 uint32_t flags;
331 uint16_t spi_count;
332 uint16_t spi_base;
333} QEMU_PACKED;
334
335typedef struct AcpiMadtGenericMsiFrame AcpiMadtGenericMsiFrame;
336
337struct AcpiMadtGenericRedistributor {
338 ACPI_SUB_HEADER_DEF
339 uint16_t reserved;
340 uint64_t base_address;
341 uint32_t range_length;
342} QEMU_PACKED;
343
344typedef struct AcpiMadtGenericRedistributor AcpiMadtGenericRedistributor;
345
346struct AcpiMadtGenericTranslator {
347 ACPI_SUB_HEADER_DEF
348 uint16_t reserved;
349 uint32_t translation_id;
350 uint64_t base_address;
351 uint32_t reserved2;
352} QEMU_PACKED;
353
354typedef struct AcpiMadtGenericTranslator AcpiMadtGenericTranslator;
355
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357
358
359#define ACPI_GTDT_INTERRUPT_MODE_LEVEL (0 << 0)
360#define ACPI_GTDT_INTERRUPT_MODE_EDGE (1 << 0)
361#define ACPI_GTDT_CAP_ALWAYS_ON (1 << 2)
362
363struct AcpiGenericTimerTable {
364 ACPI_TABLE_HEADER_DEF
365 uint64_t counter_block_addresss;
366 uint32_t reserved;
367 uint32_t secure_el1_interrupt;
368 uint32_t secure_el1_flags;
369 uint32_t non_secure_el1_interrupt;
370 uint32_t non_secure_el1_flags;
371 uint32_t virtual_timer_interrupt;
372 uint32_t virtual_timer_flags;
373 uint32_t non_secure_el2_interrupt;
374 uint32_t non_secure_el2_flags;
375 uint64_t counter_read_block_address;
376 uint32_t platform_timer_count;
377 uint32_t platform_timer_offset;
378} QEMU_PACKED;
379typedef struct AcpiGenericTimerTable AcpiGenericTimerTable;
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383
384struct Acpi20Hpet {
385 ACPI_TABLE_HEADER_DEF
386 uint32_t timer_block_id;
387 struct AcpiGenericAddress addr;
388 uint8_t hpet_number;
389 uint16_t min_tick;
390 uint8_t page_protect;
391} QEMU_PACKED;
392typedef struct Acpi20Hpet Acpi20Hpet;
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397
398struct AcpiSystemResourceAffinityTable {
399 ACPI_TABLE_HEADER_DEF
400 uint32_t reserved1;
401 uint32_t reserved2[2];
402} QEMU_PACKED;
403typedef struct AcpiSystemResourceAffinityTable AcpiSystemResourceAffinityTable;
404
405#define ACPI_SRAT_PROCESSOR_APIC 0
406#define ACPI_SRAT_MEMORY 1
407#define ACPI_SRAT_PROCESSOR_x2APIC 2
408#define ACPI_SRAT_PROCESSOR_GICC 3
409
410struct AcpiSratProcessorAffinity {
411 ACPI_SUB_HEADER_DEF
412 uint8_t proximity_lo;
413 uint8_t local_apic_id;
414 uint32_t flags;
415 uint8_t local_sapic_eid;
416 uint8_t proximity_hi[3];
417 uint32_t reserved;
418} QEMU_PACKED;
419typedef struct AcpiSratProcessorAffinity AcpiSratProcessorAffinity;
420
421struct AcpiSratProcessorX2ApicAffinity {
422 ACPI_SUB_HEADER_DEF
423 uint16_t reserved;
424 uint32_t proximity_domain;
425 uint32_t x2apic_id;
426 uint32_t flags;
427 uint32_t clk_domain;
428 uint32_t reserved2;
429} QEMU_PACKED;
430typedef struct AcpiSratProcessorX2ApicAffinity AcpiSratProcessorX2ApicAffinity;
431
432struct AcpiSratMemoryAffinity {
433 ACPI_SUB_HEADER_DEF
434 uint32_t proximity;
435 uint16_t reserved1;
436 uint64_t base_addr;
437 uint64_t range_length;
438 uint32_t reserved2;
439 uint32_t flags;
440 uint32_t reserved3[2];
441} QEMU_PACKED;
442typedef struct AcpiSratMemoryAffinity AcpiSratMemoryAffinity;
443
444struct AcpiSratProcessorGiccAffinity {
445 ACPI_SUB_HEADER_DEF
446 uint32_t proximity;
447 uint32_t acpi_processor_uid;
448 uint32_t flags;
449 uint32_t clock_domain;
450} QEMU_PACKED;
451
452typedef struct AcpiSratProcessorGiccAffinity AcpiSratProcessorGiccAffinity;
453
454
455
456struct AcpiMcfgAllocation {
457 uint64_t address;
458 uint16_t pci_segment;
459 uint8_t start_bus_number;
460 uint8_t end_bus_number;
461 uint32_t reserved;
462} QEMU_PACKED;
463typedef struct AcpiMcfgAllocation AcpiMcfgAllocation;
464
465struct AcpiTableMcfg {
466 ACPI_TABLE_HEADER_DEF;
467 uint8_t reserved[8];
468 AcpiMcfgAllocation allocation[0];
469} QEMU_PACKED;
470typedef struct AcpiTableMcfg AcpiTableMcfg;
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477
478struct Acpi20Tcpa {
479 ACPI_TABLE_HEADER_DEF
480 uint16_t platform_class;
481 uint32_t log_area_minimum_length;
482 uint64_t log_area_start_address;
483} QEMU_PACKED;
484typedef struct Acpi20Tcpa Acpi20Tcpa;
485
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488
489
490
491
492struct Acpi20TPM2 {
493 ACPI_TABLE_HEADER_DEF
494 uint16_t platform_class;
495 uint16_t reserved;
496 uint64_t control_area_address;
497 uint32_t start_method;
498 uint8_t start_method_params[12];
499 uint32_t log_area_minimum_length;
500 uint64_t log_area_start_address;
501} QEMU_PACKED;
502typedef struct Acpi20TPM2 Acpi20TPM2;
503
504
505struct AcpiTableDmar {
506 ACPI_TABLE_HEADER_DEF
507 uint8_t host_address_width;
508 uint8_t flags;
509 uint8_t reserved[10];
510} QEMU_PACKED;
511typedef struct AcpiTableDmar AcpiTableDmar;
512
513
514#define ACPI_DMAR_INTR_REMAP 1
515#define ACPI_DMAR_X2APIC_OPT_OUT (1 << 1)
516
517
518enum {
519 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0,
520 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1,
521 ACPI_DMAR_TYPE_ATSR = 2,
522 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3,
523 ACPI_DMAR_TYPE_ANDD = 4,
524 ACPI_DMAR_TYPE_RESERVED = 5
525};
526
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528
529
530
531
532struct AcpiDmarDeviceScope {
533 uint8_t entry_type;
534 uint8_t length;
535 uint16_t reserved;
536 uint8_t enumeration_id;
537 uint8_t bus;
538 struct {
539 uint8_t device;
540 uint8_t function;
541 } path[0];
542} QEMU_PACKED;
543typedef struct AcpiDmarDeviceScope AcpiDmarDeviceScope;
544
545
546struct AcpiDmarHardwareUnit {
547 uint16_t type;
548 uint16_t length;
549 uint8_t flags;
550 uint8_t reserved;
551 uint16_t pci_segment;
552 uint64_t address;
553 AcpiDmarDeviceScope scope[0];
554} QEMU_PACKED;
555typedef struct AcpiDmarHardwareUnit AcpiDmarHardwareUnit;
556
557
558struct AcpiDmarRootPortATS {
559 uint16_t type;
560 uint16_t length;
561 uint8_t flags;
562 uint8_t reserved;
563 uint16_t pci_segment;
564 AcpiDmarDeviceScope scope[0];
565} QEMU_PACKED;
566typedef struct AcpiDmarRootPortATS AcpiDmarRootPortATS;
567
568
569#define ACPI_DMAR_INCLUDE_PCI_ALL 1
570#define ACPI_DMAR_ATSR_ALL_PORTS 1
571
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577
578struct AcpiIortTable {
579 ACPI_TABLE_HEADER_DEF
580 uint32_t node_count;
581 uint32_t node_offset;
582 uint32_t reserved;
583} QEMU_PACKED;
584typedef struct AcpiIortTable AcpiIortTable;
585
586
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588
589
590#define ACPI_IORT_NODE_HEADER_DEF \
591 uint8_t type; \
592 uint16_t length; \
593 uint8_t revision; \
594 uint32_t reserved; \
595 uint32_t mapping_count; \
596 uint32_t mapping_offset;
597
598
599enum {
600 ACPI_IORT_NODE_ITS_GROUP = 0x00,
601 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
602 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
603 ACPI_IORT_NODE_SMMU = 0x03,
604 ACPI_IORT_NODE_SMMU_V3 = 0x04
605};
606
607struct AcpiIortIdMapping {
608 uint32_t input_base;
609 uint32_t id_count;
610 uint32_t output_base;
611 uint32_t output_reference;
612 uint32_t flags;
613} QEMU_PACKED;
614typedef struct AcpiIortIdMapping AcpiIortIdMapping;
615
616struct AcpiIortMemoryAccess {
617 uint32_t cache_coherency;
618 uint8_t hints;
619 uint16_t reserved;
620 uint8_t memory_flags;
621} QEMU_PACKED;
622typedef struct AcpiIortMemoryAccess AcpiIortMemoryAccess;
623
624struct AcpiIortItsGroup {
625 ACPI_IORT_NODE_HEADER_DEF
626 uint32_t its_count;
627 uint32_t identifiers[0];
628} QEMU_PACKED;
629typedef struct AcpiIortItsGroup AcpiIortItsGroup;
630
631struct AcpiIortSmmu3 {
632 ACPI_IORT_NODE_HEADER_DEF
633 uint64_t base_address;
634 uint32_t flags;
635 uint32_t reserved2;
636 uint64_t vatos_address;
637 uint32_t model;
638 uint32_t event_gsiv;
639 uint32_t pri_gsiv;
640 uint32_t gerr_gsiv;
641 uint32_t sync_gsiv;
642 AcpiIortIdMapping id_mapping_array[0];
643} QEMU_PACKED;
644typedef struct AcpiIortSmmu3 AcpiIortSmmu3;
645
646struct AcpiIortRC {
647 ACPI_IORT_NODE_HEADER_DEF
648 AcpiIortMemoryAccess memory_properties;
649 uint32_t ats_attribute;
650 uint32_t pci_segment_number;
651 AcpiIortIdMapping id_mapping_array[0];
652} QEMU_PACKED;
653typedef struct AcpiIortRC AcpiIortRC;
654
655#endif
656