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12#ifndef CSS_H
13#define CSS_H
14
15#include "cpu.h"
16#include "hw/s390x/adapter.h"
17#include "hw/s390x/s390_flic.h"
18#include "hw/s390x/ioinst.h"
19#include "sysemu/kvm.h"
20
21
22#define MAX_DEVNO 65535
23#define MAX_SCHID 65535
24#define MAX_SSID 3
25#define MAX_CSSID 255
26#define MAX_CHPID 255
27
28#define MAX_ISC 7
29
30#define MAX_CIWS 62
31
32#define VIRTUAL_CSSID 0xfe
33#define VIRTIO_CCW_CHPID 0
34
35typedef struct CIW {
36 uint8_t type;
37 uint8_t command;
38 uint16_t count;
39} QEMU_PACKED CIW;
40
41typedef struct SenseId {
42
43 uint8_t reserved;
44 uint16_t cu_type;
45 uint8_t cu_model;
46 uint16_t dev_type;
47 uint8_t dev_model;
48 uint8_t unused;
49
50 CIW ciw[MAX_CIWS];
51} SenseId;
52
53
54typedef struct CMB {
55 uint16_t ssch_rsch_count;
56 uint16_t sample_count;
57 uint32_t device_connect_time;
58 uint32_t function_pending_time;
59 uint32_t device_disconnect_time;
60 uint32_t control_unit_queuing_time;
61 uint32_t device_active_only_time;
62 uint32_t reserved[2];
63} QEMU_PACKED CMB;
64
65typedef struct CMBE {
66 uint32_t ssch_rsch_count;
67 uint32_t sample_count;
68 uint32_t device_connect_time;
69 uint32_t function_pending_time;
70 uint32_t device_disconnect_time;
71 uint32_t control_unit_queuing_time;
72 uint32_t device_active_only_time;
73 uint32_t device_busy_time;
74 uint32_t initial_command_response_time;
75 uint32_t reserved[7];
76} QEMU_PACKED CMBE;
77
78typedef enum CcwDataStreamOp {
79 CDS_OP_R = 0,
80 CDS_OP_W = 1,
81 CDS_OP_A = 2
82} CcwDataStreamOp;
83
84
85typedef struct CcwDataStream {
86#define CDS_F_IDA 0x01
87#define CDS_F_MIDA 0x02
88#define CDS_F_I2K 0x04
89#define CDS_F_C64 0x08
90#define CDS_F_FMT 0x10
91#define CDS_F_STREAM_BROKEN 0x80
92 uint8_t flags;
93 uint8_t at_idaw;
94 uint16_t at_byte;
95 uint16_t count;
96 uint32_t cda_orig;
97 int (*op_handler)(struct CcwDataStream *cds, void *buff, int len,
98 CcwDataStreamOp op);
99 hwaddr cda;
100} CcwDataStream;
101
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106
107typedef enum IOInstEnding {
108
109 IOINST_CC_EXPECTED = 0,
110
111 IOINST_CC_STATUS_PRESENT = 1,
112
113 IOINST_CC_BUSY = 2,
114
115 IOINST_CC_NOT_OPERATIONAL = 3
116} IOInstEnding;
117
118typedef struct SubchDev SubchDev;
119struct SubchDev {
120
121 SCHIB curr_status;
122 ORB orb;
123 uint8_t cssid;
124 uint8_t ssid;
125 uint16_t schid;
126 uint16_t devno;
127 uint8_t sense_data[32];
128 hwaddr channel_prog;
129 CCW1 last_cmd;
130 bool last_cmd_valid;
131 bool ccw_fmt_1;
132 bool thinint_active;
133 uint8_t ccw_no_data_cnt;
134 uint16_t migrated_schid;
135 CcwDataStream cds;
136
137 int (*ccw_cb) (SubchDev *, CCW1);
138 void (*disable_cb)(SubchDev *);
139 IOInstEnding (*do_subchannel_work) (SubchDev *);
140 SenseId id;
141 void *driver_data;
142};
143
144static inline void sch_gen_unit_exception(SubchDev *sch)
145{
146 sch->curr_status.scsw.ctrl &= ~SCSW_ACTL_START_PEND;
147 sch->curr_status.scsw.ctrl |= SCSW_STCTL_PRIMARY |
148 SCSW_STCTL_SECONDARY |
149 SCSW_STCTL_ALERT |
150 SCSW_STCTL_STATUS_PEND;
151 sch->curr_status.scsw.cpa = sch->channel_prog + 8;
152 sch->curr_status.scsw.dstat = SCSW_DSTAT_UNIT_EXCEP;
153}
154
155extern const VMStateDescription vmstate_subch_dev;
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162
163typedef struct CssDevId {
164 uint8_t cssid;
165 uint8_t ssid;
166 uint16_t devid;
167 bool valid;
168} CssDevId;
169
170extern const PropertyInfo css_devid_propinfo;
171
172#define DEFINE_PROP_CSS_DEV_ID(_n, _s, _f) \
173 DEFINE_PROP(_n, _s, _f, css_devid_propinfo, CssDevId)
174
175typedef struct IndAddr {
176 hwaddr addr;
177 uint64_t map;
178 unsigned long refcnt;
179 int32_t len;
180 QTAILQ_ENTRY(IndAddr) sibling;
181} IndAddr;
182
183extern const VMStateDescription vmstate_ind_addr;
184
185#define VMSTATE_PTR_TO_IND_ADDR(_f, _s) \
186 VMSTATE_STRUCT(_f, _s, 1, vmstate_ind_addr, IndAddr*)
187
188IndAddr *get_indicator(hwaddr ind_addr, int len);
189void release_indicator(AdapterInfo *adapter, IndAddr *indicator);
190int map_indicator(AdapterInfo *adapter, IndAddr *indicator);
191
192typedef SubchDev *(*css_subch_cb_func)(uint8_t m, uint8_t cssid, uint8_t ssid,
193 uint16_t schid);
194int css_create_css_image(uint8_t cssid, bool default_image);
195bool css_devno_used(uint8_t cssid, uint8_t ssid, uint16_t devno);
196void css_subch_assign(uint8_t cssid, uint8_t ssid, uint16_t schid,
197 uint16_t devno, SubchDev *sch);
198void css_sch_build_virtual_schib(SubchDev *sch, uint8_t chpid, uint8_t type);
199int css_sch_build_schib(SubchDev *sch, CssDevId *dev_id);
200unsigned int css_find_free_chpid(uint8_t cssid);
201uint16_t css_build_subchannel_id(SubchDev *sch);
202void copy_scsw_to_guest(SCSW *dest, const SCSW *src);
203void css_inject_io_interrupt(SubchDev *sch);
204void css_reset(void);
205void css_reset_sch(SubchDev *sch);
206void css_queue_crw(uint8_t rsc, uint8_t erc, int solicited,
207 int chain, uint16_t rsid);
208void css_generate_sch_crws(uint8_t cssid, uint8_t ssid, uint16_t schid,
209 int hotplugged, int add);
210void css_generate_chp_crws(uint8_t cssid, uint8_t chpid);
211void css_generate_css_crws(uint8_t cssid);
212void css_clear_sei_pending(void);
213IOInstEnding s390_ccw_cmd_request(SubchDev *sch);
214IOInstEnding do_subchannel_work_virtual(SubchDev *sub);
215IOInstEnding do_subchannel_work_passthrough(SubchDev *sub);
216
217typedef enum {
218 CSS_IO_ADAPTER_VIRTIO = 0,
219 CSS_IO_ADAPTER_PCI = 1,
220 CSS_IO_ADAPTER_TYPE_NUMS,
221} CssIoAdapterType;
222
223void css_adapter_interrupt(CssIoAdapterType type, uint8_t isc);
224int css_do_sic(CPUS390XState *env, uint8_t isc, uint16_t mode);
225uint32_t css_get_adapter_id(CssIoAdapterType type, uint8_t isc);
226void css_register_io_adapters(CssIoAdapterType type, bool swap, bool maskable,
227 uint8_t flags, Error **errp);
228
229#ifndef CONFIG_KVM
230#define S390_ADAPTER_SUPPRESSIBLE 0x01
231#else
232#define S390_ADAPTER_SUPPRESSIBLE KVM_S390_ADAPTER_SUPPRESSIBLE
233#endif
234
235#ifndef CONFIG_USER_ONLY
236SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid,
237 uint16_t schid);
238bool css_subch_visible(SubchDev *sch);
239void css_conditional_io_interrupt(SubchDev *sch);
240int css_do_stsch(SubchDev *sch, SCHIB *schib);
241bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid);
242IOInstEnding css_do_msch(SubchDev *sch, const SCHIB *schib);
243IOInstEnding css_do_xsch(SubchDev *sch);
244IOInstEnding css_do_csch(SubchDev *sch);
245IOInstEnding css_do_hsch(SubchDev *sch);
246IOInstEnding css_do_ssch(SubchDev *sch, ORB *orb);
247int css_do_tsch_get_irb(SubchDev *sch, IRB *irb, int *irb_len);
248void css_do_tsch_update_subch(SubchDev *sch);
249int css_do_stcrw(CRW *crw);
250void css_undo_stcrw(CRW *crw);
251int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, uint8_t l_chpid,
252 int rfmt, void *buf);
253void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo);
254int css_enable_mcsse(void);
255int css_enable_mss(void);
256IOInstEnding css_do_rsch(SubchDev *sch);
257int css_do_rchp(uint8_t cssid, uint8_t chpid);
258bool css_present(uint8_t cssid);
259#endif
260
261extern const PropertyInfo css_devid_ro_propinfo;
262
263#define DEFINE_PROP_CSS_DEV_ID_RO(_n, _s, _f) \
264 DEFINE_PROP(_n, _s, _f, css_devid_ro_propinfo, CssDevId)
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282SubchDev *css_create_sch(CssDevId bus_id, Error **errp);
283
284
285void css_register_vmstate(void);
286
287
288void ccw_dstream_init(CcwDataStream *cds, CCW1 const *ccw, ORB const *orb);
289
290static inline void ccw_dstream_rewind(CcwDataStream *cds)
291{
292 cds->at_byte = 0;
293 cds->at_idaw = 0;
294 cds->cda = cds->cda_orig;
295}
296
297static inline bool ccw_dstream_good(CcwDataStream *cds)
298{
299 return !(cds->flags & CDS_F_STREAM_BROKEN);
300}
301
302static inline uint16_t ccw_dstream_residual_count(CcwDataStream *cds)
303{
304 return cds->count - cds->at_byte;
305}
306
307static inline uint16_t ccw_dstream_avail(CcwDataStream *cds)
308{
309 return ccw_dstream_good(cds) ? ccw_dstream_residual_count(cds) : 0;
310}
311
312static inline int ccw_dstream_advance(CcwDataStream *cds, int len)
313{
314 return cds->op_handler(cds, NULL, len, CDS_OP_A);
315}
316
317static inline int ccw_dstream_write_buf(CcwDataStream *cds, void *buff, int len)
318{
319 return cds->op_handler(cds, buff, len, CDS_OP_W);
320}
321
322static inline int ccw_dstream_read_buf(CcwDataStream *cds, void *buff, int len)
323{
324 return cds->op_handler(cds, buff, len, CDS_OP_R);
325}
326
327#define ccw_dstream_read(cds, v) ccw_dstream_read_buf((cds), &(v), sizeof(v))
328#define ccw_dstream_write(cds, v) ccw_dstream_write_buf((cds), &(v), sizeof(v))
329
330#endif
331