qemu/linux-headers/linux/vfio.h
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   1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
   2/*
   3 * VFIO API definition
   4 *
   5 * Copyright (C) 2012 Red Hat, Inc.  All rights reserved.
   6 *     Author: Alex Williamson <alex.williamson@redhat.com>
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License version 2 as
  10 * published by the Free Software Foundation.
  11 */
  12#ifndef VFIO_H
  13#define VFIO_H
  14
  15#include <linux/types.h>
  16#include <linux/ioctl.h>
  17
  18#define VFIO_API_VERSION        0
  19
  20
  21/* Kernel & User level defines for VFIO IOCTLs. */
  22
  23/* Extensions */
  24
  25#define VFIO_TYPE1_IOMMU                1
  26#define VFIO_SPAPR_TCE_IOMMU            2
  27#define VFIO_TYPE1v2_IOMMU              3
  28/*
  29 * IOMMU enforces DMA cache coherence (ex. PCIe NoSnoop stripping).  This
  30 * capability is subject to change as groups are added or removed.
  31 */
  32#define VFIO_DMA_CC_IOMMU               4
  33
  34/* Check if EEH is supported */
  35#define VFIO_EEH                        5
  36
  37/* Two-stage IOMMU */
  38#define VFIO_TYPE1_NESTING_IOMMU        6       /* Implies v2 */
  39
  40#define VFIO_SPAPR_TCE_v2_IOMMU         7
  41
  42/*
  43 * The No-IOMMU IOMMU offers no translation or isolation for devices and
  44 * supports no ioctls outside of VFIO_CHECK_EXTENSION.  Use of VFIO's No-IOMMU
  45 * code will taint the host kernel and should be used with extreme caution.
  46 */
  47#define VFIO_NOIOMMU_IOMMU              8
  48
  49/*
  50 * The IOCTL interface is designed for extensibility by embedding the
  51 * structure length (argsz) and flags into structures passed between
  52 * kernel and userspace.  We therefore use the _IO() macro for these
  53 * defines to avoid implicitly embedding a size into the ioctl request.
  54 * As structure fields are added, argsz will increase to match and flag
  55 * bits will be defined to indicate additional fields with valid data.
  56 * It's *always* the caller's responsibility to indicate the size of
  57 * the structure passed by setting argsz appropriately.
  58 */
  59
  60#define VFIO_TYPE       (';')
  61#define VFIO_BASE       100
  62
  63/*
  64 * For extension of INFO ioctls, VFIO makes use of a capability chain
  65 * designed after PCI/e capabilities.  A flag bit indicates whether
  66 * this capability chain is supported and a field defined in the fixed
  67 * structure defines the offset of the first capability in the chain.
  68 * This field is only valid when the corresponding bit in the flags
  69 * bitmap is set.  This offset field is relative to the start of the
  70 * INFO buffer, as is the next field within each capability header.
  71 * The id within the header is a shared address space per INFO ioctl,
  72 * while the version field is specific to the capability id.  The
  73 * contents following the header are specific to the capability id.
  74 */
  75struct vfio_info_cap_header {
  76        __u16   id;             /* Identifies capability */
  77        __u16   version;        /* Version specific to the capability ID */
  78        __u32   next;           /* Offset of next capability */
  79};
  80
  81/*
  82 * Callers of INFO ioctls passing insufficiently sized buffers will see
  83 * the capability chain flag bit set, a zero value for the first capability
  84 * offset (if available within the provided argsz), and argsz will be
  85 * updated to report the necessary buffer size.  For compatibility, the
  86 * INFO ioctl will not report error in this case, but the capability chain
  87 * will not be available.
  88 */
  89
  90/* -------- IOCTLs for VFIO file descriptor (/dev/vfio/vfio) -------- */
  91
  92/**
  93 * VFIO_GET_API_VERSION - _IO(VFIO_TYPE, VFIO_BASE + 0)
  94 *
  95 * Report the version of the VFIO API.  This allows us to bump the entire
  96 * API version should we later need to add or change features in incompatible
  97 * ways.
  98 * Return: VFIO_API_VERSION
  99 * Availability: Always
 100 */
 101#define VFIO_GET_API_VERSION            _IO(VFIO_TYPE, VFIO_BASE + 0)
 102
 103/**
 104 * VFIO_CHECK_EXTENSION - _IOW(VFIO_TYPE, VFIO_BASE + 1, __u32)
 105 *
 106 * Check whether an extension is supported.
 107 * Return: 0 if not supported, 1 (or some other positive integer) if supported.
 108 * Availability: Always
 109 */
 110#define VFIO_CHECK_EXTENSION            _IO(VFIO_TYPE, VFIO_BASE + 1)
 111
 112/**
 113 * VFIO_SET_IOMMU - _IOW(VFIO_TYPE, VFIO_BASE + 2, __s32)
 114 *
 115 * Set the iommu to the given type.  The type must be supported by an
 116 * iommu driver as verified by calling CHECK_EXTENSION using the same
 117 * type.  A group must be set to this file descriptor before this
 118 * ioctl is available.  The IOMMU interfaces enabled by this call are
 119 * specific to the value set.
 120 * Return: 0 on success, -errno on failure
 121 * Availability: When VFIO group attached
 122 */
 123#define VFIO_SET_IOMMU                  _IO(VFIO_TYPE, VFIO_BASE + 2)
 124
 125/* -------- IOCTLs for GROUP file descriptors (/dev/vfio/$GROUP) -------- */
 126
 127/**
 128 * VFIO_GROUP_GET_STATUS - _IOR(VFIO_TYPE, VFIO_BASE + 3,
 129 *                                              struct vfio_group_status)
 130 *
 131 * Retrieve information about the group.  Fills in provided
 132 * struct vfio_group_info.  Caller sets argsz.
 133 * Return: 0 on succes, -errno on failure.
 134 * Availability: Always
 135 */
 136struct vfio_group_status {
 137        __u32   argsz;
 138        __u32   flags;
 139#define VFIO_GROUP_FLAGS_VIABLE         (1 << 0)
 140#define VFIO_GROUP_FLAGS_CONTAINER_SET  (1 << 1)
 141};
 142#define VFIO_GROUP_GET_STATUS           _IO(VFIO_TYPE, VFIO_BASE + 3)
 143
 144/**
 145 * VFIO_GROUP_SET_CONTAINER - _IOW(VFIO_TYPE, VFIO_BASE + 4, __s32)
 146 *
 147 * Set the container for the VFIO group to the open VFIO file
 148 * descriptor provided.  Groups may only belong to a single
 149 * container.  Containers may, at their discretion, support multiple
 150 * groups.  Only when a container is set are all of the interfaces
 151 * of the VFIO file descriptor and the VFIO group file descriptor
 152 * available to the user.
 153 * Return: 0 on success, -errno on failure.
 154 * Availability: Always
 155 */
 156#define VFIO_GROUP_SET_CONTAINER        _IO(VFIO_TYPE, VFIO_BASE + 4)
 157
 158/**
 159 * VFIO_GROUP_UNSET_CONTAINER - _IO(VFIO_TYPE, VFIO_BASE + 5)
 160 *
 161 * Remove the group from the attached container.  This is the
 162 * opposite of the SET_CONTAINER call and returns the group to
 163 * an initial state.  All device file descriptors must be released
 164 * prior to calling this interface.  When removing the last group
 165 * from a container, the IOMMU will be disabled and all state lost,
 166 * effectively also returning the VFIO file descriptor to an initial
 167 * state.
 168 * Return: 0 on success, -errno on failure.
 169 * Availability: When attached to container
 170 */
 171#define VFIO_GROUP_UNSET_CONTAINER      _IO(VFIO_TYPE, VFIO_BASE + 5)
 172
 173/**
 174 * VFIO_GROUP_GET_DEVICE_FD - _IOW(VFIO_TYPE, VFIO_BASE + 6, char)
 175 *
 176 * Return a new file descriptor for the device object described by
 177 * the provided string.  The string should match a device listed in
 178 * the devices subdirectory of the IOMMU group sysfs entry.  The
 179 * group containing the device must already be added to this context.
 180 * Return: new file descriptor on success, -errno on failure.
 181 * Availability: When attached to container
 182 */
 183#define VFIO_GROUP_GET_DEVICE_FD        _IO(VFIO_TYPE, VFIO_BASE + 6)
 184
 185/* --------------- IOCTLs for DEVICE file descriptors --------------- */
 186
 187/**
 188 * VFIO_DEVICE_GET_INFO - _IOR(VFIO_TYPE, VFIO_BASE + 7,
 189 *                                              struct vfio_device_info)
 190 *
 191 * Retrieve information about the device.  Fills in provided
 192 * struct vfio_device_info.  Caller sets argsz.
 193 * Return: 0 on success, -errno on failure.
 194 */
 195struct vfio_device_info {
 196        __u32   argsz;
 197        __u32   flags;
 198#define VFIO_DEVICE_FLAGS_RESET (1 << 0)        /* Device supports reset */
 199#define VFIO_DEVICE_FLAGS_PCI   (1 << 1)        /* vfio-pci device */
 200#define VFIO_DEVICE_FLAGS_PLATFORM (1 << 2)     /* vfio-platform device */
 201#define VFIO_DEVICE_FLAGS_AMBA  (1 << 3)        /* vfio-amba device */
 202#define VFIO_DEVICE_FLAGS_CCW   (1 << 4)        /* vfio-ccw device */
 203#define VFIO_DEVICE_FLAGS_AP    (1 << 5)        /* vfio-ap device */
 204        __u32   num_regions;    /* Max region index + 1 */
 205        __u32   num_irqs;       /* Max IRQ index + 1 */
 206};
 207#define VFIO_DEVICE_GET_INFO            _IO(VFIO_TYPE, VFIO_BASE + 7)
 208
 209/*
 210 * Vendor driver using Mediated device framework should provide device_api
 211 * attribute in supported type attribute groups. Device API string should be one
 212 * of the following corresponding to device flags in vfio_device_info structure.
 213 */
 214
 215#define VFIO_DEVICE_API_PCI_STRING              "vfio-pci"
 216#define VFIO_DEVICE_API_PLATFORM_STRING         "vfio-platform"
 217#define VFIO_DEVICE_API_AMBA_STRING             "vfio-amba"
 218#define VFIO_DEVICE_API_CCW_STRING              "vfio-ccw"
 219#define VFIO_DEVICE_API_AP_STRING               "vfio-ap"
 220
 221/**
 222 * VFIO_DEVICE_GET_REGION_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 8,
 223 *                                     struct vfio_region_info)
 224 *
 225 * Retrieve information about a device region.  Caller provides
 226 * struct vfio_region_info with index value set.  Caller sets argsz.
 227 * Implementation of region mapping is bus driver specific.  This is
 228 * intended to describe MMIO, I/O port, as well as bus specific
 229 * regions (ex. PCI config space).  Zero sized regions may be used
 230 * to describe unimplemented regions (ex. unimplemented PCI BARs).
 231 * Return: 0 on success, -errno on failure.
 232 */
 233struct vfio_region_info {
 234        __u32   argsz;
 235        __u32   flags;
 236#define VFIO_REGION_INFO_FLAG_READ      (1 << 0) /* Region supports read */
 237#define VFIO_REGION_INFO_FLAG_WRITE     (1 << 1) /* Region supports write */
 238#define VFIO_REGION_INFO_FLAG_MMAP      (1 << 2) /* Region supports mmap */
 239#define VFIO_REGION_INFO_FLAG_CAPS      (1 << 3) /* Info supports caps */
 240        __u32   index;          /* Region index */
 241        __u32   cap_offset;     /* Offset within info struct of first cap */
 242        __u64   size;           /* Region size (bytes) */
 243        __u64   offset;         /* Region offset from start of device fd */
 244};
 245#define VFIO_DEVICE_GET_REGION_INFO     _IO(VFIO_TYPE, VFIO_BASE + 8)
 246
 247/*
 248 * The sparse mmap capability allows finer granularity of specifying areas
 249 * within a region with mmap support.  When specified, the user should only
 250 * mmap the offset ranges specified by the areas array.  mmaps outside of the
 251 * areas specified may fail (such as the range covering a PCI MSI-X table) or
 252 * may result in improper device behavior.
 253 *
 254 * The structures below define version 1 of this capability.
 255 */
 256#define VFIO_REGION_INFO_CAP_SPARSE_MMAP        1
 257
 258struct vfio_region_sparse_mmap_area {
 259        __u64   offset; /* Offset of mmap'able area within region */
 260        __u64   size;   /* Size of mmap'able area */
 261};
 262
 263struct vfio_region_info_cap_sparse_mmap {
 264        struct vfio_info_cap_header header;
 265        __u32   nr_areas;
 266        __u32   reserved;
 267        struct vfio_region_sparse_mmap_area areas[];
 268};
 269
 270/*
 271 * The device specific type capability allows regions unique to a specific
 272 * device or class of devices to be exposed.  This helps solve the problem for
 273 * vfio bus drivers of defining which region indexes correspond to which region
 274 * on the device, without needing to resort to static indexes, as done by
 275 * vfio-pci.  For instance, if we were to go back in time, we might remove
 276 * VFIO_PCI_VGA_REGION_INDEX and let vfio-pci simply define that all indexes
 277 * greater than or equal to VFIO_PCI_NUM_REGIONS are device specific and we'd
 278 * make a "VGA" device specific type to describe the VGA access space.  This
 279 * means that non-VGA devices wouldn't need to waste this index, and thus the
 280 * address space associated with it due to implementation of device file
 281 * descriptor offsets in vfio-pci.
 282 *
 283 * The current implementation is now part of the user ABI, so we can't use this
 284 * for VGA, but there are other upcoming use cases, such as opregions for Intel
 285 * IGD devices and framebuffers for vGPU devices.  We missed VGA, but we'll
 286 * use this for future additions.
 287 *
 288 * The structure below defines version 1 of this capability.
 289 */
 290#define VFIO_REGION_INFO_CAP_TYPE       2
 291
 292struct vfio_region_info_cap_type {
 293        struct vfio_info_cap_header header;
 294        __u32 type;     /* global per bus driver */
 295        __u32 subtype;  /* type specific */
 296};
 297
 298#define VFIO_REGION_TYPE_PCI_VENDOR_TYPE        (1 << 31)
 299#define VFIO_REGION_TYPE_PCI_VENDOR_MASK        (0xffff)
 300
 301/* 8086 Vendor sub-types */
 302#define VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION  (1)
 303#define VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG  (2)
 304#define VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG   (3)
 305
 306/*
 307 * The MSIX mappable capability informs that MSIX data of a BAR can be mmapped
 308 * which allows direct access to non-MSIX registers which happened to be within
 309 * the same system page.
 310 *
 311 * Even though the userspace gets direct access to the MSIX data, the existing
 312 * VFIO_DEVICE_SET_IRQS interface must still be used for MSIX configuration.
 313 */
 314#define VFIO_REGION_INFO_CAP_MSIX_MAPPABLE      3
 315
 316/**
 317 * VFIO_DEVICE_GET_IRQ_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 9,
 318 *                                  struct vfio_irq_info)
 319 *
 320 * Retrieve information about a device IRQ.  Caller provides
 321 * struct vfio_irq_info with index value set.  Caller sets argsz.
 322 * Implementation of IRQ mapping is bus driver specific.  Indexes
 323 * using multiple IRQs are primarily intended to support MSI-like
 324 * interrupt blocks.  Zero count irq blocks may be used to describe
 325 * unimplemented interrupt types.
 326 *
 327 * The EVENTFD flag indicates the interrupt index supports eventfd based
 328 * signaling.
 329 *
 330 * The MASKABLE flags indicates the index supports MASK and UNMASK
 331 * actions described below.
 332 *
 333 * AUTOMASKED indicates that after signaling, the interrupt line is
 334 * automatically masked by VFIO and the user needs to unmask the line
 335 * to receive new interrupts.  This is primarily intended to distinguish
 336 * level triggered interrupts.
 337 *
 338 * The NORESIZE flag indicates that the interrupt lines within the index
 339 * are setup as a set and new subindexes cannot be enabled without first
 340 * disabling the entire index.  This is used for interrupts like PCI MSI
 341 * and MSI-X where the driver may only use a subset of the available
 342 * indexes, but VFIO needs to enable a specific number of vectors
 343 * upfront.  In the case of MSI-X, where the user can enable MSI-X and
 344 * then add and unmask vectors, it's up to userspace to make the decision
 345 * whether to allocate the maximum supported number of vectors or tear
 346 * down setup and incrementally increase the vectors as each is enabled.
 347 */
 348struct vfio_irq_info {
 349        __u32   argsz;
 350        __u32   flags;
 351#define VFIO_IRQ_INFO_EVENTFD           (1 << 0)
 352#define VFIO_IRQ_INFO_MASKABLE          (1 << 1)
 353#define VFIO_IRQ_INFO_AUTOMASKED        (1 << 2)
 354#define VFIO_IRQ_INFO_NORESIZE          (1 << 3)
 355        __u32   index;          /* IRQ index */
 356        __u32   count;          /* Number of IRQs within this index */
 357};
 358#define VFIO_DEVICE_GET_IRQ_INFO        _IO(VFIO_TYPE, VFIO_BASE + 9)
 359
 360/**
 361 * VFIO_DEVICE_SET_IRQS - _IOW(VFIO_TYPE, VFIO_BASE + 10, struct vfio_irq_set)
 362 *
 363 * Set signaling, masking, and unmasking of interrupts.  Caller provides
 364 * struct vfio_irq_set with all fields set.  'start' and 'count' indicate
 365 * the range of subindexes being specified.
 366 *
 367 * The DATA flags specify the type of data provided.  If DATA_NONE, the
 368 * operation performs the specified action immediately on the specified
 369 * interrupt(s).  For example, to unmask AUTOMASKED interrupt [0,0]:
 370 * flags = (DATA_NONE|ACTION_UNMASK), index = 0, start = 0, count = 1.
 371 *
 372 * DATA_BOOL allows sparse support for the same on arrays of interrupts.
 373 * For example, to mask interrupts [0,1] and [0,3] (but not [0,2]):
 374 * flags = (DATA_BOOL|ACTION_MASK), index = 0, start = 1, count = 3,
 375 * data = {1,0,1}
 376 *
 377 * DATA_EVENTFD binds the specified ACTION to the provided __s32 eventfd.
 378 * A value of -1 can be used to either de-assign interrupts if already
 379 * assigned or skip un-assigned interrupts.  For example, to set an eventfd
 380 * to be trigger for interrupts [0,0] and [0,2]:
 381 * flags = (DATA_EVENTFD|ACTION_TRIGGER), index = 0, start = 0, count = 3,
 382 * data = {fd1, -1, fd2}
 383 * If index [0,1] is previously set, two count = 1 ioctls calls would be
 384 * required to set [0,0] and [0,2] without changing [0,1].
 385 *
 386 * Once a signaling mechanism is set, DATA_BOOL or DATA_NONE can be used
 387 * with ACTION_TRIGGER to perform kernel level interrupt loopback testing
 388 * from userspace (ie. simulate hardware triggering).
 389 *
 390 * Setting of an event triggering mechanism to userspace for ACTION_TRIGGER
 391 * enables the interrupt index for the device.  Individual subindex interrupts
 392 * can be disabled using the -1 value for DATA_EVENTFD or the index can be
 393 * disabled as a whole with: flags = (DATA_NONE|ACTION_TRIGGER), count = 0.
 394 *
 395 * Note that ACTION_[UN]MASK specify user->kernel signaling (irqfds) while
 396 * ACTION_TRIGGER specifies kernel->user signaling.
 397 */
 398struct vfio_irq_set {
 399        __u32   argsz;
 400        __u32   flags;
 401#define VFIO_IRQ_SET_DATA_NONE          (1 << 0) /* Data not present */
 402#define VFIO_IRQ_SET_DATA_BOOL          (1 << 1) /* Data is bool (u8) */
 403#define VFIO_IRQ_SET_DATA_EVENTFD       (1 << 2) /* Data is eventfd (s32) */
 404#define VFIO_IRQ_SET_ACTION_MASK        (1 << 3) /* Mask interrupt */
 405#define VFIO_IRQ_SET_ACTION_UNMASK      (1 << 4) /* Unmask interrupt */
 406#define VFIO_IRQ_SET_ACTION_TRIGGER     (1 << 5) /* Trigger interrupt */
 407        __u32   index;
 408        __u32   start;
 409        __u32   count;
 410        __u8    data[];
 411};
 412#define VFIO_DEVICE_SET_IRQS            _IO(VFIO_TYPE, VFIO_BASE + 10)
 413
 414#define VFIO_IRQ_SET_DATA_TYPE_MASK     (VFIO_IRQ_SET_DATA_NONE | \
 415                                         VFIO_IRQ_SET_DATA_BOOL | \
 416                                         VFIO_IRQ_SET_DATA_EVENTFD)
 417#define VFIO_IRQ_SET_ACTION_TYPE_MASK   (VFIO_IRQ_SET_ACTION_MASK | \
 418                                         VFIO_IRQ_SET_ACTION_UNMASK | \
 419                                         VFIO_IRQ_SET_ACTION_TRIGGER)
 420/**
 421 * VFIO_DEVICE_RESET - _IO(VFIO_TYPE, VFIO_BASE + 11)
 422 *
 423 * Reset a device.
 424 */
 425#define VFIO_DEVICE_RESET               _IO(VFIO_TYPE, VFIO_BASE + 11)
 426
 427/*
 428 * The VFIO-PCI bus driver makes use of the following fixed region and
 429 * IRQ index mapping.  Unimplemented regions return a size of zero.
 430 * Unimplemented IRQ types return a count of zero.
 431 */
 432
 433enum {
 434        VFIO_PCI_BAR0_REGION_INDEX,
 435        VFIO_PCI_BAR1_REGION_INDEX,
 436        VFIO_PCI_BAR2_REGION_INDEX,
 437        VFIO_PCI_BAR3_REGION_INDEX,
 438        VFIO_PCI_BAR4_REGION_INDEX,
 439        VFIO_PCI_BAR5_REGION_INDEX,
 440        VFIO_PCI_ROM_REGION_INDEX,
 441        VFIO_PCI_CONFIG_REGION_INDEX,
 442        /*
 443         * Expose VGA regions defined for PCI base class 03, subclass 00.
 444         * This includes I/O port ranges 0x3b0 to 0x3bb and 0x3c0 to 0x3df
 445         * as well as the MMIO range 0xa0000 to 0xbffff.  Each implemented
 446         * range is found at it's identity mapped offset from the region
 447         * offset, for example 0x3b0 is region_info.offset + 0x3b0.  Areas
 448         * between described ranges are unimplemented.
 449         */
 450        VFIO_PCI_VGA_REGION_INDEX,
 451        VFIO_PCI_NUM_REGIONS = 9 /* Fixed user ABI, region indexes >=9 use */
 452                                 /* device specific cap to define content. */
 453};
 454
 455enum {
 456        VFIO_PCI_INTX_IRQ_INDEX,
 457        VFIO_PCI_MSI_IRQ_INDEX,
 458        VFIO_PCI_MSIX_IRQ_INDEX,
 459        VFIO_PCI_ERR_IRQ_INDEX,
 460        VFIO_PCI_REQ_IRQ_INDEX,
 461        VFIO_PCI_NUM_IRQS
 462};
 463
 464/*
 465 * The vfio-ccw bus driver makes use of the following fixed region and
 466 * IRQ index mapping. Unimplemented regions return a size of zero.
 467 * Unimplemented IRQ types return a count of zero.
 468 */
 469
 470enum {
 471        VFIO_CCW_CONFIG_REGION_INDEX,
 472        VFIO_CCW_NUM_REGIONS
 473};
 474
 475enum {
 476        VFIO_CCW_IO_IRQ_INDEX,
 477        VFIO_CCW_NUM_IRQS
 478};
 479
 480/**
 481 * VFIO_DEVICE_GET_PCI_HOT_RESET_INFO - _IORW(VFIO_TYPE, VFIO_BASE + 12,
 482 *                                            struct vfio_pci_hot_reset_info)
 483 *
 484 * Return: 0 on success, -errno on failure:
 485 *      -enospc = insufficient buffer, -enodev = unsupported for device.
 486 */
 487struct vfio_pci_dependent_device {
 488        __u32   group_id;
 489        __u16   segment;
 490        __u8    bus;
 491        __u8    devfn; /* Use PCI_SLOT/PCI_FUNC */
 492};
 493
 494struct vfio_pci_hot_reset_info {
 495        __u32   argsz;
 496        __u32   flags;
 497        __u32   count;
 498        struct vfio_pci_dependent_device        devices[];
 499};
 500
 501#define VFIO_DEVICE_GET_PCI_HOT_RESET_INFO      _IO(VFIO_TYPE, VFIO_BASE + 12)
 502
 503/**
 504 * VFIO_DEVICE_PCI_HOT_RESET - _IOW(VFIO_TYPE, VFIO_BASE + 13,
 505 *                                  struct vfio_pci_hot_reset)
 506 *
 507 * Return: 0 on success, -errno on failure.
 508 */
 509struct vfio_pci_hot_reset {
 510        __u32   argsz;
 511        __u32   flags;
 512        __u32   count;
 513        __s32   group_fds[];
 514};
 515
 516#define VFIO_DEVICE_PCI_HOT_RESET       _IO(VFIO_TYPE, VFIO_BASE + 13)
 517
 518/**
 519 * VFIO_DEVICE_QUERY_GFX_PLANE - _IOW(VFIO_TYPE, VFIO_BASE + 14,
 520 *                                    struct vfio_device_query_gfx_plane)
 521 *
 522 * Set the drm_plane_type and flags, then retrieve the gfx plane info.
 523 *
 524 * flags supported:
 525 * - VFIO_GFX_PLANE_TYPE_PROBE and VFIO_GFX_PLANE_TYPE_DMABUF are set
 526 *   to ask if the mdev supports dma-buf. 0 on support, -EINVAL on no
 527 *   support for dma-buf.
 528 * - VFIO_GFX_PLANE_TYPE_PROBE and VFIO_GFX_PLANE_TYPE_REGION are set
 529 *   to ask if the mdev supports region. 0 on support, -EINVAL on no
 530 *   support for region.
 531 * - VFIO_GFX_PLANE_TYPE_DMABUF or VFIO_GFX_PLANE_TYPE_REGION is set
 532 *   with each call to query the plane info.
 533 * - Others are invalid and return -EINVAL.
 534 *
 535 * Note:
 536 * 1. Plane could be disabled by guest. In that case, success will be
 537 *    returned with zero-initialized drm_format, size, width and height
 538 *    fields.
 539 * 2. x_hot/y_hot is set to 0xFFFFFFFF if no hotspot information available
 540 *
 541 * Return: 0 on success, -errno on other failure.
 542 */
 543struct vfio_device_gfx_plane_info {
 544        __u32 argsz;
 545        __u32 flags;
 546#define VFIO_GFX_PLANE_TYPE_PROBE (1 << 0)
 547#define VFIO_GFX_PLANE_TYPE_DMABUF (1 << 1)
 548#define VFIO_GFX_PLANE_TYPE_REGION (1 << 2)
 549        /* in */
 550        __u32 drm_plane_type;   /* type of plane: DRM_PLANE_TYPE_* */
 551        /* out */
 552        __u32 drm_format;       /* drm format of plane */
 553        __u64 drm_format_mod;   /* tiled mode */
 554        __u32 width;    /* width of plane */
 555        __u32 height;   /* height of plane */
 556        __u32 stride;   /* stride of plane */
 557        __u32 size;     /* size of plane in bytes, align on page*/
 558        __u32 x_pos;    /* horizontal position of cursor plane */
 559        __u32 y_pos;    /* vertical position of cursor plane*/
 560        __u32 x_hot;    /* horizontal position of cursor hotspot */
 561        __u32 y_hot;    /* vertical position of cursor hotspot */
 562        union {
 563                __u32 region_index;     /* region index */
 564                __u32 dmabuf_id;        /* dma-buf id */
 565        };
 566};
 567
 568#define VFIO_DEVICE_QUERY_GFX_PLANE _IO(VFIO_TYPE, VFIO_BASE + 14)
 569
 570/**
 571 * VFIO_DEVICE_GET_GFX_DMABUF - _IOW(VFIO_TYPE, VFIO_BASE + 15, __u32)
 572 *
 573 * Return a new dma-buf file descriptor for an exposed guest framebuffer
 574 * described by the provided dmabuf_id. The dmabuf_id is returned from VFIO_
 575 * DEVICE_QUERY_GFX_PLANE as a token of the exposed guest framebuffer.
 576 */
 577
 578#define VFIO_DEVICE_GET_GFX_DMABUF _IO(VFIO_TYPE, VFIO_BASE + 15)
 579
 580/**
 581 * VFIO_DEVICE_IOEVENTFD - _IOW(VFIO_TYPE, VFIO_BASE + 16,
 582 *                              struct vfio_device_ioeventfd)
 583 *
 584 * Perform a write to the device at the specified device fd offset, with
 585 * the specified data and width when the provided eventfd is triggered.
 586 * vfio bus drivers may not support this for all regions, for all widths,
 587 * or at all.  vfio-pci currently only enables support for BAR regions,
 588 * excluding the MSI-X vector table.
 589 *
 590 * Return: 0 on success, -errno on failure.
 591 */
 592struct vfio_device_ioeventfd {
 593        __u32   argsz;
 594        __u32   flags;
 595#define VFIO_DEVICE_IOEVENTFD_8         (1 << 0) /* 1-byte write */
 596#define VFIO_DEVICE_IOEVENTFD_16        (1 << 1) /* 2-byte write */
 597#define VFIO_DEVICE_IOEVENTFD_32        (1 << 2) /* 4-byte write */
 598#define VFIO_DEVICE_IOEVENTFD_64        (1 << 3) /* 8-byte write */
 599#define VFIO_DEVICE_IOEVENTFD_SIZE_MASK (0xf)
 600        __u64   offset;                 /* device fd offset of write */
 601        __u64   data;                   /* data to be written */
 602        __s32   fd;                     /* -1 for de-assignment */
 603};
 604
 605#define VFIO_DEVICE_IOEVENTFD           _IO(VFIO_TYPE, VFIO_BASE + 16)
 606
 607/* -------- API for Type1 VFIO IOMMU -------- */
 608
 609/**
 610 * VFIO_IOMMU_GET_INFO - _IOR(VFIO_TYPE, VFIO_BASE + 12, struct vfio_iommu_info)
 611 *
 612 * Retrieve information about the IOMMU object. Fills in provided
 613 * struct vfio_iommu_info. Caller sets argsz.
 614 *
 615 * XXX Should we do these by CHECK_EXTENSION too?
 616 */
 617struct vfio_iommu_type1_info {
 618        __u32   argsz;
 619        __u32   flags;
 620#define VFIO_IOMMU_INFO_PGSIZES (1 << 0)        /* supported page sizes info */
 621        __u64   iova_pgsizes;           /* Bitmap of supported page sizes */
 622};
 623
 624#define VFIO_IOMMU_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
 625
 626/**
 627 * VFIO_IOMMU_MAP_DMA - _IOW(VFIO_TYPE, VFIO_BASE + 13, struct vfio_dma_map)
 628 *
 629 * Map process virtual addresses to IO virtual addresses using the
 630 * provided struct vfio_dma_map. Caller sets argsz. READ &/ WRITE required.
 631 */
 632struct vfio_iommu_type1_dma_map {
 633        __u32   argsz;
 634        __u32   flags;
 635#define VFIO_DMA_MAP_FLAG_READ (1 << 0)         /* readable from device */
 636#define VFIO_DMA_MAP_FLAG_WRITE (1 << 1)        /* writable from device */
 637        __u64   vaddr;                          /* Process virtual address */
 638        __u64   iova;                           /* IO virtual address */
 639        __u64   size;                           /* Size of mapping (bytes) */
 640};
 641
 642#define VFIO_IOMMU_MAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 13)
 643
 644/**
 645 * VFIO_IOMMU_UNMAP_DMA - _IOWR(VFIO_TYPE, VFIO_BASE + 14,
 646 *                                                      struct vfio_dma_unmap)
 647 *
 648 * Unmap IO virtual addresses using the provided struct vfio_dma_unmap.
 649 * Caller sets argsz.  The actual unmapped size is returned in the size
 650 * field.  No guarantee is made to the user that arbitrary unmaps of iova
 651 * or size different from those used in the original mapping call will
 652 * succeed.
 653 */
 654struct vfio_iommu_type1_dma_unmap {
 655        __u32   argsz;
 656        __u32   flags;
 657        __u64   iova;                           /* IO virtual address */
 658        __u64   size;                           /* Size of mapping (bytes) */
 659};
 660
 661#define VFIO_IOMMU_UNMAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 14)
 662
 663/*
 664 * IOCTLs to enable/disable IOMMU container usage.
 665 * No parameters are supported.
 666 */
 667#define VFIO_IOMMU_ENABLE       _IO(VFIO_TYPE, VFIO_BASE + 15)
 668#define VFIO_IOMMU_DISABLE      _IO(VFIO_TYPE, VFIO_BASE + 16)
 669
 670/* -------- Additional API for SPAPR TCE (Server POWERPC) IOMMU -------- */
 671
 672/*
 673 * The SPAPR TCE DDW info struct provides the information about
 674 * the details of Dynamic DMA window capability.
 675 *
 676 * @pgsizes contains a page size bitmask, 4K/64K/16M are supported.
 677 * @max_dynamic_windows_supported tells the maximum number of windows
 678 * which the platform can create.
 679 * @levels tells the maximum number of levels in multi-level IOMMU tables;
 680 * this allows splitting a table into smaller chunks which reduces
 681 * the amount of physically contiguous memory required for the table.
 682 */
 683struct vfio_iommu_spapr_tce_ddw_info {
 684        __u64 pgsizes;                  /* Bitmap of supported page sizes */
 685        __u32 max_dynamic_windows_supported;
 686        __u32 levels;
 687};
 688
 689/*
 690 * The SPAPR TCE info struct provides the information about the PCI bus
 691 * address ranges available for DMA, these values are programmed into
 692 * the hardware so the guest has to know that information.
 693 *
 694 * The DMA 32 bit window start is an absolute PCI bus address.
 695 * The IOVA address passed via map/unmap ioctls are absolute PCI bus
 696 * addresses too so the window works as a filter rather than an offset
 697 * for IOVA addresses.
 698 *
 699 * Flags supported:
 700 * - VFIO_IOMMU_SPAPR_INFO_DDW: informs the userspace that dynamic DMA windows
 701 *   (DDW) support is present. @ddw is only supported when DDW is present.
 702 */
 703struct vfio_iommu_spapr_tce_info {
 704        __u32 argsz;
 705        __u32 flags;
 706#define VFIO_IOMMU_SPAPR_INFO_DDW       (1 << 0)        /* DDW supported */
 707        __u32 dma32_window_start;       /* 32 bit window start (bytes) */
 708        __u32 dma32_window_size;        /* 32 bit window size (bytes) */
 709        struct vfio_iommu_spapr_tce_ddw_info ddw;
 710};
 711
 712#define VFIO_IOMMU_SPAPR_TCE_GET_INFO   _IO(VFIO_TYPE, VFIO_BASE + 12)
 713
 714/*
 715 * EEH PE operation struct provides ways to:
 716 * - enable/disable EEH functionality;
 717 * - unfreeze IO/DMA for frozen PE;
 718 * - read PE state;
 719 * - reset PE;
 720 * - configure PE;
 721 * - inject EEH error.
 722 */
 723struct vfio_eeh_pe_err {
 724        __u32 type;
 725        __u32 func;
 726        __u64 addr;
 727        __u64 mask;
 728};
 729
 730struct vfio_eeh_pe_op {
 731        __u32 argsz;
 732        __u32 flags;
 733        __u32 op;
 734        union {
 735                struct vfio_eeh_pe_err err;
 736        };
 737};
 738
 739#define VFIO_EEH_PE_DISABLE             0       /* Disable EEH functionality */
 740#define VFIO_EEH_PE_ENABLE              1       /* Enable EEH functionality  */
 741#define VFIO_EEH_PE_UNFREEZE_IO         2       /* Enable IO for frozen PE   */
 742#define VFIO_EEH_PE_UNFREEZE_DMA        3       /* Enable DMA for frozen PE  */
 743#define VFIO_EEH_PE_GET_STATE           4       /* PE state retrieval        */
 744#define  VFIO_EEH_PE_STATE_NORMAL       0       /* PE in functional state    */
 745#define  VFIO_EEH_PE_STATE_RESET        1       /* PE reset in progress      */
 746#define  VFIO_EEH_PE_STATE_STOPPED      2       /* Stopped DMA and IO        */
 747#define  VFIO_EEH_PE_STATE_STOPPED_DMA  4       /* Stopped DMA only          */
 748#define  VFIO_EEH_PE_STATE_UNAVAIL      5       /* State unavailable         */
 749#define VFIO_EEH_PE_RESET_DEACTIVATE    5       /* Deassert PE reset         */
 750#define VFIO_EEH_PE_RESET_HOT           6       /* Assert hot reset          */
 751#define VFIO_EEH_PE_RESET_FUNDAMENTAL   7       /* Assert fundamental reset  */
 752#define VFIO_EEH_PE_CONFIGURE           8       /* PE configuration          */
 753#define VFIO_EEH_PE_INJECT_ERR          9       /* Inject EEH error          */
 754
 755#define VFIO_EEH_PE_OP                  _IO(VFIO_TYPE, VFIO_BASE + 21)
 756
 757/**
 758 * VFIO_IOMMU_SPAPR_REGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 17, struct vfio_iommu_spapr_register_memory)
 759 *
 760 * Registers user space memory where DMA is allowed. It pins
 761 * user pages and does the locked memory accounting so
 762 * subsequent VFIO_IOMMU_MAP_DMA/VFIO_IOMMU_UNMAP_DMA calls
 763 * get faster.
 764 */
 765struct vfio_iommu_spapr_register_memory {
 766        __u32   argsz;
 767        __u32   flags;
 768        __u64   vaddr;                          /* Process virtual address */
 769        __u64   size;                           /* Size of mapping (bytes) */
 770};
 771#define VFIO_IOMMU_SPAPR_REGISTER_MEMORY        _IO(VFIO_TYPE, VFIO_BASE + 17)
 772
 773/**
 774 * VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 18, struct vfio_iommu_spapr_register_memory)
 775 *
 776 * Unregisters user space memory registered with
 777 * VFIO_IOMMU_SPAPR_REGISTER_MEMORY.
 778 * Uses vfio_iommu_spapr_register_memory for parameters.
 779 */
 780#define VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY      _IO(VFIO_TYPE, VFIO_BASE + 18)
 781
 782/**
 783 * VFIO_IOMMU_SPAPR_TCE_CREATE - _IOWR(VFIO_TYPE, VFIO_BASE + 19, struct vfio_iommu_spapr_tce_create)
 784 *
 785 * Creates an additional TCE table and programs it (sets a new DMA window)
 786 * to every IOMMU group in the container. It receives page shift, window
 787 * size and number of levels in the TCE table being created.
 788 *
 789 * It allocates and returns an offset on a PCI bus of the new DMA window.
 790 */
 791struct vfio_iommu_spapr_tce_create {
 792        __u32 argsz;
 793        __u32 flags;
 794        /* in */
 795        __u32 page_shift;
 796        __u32 __resv1;
 797        __u64 window_size;
 798        __u32 levels;
 799        __u32 __resv2;
 800        /* out */
 801        __u64 start_addr;
 802};
 803#define VFIO_IOMMU_SPAPR_TCE_CREATE     _IO(VFIO_TYPE, VFIO_BASE + 19)
 804
 805/**
 806 * VFIO_IOMMU_SPAPR_TCE_REMOVE - _IOW(VFIO_TYPE, VFIO_BASE + 20, struct vfio_iommu_spapr_tce_remove)
 807 *
 808 * Unprograms a TCE table from all groups in the container and destroys it.
 809 * It receives a PCI bus offset as a window id.
 810 */
 811struct vfio_iommu_spapr_tce_remove {
 812        __u32 argsz;
 813        __u32 flags;
 814        /* in */
 815        __u64 start_addr;
 816};
 817#define VFIO_IOMMU_SPAPR_TCE_REMOVE     _IO(VFIO_TYPE, VFIO_BASE + 20)
 818
 819/* ***************************************************************** */
 820
 821#endif /* VFIO_H */
 822