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20#include "qemu/osdep.h"
21#include "qemu-common.h"
22#include "cpu.h"
23#include "hw/hw.h"
24#include "hw/boards.h"
25#include "migration/cpu.h"
26
27static const VMStateDescription vmstate_tlb_entry = {
28 .name = "tlb_entry",
29 .version_id = 1,
30 .minimum_version_id = 1,
31 .minimum_version_id_old = 1,
32 .fields = (VMStateField[]) {
33 VMSTATE_UINTTL(mr, OpenRISCTLBEntry),
34 VMSTATE_UINTTL(tr, OpenRISCTLBEntry),
35 VMSTATE_END_OF_LIST()
36 }
37};
38
39static const VMStateDescription vmstate_cpu_tlb = {
40 .name = "cpu_tlb",
41 .version_id = 2,
42 .minimum_version_id = 2,
43 .fields = (VMStateField[]) {
44 VMSTATE_STRUCT_ARRAY(itlb, CPUOpenRISCTLBContext, TLB_SIZE, 0,
45 vmstate_tlb_entry, OpenRISCTLBEntry),
46 VMSTATE_STRUCT_ARRAY(dtlb, CPUOpenRISCTLBContext, TLB_SIZE, 0,
47 vmstate_tlb_entry, OpenRISCTLBEntry),
48 VMSTATE_END_OF_LIST()
49 }
50};
51
52static int get_sr(QEMUFile *f, void *opaque, size_t size,
53 const VMStateField *field)
54{
55 CPUOpenRISCState *env = opaque;
56 cpu_set_sr(env, qemu_get_be32(f));
57 return 0;
58}
59
60static int put_sr(QEMUFile *f, void *opaque, size_t size,
61 const VMStateField *field, QJSON *vmdesc)
62{
63 CPUOpenRISCState *env = opaque;
64 qemu_put_be32(f, cpu_get_sr(env));
65 return 0;
66}
67
68static const VMStateInfo vmstate_sr = {
69 .name = "sr",
70 .get = get_sr,
71 .put = put_sr,
72};
73
74static const VMStateDescription vmstate_env = {
75 .name = "env",
76 .version_id = 6,
77 .minimum_version_id = 6,
78 .fields = (VMStateField[]) {
79 VMSTATE_UINTTL_2DARRAY(shadow_gpr, CPUOpenRISCState, 16, 32),
80 VMSTATE_UINTTL(pc, CPUOpenRISCState),
81 VMSTATE_UINTTL(ppc, CPUOpenRISCState),
82 VMSTATE_UINTTL(jmp_pc, CPUOpenRISCState),
83 VMSTATE_UINTTL(lock_addr, CPUOpenRISCState),
84 VMSTATE_UINTTL(lock_value, CPUOpenRISCState),
85 VMSTATE_UINTTL(epcr, CPUOpenRISCState),
86 VMSTATE_UINTTL(eear, CPUOpenRISCState),
87
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93
94 {
95 .name = "sr",
96 .version_id = 0,
97 .size = sizeof(uint32_t),
98 .info = &vmstate_sr,
99 .flags = VMS_SINGLE,
100 .offset = 0
101 },
102
103 VMSTATE_UINT32(vr, CPUOpenRISCState),
104 VMSTATE_UINT32(upr, CPUOpenRISCState),
105 VMSTATE_UINT32(cpucfgr, CPUOpenRISCState),
106 VMSTATE_UINT32(dmmucfgr, CPUOpenRISCState),
107 VMSTATE_UINT32(immucfgr, CPUOpenRISCState),
108 VMSTATE_UINT32(evbar, CPUOpenRISCState),
109 VMSTATE_UINT32(pmr, CPUOpenRISCState),
110 VMSTATE_UINT32(esr, CPUOpenRISCState),
111 VMSTATE_UINT32(fpcsr, CPUOpenRISCState),
112 VMSTATE_UINT64(mac, CPUOpenRISCState),
113
114 VMSTATE_STRUCT(tlb, CPUOpenRISCState, 1,
115 vmstate_cpu_tlb, CPUOpenRISCTLBContext),
116
117 VMSTATE_TIMER_PTR(timer, CPUOpenRISCState),
118 VMSTATE_UINT32(ttmr, CPUOpenRISCState),
119
120 VMSTATE_UINT32(picmr, CPUOpenRISCState),
121 VMSTATE_UINT32(picsr, CPUOpenRISCState),
122
123 VMSTATE_END_OF_LIST()
124 }
125};
126
127const VMStateDescription vmstate_openrisc_cpu = {
128 .name = "cpu",
129 .version_id = 1,
130 .minimum_version_id = 1,
131 .fields = (VMStateField[]) {
132 VMSTATE_CPU(),
133 VMSTATE_STRUCT(env, OpenRISCCPU, 1, vmstate_env, CPUOpenRISCState),
134 VMSTATE_END_OF_LIST()
135 }
136};
137