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25#ifndef TCG_TCG_OP_H
26#define TCG_TCG_OP_H
27
28#include "tcg.h"
29#include "exec/helper-proto.h"
30#include "exec/helper-gen.h"
31
32
33
34void tcg_gen_op1(TCGOpcode, TCGArg);
35void tcg_gen_op2(TCGOpcode, TCGArg, TCGArg);
36void tcg_gen_op3(TCGOpcode, TCGArg, TCGArg, TCGArg);
37void tcg_gen_op4(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg);
38void tcg_gen_op5(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
39void tcg_gen_op6(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
40
41void vec_gen_2(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg);
42void vec_gen_3(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg);
43void vec_gen_4(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg, TCGArg);
44
45static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1)
46{
47 tcg_gen_op1(opc, tcgv_i32_arg(a1));
48}
49
50static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1)
51{
52 tcg_gen_op1(opc, tcgv_i64_arg(a1));
53}
54
55static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1)
56{
57 tcg_gen_op1(opc, a1);
58}
59
60static inline void tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2)
61{
62 tcg_gen_op2(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2));
63}
64
65static inline void tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2)
66{
67 tcg_gen_op2(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2));
68}
69
70static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2)
71{
72 tcg_gen_op2(opc, tcgv_i32_arg(a1), a2);
73}
74
75static inline void tcg_gen_op2i_i64(TCGOpcode opc, TCGv_i64 a1, TCGArg a2)
76{
77 tcg_gen_op2(opc, tcgv_i64_arg(a1), a2);
78}
79
80static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2)
81{
82 tcg_gen_op2(opc, a1, a2);
83}
84
85static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1,
86 TCGv_i32 a2, TCGv_i32 a3)
87{
88 tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), tcgv_i32_arg(a3));
89}
90
91static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1,
92 TCGv_i64 a2, TCGv_i64 a3)
93{
94 tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), tcgv_i64_arg(a3));
95}
96
97static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1,
98 TCGv_i32 a2, TCGArg a3)
99{
100 tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3);
101}
102
103static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1,
104 TCGv_i64 a2, TCGArg a3)
105{
106 tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3);
107}
108
109static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val,
110 TCGv_ptr base, TCGArg offset)
111{
112 tcg_gen_op3(opc, tcgv_i32_arg(val), tcgv_ptr_arg(base), offset);
113}
114
115static inline void tcg_gen_ldst_op_i64(TCGOpcode opc, TCGv_i64 val,
116 TCGv_ptr base, TCGArg offset)
117{
118 tcg_gen_op3(opc, tcgv_i64_arg(val), tcgv_ptr_arg(base), offset);
119}
120
121static inline void tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
122 TCGv_i32 a3, TCGv_i32 a4)
123{
124 tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
125 tcgv_i32_arg(a3), tcgv_i32_arg(a4));
126}
127
128static inline void tcg_gen_op4_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
129 TCGv_i64 a3, TCGv_i64 a4)
130{
131 tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
132 tcgv_i64_arg(a3), tcgv_i64_arg(a4));
133}
134
135static inline void tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
136 TCGv_i32 a3, TCGArg a4)
137{
138 tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
139 tcgv_i32_arg(a3), a4);
140}
141
142static inline void tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
143 TCGv_i64 a3, TCGArg a4)
144{
145 tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
146 tcgv_i64_arg(a3), a4);
147}
148
149static inline void tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
150 TCGArg a3, TCGArg a4)
151{
152 tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3, a4);
153}
154
155static inline void tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
156 TCGArg a3, TCGArg a4)
157{
158 tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3, a4);
159}
160
161static inline void tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
162 TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5)
163{
164 tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
165 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5));
166}
167
168static inline void tcg_gen_op5_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
169 TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5)
170{
171 tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
172 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5));
173}
174
175static inline void tcg_gen_op5i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
176 TCGv_i32 a3, TCGv_i32 a4, TCGArg a5)
177{
178 tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
179 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5);
180}
181
182static inline void tcg_gen_op5i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
183 TCGv_i64 a3, TCGv_i64 a4, TCGArg a5)
184{
185 tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
186 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5);
187}
188
189static inline void tcg_gen_op5ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
190 TCGv_i32 a3, TCGArg a4, TCGArg a5)
191{
192 tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
193 tcgv_i32_arg(a3), a4, a5);
194}
195
196static inline void tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
197 TCGv_i64 a3, TCGArg a4, TCGArg a5)
198{
199 tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
200 tcgv_i64_arg(a3), a4, a5);
201}
202
203static inline void tcg_gen_op6_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
204 TCGv_i32 a3, TCGv_i32 a4,
205 TCGv_i32 a5, TCGv_i32 a6)
206{
207 tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
208 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5),
209 tcgv_i32_arg(a6));
210}
211
212static inline void tcg_gen_op6_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
213 TCGv_i64 a3, TCGv_i64 a4,
214 TCGv_i64 a5, TCGv_i64 a6)
215{
216 tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
217 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5),
218 tcgv_i64_arg(a6));
219}
220
221static inline void tcg_gen_op6i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
222 TCGv_i32 a3, TCGv_i32 a4,
223 TCGv_i32 a5, TCGArg a6)
224{
225 tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
226 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5), a6);
227}
228
229static inline void tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
230 TCGv_i64 a3, TCGv_i64 a4,
231 TCGv_i64 a5, TCGArg a6)
232{
233 tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
234 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5), a6);
235}
236
237static inline void tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
238 TCGv_i32 a3, TCGv_i32 a4,
239 TCGArg a5, TCGArg a6)
240{
241 tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
242 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5, a6);
243}
244
245static inline void tcg_gen_op6ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
246 TCGv_i64 a3, TCGv_i64 a4,
247 TCGArg a5, TCGArg a6)
248{
249 tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
250 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5, a6);
251}
252
253
254
255
256static inline void gen_set_label(TCGLabel *l)
257{
258 tcg_gen_op1(INDEX_op_set_label, label_arg(l));
259}
260
261static inline void tcg_gen_br(TCGLabel *l)
262{
263 tcg_gen_op1(INDEX_op_br, label_arg(l));
264}
265
266void tcg_gen_mb(TCGBar);
267
268
269
270
271
272void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
273void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2);
274void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
275void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
276void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
277void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
278void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
279void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
280void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
281void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
282void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
283void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
284void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
285void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
286void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
287void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
288void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
289void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
290void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
291void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
292void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
293void tcg_gen_clzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
294void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
295void tcg_gen_clrsb_i32(TCGv_i32 ret, TCGv_i32 arg);
296void tcg_gen_ctpop_i32(TCGv_i32 a1, TCGv_i32 a2);
297void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
298void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
299void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
300void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
301void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2,
302 unsigned int ofs, unsigned int len);
303void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg,
304 unsigned int ofs, unsigned int len);
305void tcg_gen_extract_i32(TCGv_i32 ret, TCGv_i32 arg,
306 unsigned int ofs, unsigned int len);
307void tcg_gen_sextract_i32(TCGv_i32 ret, TCGv_i32 arg,
308 unsigned int ofs, unsigned int len);
309void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *);
310void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *);
311void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret,
312 TCGv_i32 arg1, TCGv_i32 arg2);
313void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret,
314 TCGv_i32 arg1, int32_t arg2);
315void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1,
316 TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2);
317void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
318 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
319void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
320 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
321void tcg_gen_mulu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
322void tcg_gen_muls2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
323void tcg_gen_mulsu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
324void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg);
325void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg);
326void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg);
327void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg);
328void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg);
329void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg);
330void tcg_gen_smin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
331void tcg_gen_smax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
332void tcg_gen_umin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
333void tcg_gen_umax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
334
335static inline void tcg_gen_discard_i32(TCGv_i32 arg)
336{
337 tcg_gen_op1_i32(INDEX_op_discard, arg);
338}
339
340static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
341{
342 if (ret != arg) {
343 tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
344 }
345}
346
347static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
348{
349 tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg);
350}
351
352static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2,
353 tcg_target_long offset)
354{
355 tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
356}
357
358static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2,
359 tcg_target_long offset)
360{
361 tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
362}
363
364static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2,
365 tcg_target_long offset)
366{
367 tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
368}
369
370static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2,
371 tcg_target_long offset)
372{
373 tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
374}
375
376static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2,
377 tcg_target_long offset)
378{
379 tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
380}
381
382static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2,
383 tcg_target_long offset)
384{
385 tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
386}
387
388static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2,
389 tcg_target_long offset)
390{
391 tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
392}
393
394static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2,
395 tcg_target_long offset)
396{
397 tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
398}
399
400static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
401{
402 tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
403}
404
405static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
406{
407 tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
408}
409
410static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
411{
412 tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
413}
414
415static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
416{
417 tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
418}
419
420static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
421{
422 tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
423}
424
425static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
426{
427 tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
428}
429
430static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
431{
432 tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
433}
434
435static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
436{
437 tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
438}
439
440static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
441{
442 tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
443}
444
445static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
446{
447 if (TCG_TARGET_HAS_neg_i32) {
448 tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
449 } else {
450 tcg_gen_subfi_i32(ret, 0, arg);
451 }
452}
453
454static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
455{
456 if (TCG_TARGET_HAS_not_i32) {
457 tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg);
458 } else {
459 tcg_gen_xori_i32(ret, arg, -1);
460 }
461}
462
463
464
465void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
466void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2);
467void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
468void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
469void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
470void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
471void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
472void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
473void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
474void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
475void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
476void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
477void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
478void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
479void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
480void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
481void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
482void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
483void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
484void tcg_gen_clz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
485void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
486void tcg_gen_clzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
487void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
488void tcg_gen_clrsb_i64(TCGv_i64 ret, TCGv_i64 arg);
489void tcg_gen_ctpop_i64(TCGv_i64 a1, TCGv_i64 a2);
490void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
491void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
492void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
493void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
494void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2,
495 unsigned int ofs, unsigned int len);
496void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 arg,
497 unsigned int ofs, unsigned int len);
498void tcg_gen_extract_i64(TCGv_i64 ret, TCGv_i64 arg,
499 unsigned int ofs, unsigned int len);
500void tcg_gen_sextract_i64(TCGv_i64 ret, TCGv_i64 arg,
501 unsigned int ofs, unsigned int len);
502void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *);
503void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *);
504void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
505 TCGv_i64 arg1, TCGv_i64 arg2);
506void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
507 TCGv_i64 arg1, int64_t arg2);
508void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1,
509 TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2);
510void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
511 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
512void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
513 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
514void tcg_gen_mulu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
515void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
516void tcg_gen_mulsu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
517void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg);
518void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg);
519void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg);
520void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg);
521void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg);
522void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg);
523void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg);
524void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg);
525void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg);
526void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg);
527void tcg_gen_smin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
528void tcg_gen_smax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
529void tcg_gen_umin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
530void tcg_gen_umax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
531
532#if TCG_TARGET_REG_BITS == 64
533static inline void tcg_gen_discard_i64(TCGv_i64 arg)
534{
535 tcg_gen_op1_i64(INDEX_op_discard, arg);
536}
537
538static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
539{
540 if (ret != arg) {
541 tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
542 }
543}
544
545static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
546{
547 tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg);
548}
549
550static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
551 tcg_target_long offset)
552{
553 tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
554}
555
556static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
557 tcg_target_long offset)
558{
559 tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
560}
561
562static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
563 tcg_target_long offset)
564{
565 tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
566}
567
568static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
569 tcg_target_long offset)
570{
571 tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
572}
573
574static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
575 tcg_target_long offset)
576{
577 tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
578}
579
580static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
581 tcg_target_long offset)
582{
583 tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
584}
585
586static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
587 tcg_target_long offset)
588{
589 tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
590}
591
592static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
593 tcg_target_long offset)
594{
595 tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
596}
597
598static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
599 tcg_target_long offset)
600{
601 tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
602}
603
604static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
605 tcg_target_long offset)
606{
607 tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
608}
609
610static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
611 tcg_target_long offset)
612{
613 tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
614}
615
616static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
617{
618 tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
619}
620
621static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
622{
623 tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
624}
625
626static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
627{
628 tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
629}
630
631static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
632{
633 tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
634}
635
636static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
637{
638 tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
639}
640
641static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
642{
643 tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
644}
645
646static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
647{
648 tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
649}
650
651static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
652{
653 tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
654}
655
656static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
657{
658 tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
659}
660#else
661static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
662 tcg_target_long offset)
663{
664 tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
665}
666
667static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
668 tcg_target_long offset)
669{
670 tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
671}
672
673static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
674 tcg_target_long offset)
675{
676 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
677}
678
679static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
680{
681 tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
682 TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
683}
684
685static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
686{
687 tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
688 TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
689}
690
691void tcg_gen_discard_i64(TCGv_i64 arg);
692void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg);
693void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg);
694void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
695void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
696void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
697void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
698void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
699void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
700void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
701void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
702void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
703void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
704void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
705void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
706void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
707void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
708void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
709#endif
710
711static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
712{
713 if (TCG_TARGET_HAS_neg_i64) {
714 tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
715 } else {
716 tcg_gen_subfi_i64(ret, 0, arg);
717 }
718}
719
720
721
722void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
723void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
724void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high);
725void tcg_gen_extrl_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
726void tcg_gen_extrh_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
727void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
728void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg);
729
730static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
731{
732 tcg_gen_deposit_i64(ret, lo, hi, 32, 32);
733}
734
735
736
737#ifndef TARGET_LONG_BITS
738#error must include QEMU headers
739#endif
740
741#if TARGET_INSN_START_WORDS == 1
742# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
743static inline void tcg_gen_insn_start(target_ulong pc)
744{
745 tcg_gen_op1(INDEX_op_insn_start, pc);
746}
747# else
748static inline void tcg_gen_insn_start(target_ulong pc)
749{
750 tcg_gen_op2(INDEX_op_insn_start, (uint32_t)pc, (uint32_t)(pc >> 32));
751}
752# endif
753#elif TARGET_INSN_START_WORDS == 2
754# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
755static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
756{
757 tcg_gen_op2(INDEX_op_insn_start, pc, a1);
758}
759# else
760static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
761{
762 tcg_gen_op4(INDEX_op_insn_start,
763 (uint32_t)pc, (uint32_t)(pc >> 32),
764 (uint32_t)a1, (uint32_t)(a1 >> 32));
765}
766# endif
767#elif TARGET_INSN_START_WORDS == 3
768# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
769static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
770 target_ulong a2)
771{
772 tcg_gen_op3(INDEX_op_insn_start, pc, a1, a2);
773}
774# else
775static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
776 target_ulong a2)
777{
778 tcg_gen_op6(INDEX_op_insn_start,
779 (uint32_t)pc, (uint32_t)(pc >> 32),
780 (uint32_t)a1, (uint32_t)(a1 >> 32),
781 (uint32_t)a2, (uint32_t)(a2 >> 32));
782}
783# endif
784#else
785# error "Unhandled number of operands to insn_start"
786#endif
787
788
789
790
791
792
793
794
795
796
797
798
799
800void tcg_gen_exit_tb(TranslationBlock *tb, unsigned idx);
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815void tcg_gen_goto_tb(unsigned idx);
816
817
818
819
820
821
822
823
824
825
826void tcg_gen_lookup_and_goto_ptr(void);
827
828#if TARGET_LONG_BITS == 32
829#define tcg_temp_new() tcg_temp_new_i32()
830#define tcg_global_reg_new tcg_global_reg_new_i32
831#define tcg_global_mem_new tcg_global_mem_new_i32
832#define tcg_temp_local_new() tcg_temp_local_new_i32()
833#define tcg_temp_free tcg_temp_free_i32
834#define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i32
835#define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i32
836#else
837#define tcg_temp_new() tcg_temp_new_i64()
838#define tcg_global_reg_new tcg_global_reg_new_i64
839#define tcg_global_mem_new tcg_global_mem_new_i64
840#define tcg_temp_local_new() tcg_temp_local_new_i64()
841#define tcg_temp_free tcg_temp_free_i64
842#define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i64
843#define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i64
844#endif
845
846void tcg_gen_qemu_ld_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
847void tcg_gen_qemu_st_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
848void tcg_gen_qemu_ld_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
849void tcg_gen_qemu_st_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
850
851static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
852{
853 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_UB);
854}
855
856static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
857{
858 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_SB);
859}
860
861static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
862{
863 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUW);
864}
865
866static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
867{
868 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESW);
869}
870
871static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
872{
873 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUL);
874}
875
876static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
877{
878 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESL);
879}
880
881static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
882{
883 tcg_gen_qemu_ld_i64(ret, addr, mem_index, MO_TEQ);
884}
885
886static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
887{
888 tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_UB);
889}
890
891static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
892{
893 tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUW);
894}
895
896static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
897{
898 tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUL);
899}
900
901static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
902{
903 tcg_gen_qemu_st_i64(arg, addr, mem_index, MO_TEQ);
904}
905
906void tcg_gen_atomic_cmpxchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGv_i32,
907 TCGArg, TCGMemOp);
908void tcg_gen_atomic_cmpxchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGv_i64,
909 TCGArg, TCGMemOp);
910
911void tcg_gen_atomic_xchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
912void tcg_gen_atomic_xchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
913
914void tcg_gen_atomic_fetch_add_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
915void tcg_gen_atomic_fetch_add_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
916void tcg_gen_atomic_fetch_and_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
917void tcg_gen_atomic_fetch_and_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
918void tcg_gen_atomic_fetch_or_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
919void tcg_gen_atomic_fetch_or_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
920void tcg_gen_atomic_fetch_xor_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
921void tcg_gen_atomic_fetch_xor_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
922void tcg_gen_atomic_fetch_smin_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
923void tcg_gen_atomic_fetch_smin_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
924void tcg_gen_atomic_fetch_umin_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
925void tcg_gen_atomic_fetch_umin_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
926void tcg_gen_atomic_fetch_smax_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
927void tcg_gen_atomic_fetch_smax_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
928void tcg_gen_atomic_fetch_umax_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
929void tcg_gen_atomic_fetch_umax_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
930
931void tcg_gen_atomic_add_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
932void tcg_gen_atomic_add_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
933void tcg_gen_atomic_and_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
934void tcg_gen_atomic_and_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
935void tcg_gen_atomic_or_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
936void tcg_gen_atomic_or_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
937void tcg_gen_atomic_xor_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
938void tcg_gen_atomic_xor_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
939void tcg_gen_atomic_smin_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
940void tcg_gen_atomic_smin_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
941void tcg_gen_atomic_umin_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
942void tcg_gen_atomic_umin_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
943void tcg_gen_atomic_smax_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
944void tcg_gen_atomic_smax_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
945void tcg_gen_atomic_umax_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
946void tcg_gen_atomic_umax_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
947
948void tcg_gen_mov_vec(TCGv_vec, TCGv_vec);
949void tcg_gen_dup_i32_vec(unsigned vece, TCGv_vec, TCGv_i32);
950void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec, TCGv_i64);
951void tcg_gen_dup8i_vec(TCGv_vec, uint32_t);
952void tcg_gen_dup16i_vec(TCGv_vec, uint32_t);
953void tcg_gen_dup32i_vec(TCGv_vec, uint32_t);
954void tcg_gen_dup64i_vec(TCGv_vec, uint64_t);
955void tcg_gen_dupi_vec(unsigned vece, TCGv_vec, uint64_t);
956void tcg_gen_add_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
957void tcg_gen_sub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
958void tcg_gen_mul_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
959void tcg_gen_and_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
960void tcg_gen_or_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
961void tcg_gen_xor_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
962void tcg_gen_andc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
963void tcg_gen_orc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
964void tcg_gen_not_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
965void tcg_gen_neg_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
966
967void tcg_gen_shli_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
968void tcg_gen_shri_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
969void tcg_gen_sari_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
970
971void tcg_gen_cmp_vec(TCGCond cond, unsigned vece, TCGv_vec r,
972 TCGv_vec a, TCGv_vec b);
973
974void tcg_gen_ld_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset);
975void tcg_gen_st_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset);
976void tcg_gen_stl_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t);
977
978#if TARGET_LONG_BITS == 64
979#define tcg_gen_movi_tl tcg_gen_movi_i64
980#define tcg_gen_mov_tl tcg_gen_mov_i64
981#define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
982#define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
983#define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
984#define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
985#define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
986#define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
987#define tcg_gen_ld_tl tcg_gen_ld_i64
988#define tcg_gen_st8_tl tcg_gen_st8_i64
989#define tcg_gen_st16_tl tcg_gen_st16_i64
990#define tcg_gen_st32_tl tcg_gen_st32_i64
991#define tcg_gen_st_tl tcg_gen_st_i64
992#define tcg_gen_add_tl tcg_gen_add_i64
993#define tcg_gen_addi_tl tcg_gen_addi_i64
994#define tcg_gen_sub_tl tcg_gen_sub_i64
995#define tcg_gen_neg_tl tcg_gen_neg_i64
996#define tcg_gen_subfi_tl tcg_gen_subfi_i64
997#define tcg_gen_subi_tl tcg_gen_subi_i64
998#define tcg_gen_and_tl tcg_gen_and_i64
999#define tcg_gen_andi_tl tcg_gen_andi_i64
1000#define tcg_gen_or_tl tcg_gen_or_i64
1001#define tcg_gen_ori_tl tcg_gen_ori_i64
1002#define tcg_gen_xor_tl tcg_gen_xor_i64
1003#define tcg_gen_xori_tl tcg_gen_xori_i64
1004#define tcg_gen_not_tl tcg_gen_not_i64
1005#define tcg_gen_shl_tl tcg_gen_shl_i64
1006#define tcg_gen_shli_tl tcg_gen_shli_i64
1007#define tcg_gen_shr_tl tcg_gen_shr_i64
1008#define tcg_gen_shri_tl tcg_gen_shri_i64
1009#define tcg_gen_sar_tl tcg_gen_sar_i64
1010#define tcg_gen_sari_tl tcg_gen_sari_i64
1011#define tcg_gen_brcond_tl tcg_gen_brcond_i64
1012#define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
1013#define tcg_gen_setcond_tl tcg_gen_setcond_i64
1014#define tcg_gen_setcondi_tl tcg_gen_setcondi_i64
1015#define tcg_gen_mul_tl tcg_gen_mul_i64
1016#define tcg_gen_muli_tl tcg_gen_muli_i64
1017#define tcg_gen_div_tl tcg_gen_div_i64
1018#define tcg_gen_rem_tl tcg_gen_rem_i64
1019#define tcg_gen_divu_tl tcg_gen_divu_i64
1020#define tcg_gen_remu_tl tcg_gen_remu_i64
1021#define tcg_gen_discard_tl tcg_gen_discard_i64
1022#define tcg_gen_trunc_tl_i32 tcg_gen_extrl_i64_i32
1023#define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
1024#define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
1025#define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
1026#define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
1027#define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
1028#define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
1029#define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
1030#define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
1031#define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
1032#define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
1033#define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
1034#define tcg_gen_bswap16_tl tcg_gen_bswap16_i64
1035#define tcg_gen_bswap32_tl tcg_gen_bswap32_i64
1036#define tcg_gen_bswap64_tl tcg_gen_bswap64_i64
1037#define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
1038#define tcg_gen_extr_i64_tl tcg_gen_extr32_i64
1039#define tcg_gen_andc_tl tcg_gen_andc_i64
1040#define tcg_gen_eqv_tl tcg_gen_eqv_i64
1041#define tcg_gen_nand_tl tcg_gen_nand_i64
1042#define tcg_gen_nor_tl tcg_gen_nor_i64
1043#define tcg_gen_orc_tl tcg_gen_orc_i64
1044#define tcg_gen_clz_tl tcg_gen_clz_i64
1045#define tcg_gen_ctz_tl tcg_gen_ctz_i64
1046#define tcg_gen_clzi_tl tcg_gen_clzi_i64
1047#define tcg_gen_ctzi_tl tcg_gen_ctzi_i64
1048#define tcg_gen_clrsb_tl tcg_gen_clrsb_i64
1049#define tcg_gen_ctpop_tl tcg_gen_ctpop_i64
1050#define tcg_gen_rotl_tl tcg_gen_rotl_i64
1051#define tcg_gen_rotli_tl tcg_gen_rotli_i64
1052#define tcg_gen_rotr_tl tcg_gen_rotr_i64
1053#define tcg_gen_rotri_tl tcg_gen_rotri_i64
1054#define tcg_gen_deposit_tl tcg_gen_deposit_i64
1055#define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i64
1056#define tcg_gen_extract_tl tcg_gen_extract_i64
1057#define tcg_gen_sextract_tl tcg_gen_sextract_i64
1058#define tcg_const_tl tcg_const_i64
1059#define tcg_const_local_tl tcg_const_local_i64
1060#define tcg_gen_movcond_tl tcg_gen_movcond_i64
1061#define tcg_gen_add2_tl tcg_gen_add2_i64
1062#define tcg_gen_sub2_tl tcg_gen_sub2_i64
1063#define tcg_gen_mulu2_tl tcg_gen_mulu2_i64
1064#define tcg_gen_muls2_tl tcg_gen_muls2_i64
1065#define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i64
1066#define tcg_gen_smin_tl tcg_gen_smin_i64
1067#define tcg_gen_umin_tl tcg_gen_umin_i64
1068#define tcg_gen_smax_tl tcg_gen_smax_i64
1069#define tcg_gen_umax_tl tcg_gen_umax_i64
1070#define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i64
1071#define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i64
1072#define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i64
1073#define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i64
1074#define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i64
1075#define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i64
1076#define tcg_gen_atomic_fetch_smin_tl tcg_gen_atomic_fetch_smin_i64
1077#define tcg_gen_atomic_fetch_umin_tl tcg_gen_atomic_fetch_umin_i64
1078#define tcg_gen_atomic_fetch_smax_tl tcg_gen_atomic_fetch_smax_i64
1079#define tcg_gen_atomic_fetch_umax_tl tcg_gen_atomic_fetch_umax_i64
1080#define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i64
1081#define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i64
1082#define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i64
1083#define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i64
1084#define tcg_gen_atomic_smin_fetch_tl tcg_gen_atomic_smin_fetch_i64
1085#define tcg_gen_atomic_umin_fetch_tl tcg_gen_atomic_umin_fetch_i64
1086#define tcg_gen_atomic_smax_fetch_tl tcg_gen_atomic_smax_fetch_i64
1087#define tcg_gen_atomic_umax_fetch_tl tcg_gen_atomic_umax_fetch_i64
1088#define tcg_gen_dup_tl_vec tcg_gen_dup_i64_vec
1089#else
1090#define tcg_gen_movi_tl tcg_gen_movi_i32
1091#define tcg_gen_mov_tl tcg_gen_mov_i32
1092#define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
1093#define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
1094#define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
1095#define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
1096#define tcg_gen_ld32u_tl tcg_gen_ld_i32
1097#define tcg_gen_ld32s_tl tcg_gen_ld_i32
1098#define tcg_gen_ld_tl tcg_gen_ld_i32
1099#define tcg_gen_st8_tl tcg_gen_st8_i32
1100#define tcg_gen_st16_tl tcg_gen_st16_i32
1101#define tcg_gen_st32_tl tcg_gen_st_i32
1102#define tcg_gen_st_tl tcg_gen_st_i32
1103#define tcg_gen_add_tl tcg_gen_add_i32
1104#define tcg_gen_addi_tl tcg_gen_addi_i32
1105#define tcg_gen_sub_tl tcg_gen_sub_i32
1106#define tcg_gen_neg_tl tcg_gen_neg_i32
1107#define tcg_gen_subfi_tl tcg_gen_subfi_i32
1108#define tcg_gen_subi_tl tcg_gen_subi_i32
1109#define tcg_gen_and_tl tcg_gen_and_i32
1110#define tcg_gen_andi_tl tcg_gen_andi_i32
1111#define tcg_gen_or_tl tcg_gen_or_i32
1112#define tcg_gen_ori_tl tcg_gen_ori_i32
1113#define tcg_gen_xor_tl tcg_gen_xor_i32
1114#define tcg_gen_xori_tl tcg_gen_xori_i32
1115#define tcg_gen_not_tl tcg_gen_not_i32
1116#define tcg_gen_shl_tl tcg_gen_shl_i32
1117#define tcg_gen_shli_tl tcg_gen_shli_i32
1118#define tcg_gen_shr_tl tcg_gen_shr_i32
1119#define tcg_gen_shri_tl tcg_gen_shri_i32
1120#define tcg_gen_sar_tl tcg_gen_sar_i32
1121#define tcg_gen_sari_tl tcg_gen_sari_i32
1122#define tcg_gen_brcond_tl tcg_gen_brcond_i32
1123#define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
1124#define tcg_gen_setcond_tl tcg_gen_setcond_i32
1125#define tcg_gen_setcondi_tl tcg_gen_setcondi_i32
1126#define tcg_gen_mul_tl tcg_gen_mul_i32
1127#define tcg_gen_muli_tl tcg_gen_muli_i32
1128#define tcg_gen_div_tl tcg_gen_div_i32
1129#define tcg_gen_rem_tl tcg_gen_rem_i32
1130#define tcg_gen_divu_tl tcg_gen_divu_i32
1131#define tcg_gen_remu_tl tcg_gen_remu_i32
1132#define tcg_gen_discard_tl tcg_gen_discard_i32
1133#define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
1134#define tcg_gen_trunc_i64_tl tcg_gen_extrl_i64_i32
1135#define tcg_gen_extu_i32_tl tcg_gen_mov_i32
1136#define tcg_gen_ext_i32_tl tcg_gen_mov_i32
1137#define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
1138#define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
1139#define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
1140#define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
1141#define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
1142#define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
1143#define tcg_gen_ext32u_tl tcg_gen_mov_i32
1144#define tcg_gen_ext32s_tl tcg_gen_mov_i32
1145#define tcg_gen_bswap16_tl tcg_gen_bswap16_i32
1146#define tcg_gen_bswap32_tl tcg_gen_bswap32_i32
1147#define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
1148#define tcg_gen_extr_i64_tl tcg_gen_extr_i64_i32
1149#define tcg_gen_andc_tl tcg_gen_andc_i32
1150#define tcg_gen_eqv_tl tcg_gen_eqv_i32
1151#define tcg_gen_nand_tl tcg_gen_nand_i32
1152#define tcg_gen_nor_tl tcg_gen_nor_i32
1153#define tcg_gen_orc_tl tcg_gen_orc_i32
1154#define tcg_gen_clz_tl tcg_gen_clz_i32
1155#define tcg_gen_ctz_tl tcg_gen_ctz_i32
1156#define tcg_gen_clzi_tl tcg_gen_clzi_i32
1157#define tcg_gen_ctzi_tl tcg_gen_ctzi_i32
1158#define tcg_gen_clrsb_tl tcg_gen_clrsb_i32
1159#define tcg_gen_ctpop_tl tcg_gen_ctpop_i32
1160#define tcg_gen_rotl_tl tcg_gen_rotl_i32
1161#define tcg_gen_rotli_tl tcg_gen_rotli_i32
1162#define tcg_gen_rotr_tl tcg_gen_rotr_i32
1163#define tcg_gen_rotri_tl tcg_gen_rotri_i32
1164#define tcg_gen_deposit_tl tcg_gen_deposit_i32
1165#define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i32
1166#define tcg_gen_extract_tl tcg_gen_extract_i32
1167#define tcg_gen_sextract_tl tcg_gen_sextract_i32
1168#define tcg_const_tl tcg_const_i32
1169#define tcg_const_local_tl tcg_const_local_i32
1170#define tcg_gen_movcond_tl tcg_gen_movcond_i32
1171#define tcg_gen_add2_tl tcg_gen_add2_i32
1172#define tcg_gen_sub2_tl tcg_gen_sub2_i32
1173#define tcg_gen_mulu2_tl tcg_gen_mulu2_i32
1174#define tcg_gen_muls2_tl tcg_gen_muls2_i32
1175#define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i32
1176#define tcg_gen_smin_tl tcg_gen_smin_i32
1177#define tcg_gen_umin_tl tcg_gen_umin_i32
1178#define tcg_gen_smax_tl tcg_gen_smax_i32
1179#define tcg_gen_umax_tl tcg_gen_umax_i32
1180#define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i32
1181#define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i32
1182#define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i32
1183#define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i32
1184#define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i32
1185#define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i32
1186#define tcg_gen_atomic_fetch_smin_tl tcg_gen_atomic_fetch_smin_i32
1187#define tcg_gen_atomic_fetch_umin_tl tcg_gen_atomic_fetch_umin_i32
1188#define tcg_gen_atomic_fetch_smax_tl tcg_gen_atomic_fetch_smax_i32
1189#define tcg_gen_atomic_fetch_umax_tl tcg_gen_atomic_fetch_umax_i32
1190#define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i32
1191#define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i32
1192#define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i32
1193#define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i32
1194#define tcg_gen_atomic_smin_fetch_tl tcg_gen_atomic_smin_fetch_i32
1195#define tcg_gen_atomic_umin_fetch_tl tcg_gen_atomic_umin_fetch_i32
1196#define tcg_gen_atomic_smax_fetch_tl tcg_gen_atomic_smax_fetch_i32
1197#define tcg_gen_atomic_umax_fetch_tl tcg_gen_atomic_umax_fetch_i32
1198#define tcg_gen_dup_tl_vec tcg_gen_dup_i32_vec
1199#endif
1200
1201#if UINTPTR_MAX == UINT32_MAX
1202# define PTR i32
1203# define NAT TCGv_i32
1204#else
1205# define PTR i64
1206# define NAT TCGv_i64
1207#endif
1208
1209static inline void tcg_gen_ld_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t o)
1210{
1211 glue(tcg_gen_ld_,PTR)((NAT)r, a, o);
1212}
1213
1214static inline void tcg_gen_discard_ptr(TCGv_ptr a)
1215{
1216 glue(tcg_gen_discard_,PTR)((NAT)a);
1217}
1218
1219static inline void tcg_gen_add_ptr(TCGv_ptr r, TCGv_ptr a, TCGv_ptr b)
1220{
1221 glue(tcg_gen_add_,PTR)((NAT)r, (NAT)a, (NAT)b);
1222}
1223
1224static inline void tcg_gen_addi_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t b)
1225{
1226 glue(tcg_gen_addi_,PTR)((NAT)r, (NAT)a, b);
1227}
1228
1229static inline void tcg_gen_brcondi_ptr(TCGCond cond, TCGv_ptr a,
1230 intptr_t b, TCGLabel *label)
1231{
1232 glue(tcg_gen_brcondi_,PTR)(cond, (NAT)a, b, label);
1233}
1234
1235static inline void tcg_gen_ext_i32_ptr(TCGv_ptr r, TCGv_i32 a)
1236{
1237#if UINTPTR_MAX == UINT32_MAX
1238 tcg_gen_mov_i32((NAT)r, a);
1239#else
1240 tcg_gen_ext_i32_i64((NAT)r, a);
1241#endif
1242}
1243
1244static inline void tcg_gen_trunc_i64_ptr(TCGv_ptr r, TCGv_i64 a)
1245{
1246#if UINTPTR_MAX == UINT32_MAX
1247 tcg_gen_extrl_i64_i32((NAT)r, a);
1248#else
1249 tcg_gen_mov_i64((NAT)r, a);
1250#endif
1251}
1252
1253static inline void tcg_gen_extu_ptr_i64(TCGv_i64 r, TCGv_ptr a)
1254{
1255#if UINTPTR_MAX == UINT32_MAX
1256 tcg_gen_extu_i32_i64(r, (NAT)a);
1257#else
1258 tcg_gen_mov_i64(r, (NAT)a);
1259#endif
1260}
1261
1262static inline void tcg_gen_trunc_ptr_i32(TCGv_i32 r, TCGv_ptr a)
1263{
1264#if UINTPTR_MAX == UINT32_MAX
1265 tcg_gen_mov_i32(r, (NAT)a);
1266#else
1267 tcg_gen_extrl_i64_i32(r, (NAT)a);
1268#endif
1269}
1270
1271#undef PTR
1272#undef NAT
1273
1274#endif
1275
