qemu/tests/pnv-xscom-test.c
<<
>>
Prefs
   1/*
   2 * QTest testcase for PowerNV XSCOM bus
   3 *
   4 * Copyright (c) 2016, IBM Corporation.
   5 *
   6 * This work is licensed under the terms of the GNU GPL, version 2 or
   7 * later. See the COPYING file in the top-level directory.
   8 */
   9#include "qemu/osdep.h"
  10
  11#include "libqtest.h"
  12
  13typedef enum PnvChipType {
  14    PNV_CHIP_POWER8E,     /* AKA Murano (default) */
  15    PNV_CHIP_POWER8,      /* AKA Venice */
  16    PNV_CHIP_POWER8NVL,   /* AKA Naples */
  17    PNV_CHIP_POWER9,      /* AKA Nimbus */
  18} PnvChipType;
  19
  20typedef struct PnvChip {
  21    PnvChipType chip_type;
  22    const char *cpu_model;
  23    uint64_t    xscom_base;
  24    uint64_t    cfam_id;
  25    uint32_t    first_core;
  26} PnvChip;
  27
  28static const PnvChip pnv_chips[] = {
  29    {
  30        .chip_type  = PNV_CHIP_POWER8,
  31        .cpu_model  = "POWER8",
  32        .xscom_base = 0x0003fc0000000000ull,
  33        .cfam_id    = 0x220ea04980000000ull,
  34        .first_core = 0x1,
  35    }, {
  36        .chip_type  = PNV_CHIP_POWER8NVL,
  37        .cpu_model  = "POWER8NVL",
  38        .xscom_base = 0x0003fc0000000000ull,
  39        .cfam_id    = 0x120d304980000000ull,
  40        .first_core = 0x1,
  41    },
  42#if 0 /* POWER9 support is not ready yet */
  43    {
  44        .chip_type  = PNV_CHIP_POWER9,
  45        .cpu_model  = "POWER9",
  46        .xscom_base = 0x000603fc00000000ull,
  47        .cfam_id    = 0x220d104900008000ull,
  48        .first_core = 0x0,
  49    },
  50#endif
  51};
  52
  53static uint64_t pnv_xscom_addr(const PnvChip *chip, uint32_t pcba)
  54{
  55    uint64_t addr = chip->xscom_base;
  56
  57    if (chip->chip_type == PNV_CHIP_POWER9) {
  58        addr |= ((uint64_t) pcba << 3);
  59    } else {
  60        addr |= (((uint64_t) pcba << 4) & ~0xffull) |
  61            (((uint64_t) pcba << 3) & 0x78);
  62    }
  63    return addr;
  64}
  65
  66static uint64_t pnv_xscom_read(const PnvChip *chip, uint32_t pcba)
  67{
  68    return readq(pnv_xscom_addr(chip, pcba));
  69}
  70
  71static void test_xscom_cfam_id(const PnvChip *chip)
  72{
  73    uint64_t f000f = pnv_xscom_read(chip, 0xf000f);
  74
  75    g_assert_cmphex(f000f, ==, chip->cfam_id);
  76}
  77
  78static void test_cfam_id(const void *data)
  79{
  80    const PnvChip *chip = data;
  81
  82    global_qtest = qtest_initf("-M powernv,accel=tcg -cpu %s",
  83                               chip->cpu_model);
  84    test_xscom_cfam_id(chip);
  85    qtest_quit(global_qtest);
  86}
  87
  88
  89#define PNV_XSCOM_EX_CORE_BASE    0x10000000ull
  90#define PNV_XSCOM_EX_BASE(core) \
  91    (PNV_XSCOM_EX_CORE_BASE | ((uint64_t)(core) << 24))
  92#define PNV_XSCOM_P9_EC_BASE(core) \
  93    ((uint64_t)(((core) & 0x1F) + 0x20) << 24)
  94
  95#define PNV_XSCOM_EX_DTS_RESULT0     0x50000
  96
  97static void test_xscom_core(const PnvChip *chip)
  98{
  99    uint32_t first_core_dts0 = PNV_XSCOM_EX_DTS_RESULT0;
 100    uint64_t dts0;
 101
 102    if (chip->chip_type != PNV_CHIP_POWER9) {
 103        first_core_dts0 |= PNV_XSCOM_EX_BASE(chip->first_core);
 104    } else {
 105        first_core_dts0 |= PNV_XSCOM_P9_EC_BASE(chip->first_core);
 106    }
 107
 108    dts0 = pnv_xscom_read(chip, first_core_dts0);
 109
 110    g_assert_cmphex(dts0, ==, 0x26f024f023f0000ull);
 111}
 112
 113static void test_core(const void *data)
 114{
 115    const PnvChip *chip = data;
 116
 117    global_qtest = qtest_initf("-M powernv,accel=tcg -cpu %s",
 118                               chip->cpu_model);
 119    test_xscom_core(chip);
 120    qtest_quit(global_qtest);
 121}
 122
 123static void add_test(const char *name, void (*test)(const void *data))
 124{
 125    int i;
 126
 127    for (i = 0; i < ARRAY_SIZE(pnv_chips); i++) {
 128        char *tname = g_strdup_printf("pnv-xscom/%s/%s", name,
 129                                      pnv_chips[i].cpu_model);
 130        qtest_add_data_func(tname, &pnv_chips[i], test);
 131        g_free(tname);
 132    }
 133}
 134
 135int main(int argc, char **argv)
 136{
 137    g_test_init(&argc, &argv, NULL);
 138
 139    add_test("cfam_id", test_cfam_id);
 140    add_test("core", test_core);
 141    return g_test_run();
 142}
 143