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13#include "qemu/osdep.h"
14#include "qapi/error.h"
15#include "hw/hw.h"
16#include "hw/arm/pxa.h"
17#include "hw/arm/arm.h"
18#include "sysemu/sysemu.h"
19#include "hw/pcmcia.h"
20#include "hw/i2c/i2c.h"
21#include "hw/ssi/ssi.h"
22#include "hw/block/flash.h"
23#include "qemu/timer.h"
24#include "hw/devices.h"
25#include "hw/arm/sharpsl.h"
26#include "ui/console.h"
27#include "hw/audio/wm8750.h"
28#include "audio/audio.h"
29#include "hw/boards.h"
30#include "hw/sysbus.h"
31#include "exec/address-spaces.h"
32#include "cpu.h"
33
34#undef REG_FMT
35#define REG_FMT "0x%02lx"
36
37
38#define FLASH_BASE 0x0c000000
39#define FLASH_ECCLPLB 0x00
40#define FLASH_ECCLPUB 0x04
41#define FLASH_ECCCP 0x08
42#define FLASH_ECCCNTR 0x0c
43#define FLASH_ECCCLRR 0x10
44#define FLASH_FLASHIO 0x14
45#define FLASH_FLASHCTL 0x18
46
47#define FLASHCTL_CE0 (1 << 0)
48#define FLASHCTL_CLE (1 << 1)
49#define FLASHCTL_ALE (1 << 2)
50#define FLASHCTL_WP (1 << 3)
51#define FLASHCTL_CE1 (1 << 4)
52#define FLASHCTL_RYBY (1 << 5)
53#define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
54
55#define TYPE_SL_NAND "sl-nand"
56#define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
57
58typedef struct {
59 SysBusDevice parent_obj;
60
61 MemoryRegion iomem;
62 DeviceState *nand;
63 uint8_t ctl;
64 uint8_t manf_id;
65 uint8_t chip_id;
66 ECCState ecc;
67} SLNANDState;
68
69static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
70{
71 SLNANDState *s = (SLNANDState *) opaque;
72 int ryby;
73
74 switch (addr) {
75#define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
76 case FLASH_ECCLPLB:
77 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
78 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
79
80#define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to))
81 case FLASH_ECCLPUB:
82 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
83 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
84
85 case FLASH_ECCCP:
86 return s->ecc.cp;
87
88 case FLASH_ECCCNTR:
89 return s->ecc.count & 0xff;
90
91 case FLASH_FLASHCTL:
92 nand_getpins(s->nand, &ryby);
93 if (ryby)
94 return s->ctl | FLASHCTL_RYBY;
95 else
96 return s->ctl;
97
98 case FLASH_FLASHIO:
99 if (size == 4) {
100 return ecc_digest(&s->ecc, nand_getio(s->nand)) |
101 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
102 }
103 return ecc_digest(&s->ecc, nand_getio(s->nand));
104
105 default:
106 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
107 }
108 return 0;
109}
110
111static void sl_write(void *opaque, hwaddr addr,
112 uint64_t value, unsigned size)
113{
114 SLNANDState *s = (SLNANDState *) opaque;
115
116 switch (addr) {
117 case FLASH_ECCCLRR:
118
119 ecc_reset(&s->ecc);
120 break;
121
122 case FLASH_FLASHCTL:
123 s->ctl = value & 0xff & ~FLASHCTL_RYBY;
124 nand_setpins(s->nand,
125 s->ctl & FLASHCTL_CLE,
126 s->ctl & FLASHCTL_ALE,
127 s->ctl & FLASHCTL_NCE,
128 s->ctl & FLASHCTL_WP,
129 0);
130 break;
131
132 case FLASH_FLASHIO:
133 nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
134 break;
135
136 default:
137 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
138 }
139}
140
141enum {
142 FLASH_128M,
143 FLASH_1024M,
144};
145
146static const MemoryRegionOps sl_ops = {
147 .read = sl_read,
148 .write = sl_write,
149 .endianness = DEVICE_NATIVE_ENDIAN,
150};
151
152static void sl_flash_register(PXA2xxState *cpu, int size)
153{
154 DeviceState *dev;
155
156 dev = qdev_create(NULL, TYPE_SL_NAND);
157
158 qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
159 if (size == FLASH_128M)
160 qdev_prop_set_uint8(dev, "chip_id", 0x73);
161 else if (size == FLASH_1024M)
162 qdev_prop_set_uint8(dev, "chip_id", 0xf1);
163
164 qdev_init_nofail(dev);
165 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE);
166}
167
168static void sl_nand_init(Object *obj)
169{
170 SLNANDState *s = SL_NAND(obj);
171 SysBusDevice *dev = SYS_BUS_DEVICE(obj);
172
173 s->ctl = 0;
174
175 memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40);
176 sysbus_init_mmio(dev, &s->iomem);
177}
178
179static void sl_nand_realize(DeviceState *dev, Error **errp)
180{
181 SLNANDState *s = SL_NAND(dev);
182 DriveInfo *nand;
183
184
185 nand = drive_get(IF_MTD, 0, 0);
186 s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL,
187 s->manf_id, s->chip_id);
188}
189
190
191
192#define SPITZ_KEY_STROBE_NUM 11
193#define SPITZ_KEY_SENSE_NUM 7
194
195static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
196 12, 17, 91, 34, 36, 38, 39
197};
198
199static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
200 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
201};
202
203
204static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
205 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
206 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
207 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 },
208 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 },
209 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 },
210 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 },
211 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 },
212 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 },
213};
214
215#define SPITZ_GPIO_AK_INT 13
216#define SPITZ_GPIO_SYNC 16
217#define SPITZ_GPIO_ON_KEY 95
218#define SPITZ_GPIO_SWA 97
219#define SPITZ_GPIO_SWB 96
220
221
222static const int spitz_gpiomap[5] = {
223 SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
224 SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
225};
226
227#define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
228#define SPITZ_KEYBOARD(obj) \
229 OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD)
230
231typedef struct {
232 SysBusDevice parent_obj;
233
234 qemu_irq sense[SPITZ_KEY_SENSE_NUM];
235 qemu_irq gpiomap[5];
236 int keymap[0x80];
237 uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
238 uint16_t strobe_state;
239 uint16_t sense_state;
240
241 uint16_t pre_map[0x100];
242 uint16_t modifiers;
243 uint16_t imodifiers;
244 uint8_t fifo[16];
245 int fifopos, fifolen;
246 QEMUTimer *kbdtimer;
247} SpitzKeyboardState;
248
249static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
250{
251 int i;
252 uint16_t strobe, sense = 0;
253 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
254 strobe = s->keyrow[i] & s->strobe_state;
255 if (strobe) {
256 sense |= 1 << i;
257 if (!(s->sense_state & (1 << i)))
258 qemu_irq_raise(s->sense[i]);
259 } else if (s->sense_state & (1 << i))
260 qemu_irq_lower(s->sense[i]);
261 }
262
263 s->sense_state = sense;
264}
265
266static void spitz_keyboard_strobe(void *opaque, int line, int level)
267{
268 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
269
270 if (level)
271 s->strobe_state |= 1 << line;
272 else
273 s->strobe_state &= ~(1 << line);
274 spitz_keyboard_sense_update(s);
275}
276
277static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
278{
279 int spitz_keycode = s->keymap[keycode & 0x7f];
280 if (spitz_keycode == -1)
281 return;
282
283
284 if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
285 qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
286 return;
287 }
288
289 if (keycode & 0x80)
290 s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
291 else
292 s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
293
294 spitz_keyboard_sense_update(s);
295}
296
297#define SPITZ_MOD_SHIFT (1 << 7)
298#define SPITZ_MOD_CTRL (1 << 8)
299#define SPITZ_MOD_FN (1 << 9)
300
301#define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
302
303static void spitz_keyboard_handler(void *opaque, int keycode)
304{
305 SpitzKeyboardState *s = opaque;
306 uint16_t code;
307 int mapcode;
308 switch (keycode) {
309 case 0x2a:
310 s->modifiers |= 1;
311 break;
312 case 0xaa:
313 s->modifiers &= ~1;
314 break;
315 case 0x36:
316 s->modifiers |= 2;
317 break;
318 case 0xb6:
319 s->modifiers &= ~2;
320 break;
321 case 0x1d:
322 s->modifiers |= 4;
323 break;
324 case 0x9d:
325 s->modifiers &= ~4;
326 break;
327 case 0x38:
328 s->modifiers |= 8;
329 break;
330 case 0xb8:
331 s->modifiers &= ~8;
332 break;
333 }
334
335 code = s->pre_map[mapcode = ((s->modifiers & 3) ?
336 (keycode | SPITZ_MOD_SHIFT) :
337 (keycode & ~SPITZ_MOD_SHIFT))];
338
339 if (code != mapcode) {
340#if 0
341 if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) {
342 QUEUE_KEY(0x2a | (keycode & 0x80));
343 }
344 if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) {
345 QUEUE_KEY(0x1d | (keycode & 0x80));
346 }
347 if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) {
348 QUEUE_KEY(0x38 | (keycode & 0x80));
349 }
350 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) {
351 QUEUE_KEY(0x2a | (~keycode & 0x80));
352 }
353 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) {
354 QUEUE_KEY(0x36 | (~keycode & 0x80));
355 }
356#else
357 if (keycode & 0x80) {
358 if ((s->imodifiers & 1 ) && !(s->modifiers & 1))
359 QUEUE_KEY(0x2a | 0x80);
360 if ((s->imodifiers & 4 ) && !(s->modifiers & 4))
361 QUEUE_KEY(0x1d | 0x80);
362 if ((s->imodifiers & 8 ) && !(s->modifiers & 8))
363 QUEUE_KEY(0x38 | 0x80);
364 if ((s->imodifiers & 0x10) && (s->modifiers & 1))
365 QUEUE_KEY(0x2a);
366 if ((s->imodifiers & 0x20) && (s->modifiers & 2))
367 QUEUE_KEY(0x36);
368 s->imodifiers = 0;
369 } else {
370 if ((code & SPITZ_MOD_SHIFT) &&
371 !((s->modifiers | s->imodifiers) & 1)) {
372 QUEUE_KEY(0x2a);
373 s->imodifiers |= 1;
374 }
375 if ((code & SPITZ_MOD_CTRL) &&
376 !((s->modifiers | s->imodifiers) & 4)) {
377 QUEUE_KEY(0x1d);
378 s->imodifiers |= 4;
379 }
380 if ((code & SPITZ_MOD_FN) &&
381 !((s->modifiers | s->imodifiers) & 8)) {
382 QUEUE_KEY(0x38);
383 s->imodifiers |= 8;
384 }
385 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) &&
386 !(s->imodifiers & 0x10)) {
387 QUEUE_KEY(0x2a | 0x80);
388 s->imodifiers |= 0x10;
389 }
390 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) &&
391 !(s->imodifiers & 0x20)) {
392 QUEUE_KEY(0x36 | 0x80);
393 s->imodifiers |= 0x20;
394 }
395 }
396#endif
397 }
398
399 QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
400}
401
402static void spitz_keyboard_tick(void *opaque)
403{
404 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
405
406 if (s->fifolen) {
407 spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
408 s->fifolen --;
409 if (s->fifopos >= 16)
410 s->fifopos = 0;
411 }
412
413 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
414 NANOSECONDS_PER_SECOND / 32);
415}
416
417static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
418{
419 int i;
420 for (i = 0; i < 0x100; i ++)
421 s->pre_map[i] = i;
422 s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT;
423 s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT;
424 s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT;
425 s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT;
426 s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT;
427 s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT;
428 s->pre_map[0x28] = 0x08 | SPITZ_MOD_SHIFT;
429 s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT;
430 s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT;
431 s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT;
432 s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT;
433 s->pre_map[0xd3] = 0x0e | SPITZ_MOD_FN;
434 s->pre_map[0x3a] = 0x0f | SPITZ_MOD_FN;
435 s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN;
436 s->pre_map[0x0d] = 0x12 | SPITZ_MOD_FN;
437 s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN;
438 s->pre_map[0x1a] = 0x14 | SPITZ_MOD_FN;
439 s->pre_map[0x1b] = 0x15 | SPITZ_MOD_FN;
440 s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN;
441 s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN;
442 s->pre_map[0x27] = 0x22 | SPITZ_MOD_FN;
443 s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN;
444 s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN;
445 s->pre_map[0x2b] = 0x25 | SPITZ_MOD_FN;
446 s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN;
447 s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN;
448 s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN;
449 s->pre_map[0x35] = 0x33 | SPITZ_MOD_SHIFT;
450 s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN;
451 s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT;
452 s->pre_map[0x49] = 0x48 | SPITZ_MOD_FN;
453 s->pre_map[0x51] = 0x50 | SPITZ_MOD_FN;
454
455 s->modifiers = 0;
456 s->imodifiers = 0;
457 s->fifopos = 0;
458 s->fifolen = 0;
459}
460
461#undef SPITZ_MOD_SHIFT
462#undef SPITZ_MOD_CTRL
463#undef SPITZ_MOD_FN
464
465static int spitz_keyboard_post_load(void *opaque, int version_id)
466{
467 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
468
469
470 memset(s->keyrow, 0, sizeof(s->keyrow));
471 spitz_keyboard_sense_update(s);
472 s->modifiers = 0;
473 s->imodifiers = 0;
474 s->fifopos = 0;
475 s->fifolen = 0;
476
477 return 0;
478}
479
480static void spitz_keyboard_register(PXA2xxState *cpu)
481{
482 int i;
483 DeviceState *dev;
484 SpitzKeyboardState *s;
485
486 dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL);
487 s = SPITZ_KEYBOARD(dev);
488
489 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
490 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
491
492 for (i = 0; i < 5; i ++)
493 s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
494
495 if (!graphic_rotate)
496 s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
497
498 for (i = 0; i < 5; i++)
499 qemu_set_irq(s->gpiomap[i], 0);
500
501 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
502 qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
503 qdev_get_gpio_in(dev, i));
504
505 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
506
507 qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
508}
509
510static void spitz_keyboard_init(Object *obj)
511{
512 DeviceState *dev = DEVICE(obj);
513 SpitzKeyboardState *s = SPITZ_KEYBOARD(obj);
514 int i, j;
515
516 for (i = 0; i < 0x80; i ++)
517 s->keymap[i] = -1;
518 for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
519 for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
520 if (spitz_keymap[i][j] != -1)
521 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
522
523 spitz_keyboard_pre_map(s);
524
525 s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s);
526 qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
527 qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM);
528}
529
530
531
532#define LCDTG_RESCTL 0x00
533#define LCDTG_PHACTRL 0x01
534#define LCDTG_DUTYCTRL 0x02
535#define LCDTG_POWERREG0 0x03
536#define LCDTG_POWERREG1 0x04
537#define LCDTG_GPOR3 0x05
538#define LCDTG_PICTRL 0x06
539#define LCDTG_POLCTRL 0x07
540
541typedef struct {
542 SSISlave ssidev;
543 uint32_t bl_intensity;
544 uint32_t bl_power;
545} SpitzLCDTG;
546
547static void spitz_bl_update(SpitzLCDTG *s)
548{
549 if (s->bl_power && s->bl_intensity)
550 zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
551 else
552 zaurus_printf("LCD Backlight now off\n");
553}
554
555
556static SpitzLCDTG *spitz_lcdtg;
557
558static inline void spitz_bl_bit5(void *opaque, int line, int level)
559{
560 SpitzLCDTG *s = spitz_lcdtg;
561 int prev = s->bl_intensity;
562
563 if (level)
564 s->bl_intensity &= ~0x20;
565 else
566 s->bl_intensity |= 0x20;
567
568 if (s->bl_power && prev != s->bl_intensity)
569 spitz_bl_update(s);
570}
571
572static inline void spitz_bl_power(void *opaque, int line, int level)
573{
574 SpitzLCDTG *s = spitz_lcdtg;
575 s->bl_power = !!level;
576 spitz_bl_update(s);
577}
578
579static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
580{
581 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
582 int addr;
583 addr = value >> 5;
584 value &= 0x1f;
585
586 switch (addr) {
587 case LCDTG_RESCTL:
588 if (value)
589 zaurus_printf("LCD in QVGA mode\n");
590 else
591 zaurus_printf("LCD in VGA mode\n");
592 break;
593
594 case LCDTG_DUTYCTRL:
595 s->bl_intensity &= ~0x1f;
596 s->bl_intensity |= value;
597 if (s->bl_power)
598 spitz_bl_update(s);
599 break;
600
601 case LCDTG_POWERREG0:
602
603 break;
604 }
605 return 0;
606}
607
608static void spitz_lcdtg_realize(SSISlave *dev, Error **errp)
609{
610 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
611
612 spitz_lcdtg = s;
613 s->bl_power = 0;
614 s->bl_intensity = 0x20;
615}
616
617
618
619#define CORGI_SSP_PORT 2
620
621#define SPITZ_GPIO_LCDCON_CS 53
622#define SPITZ_GPIO_ADS7846_CS 14
623#define SPITZ_GPIO_MAX1111_CS 20
624#define SPITZ_GPIO_TP_INT 11
625
626static DeviceState *max1111;
627
628
629typedef struct {
630 SSISlave ssidev;
631 SSIBus *bus[3];
632 uint32_t enable[3];
633} CorgiSSPState;
634
635static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
636{
637 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
638 int i;
639
640 for (i = 0; i < 3; i++) {
641 if (s->enable[i]) {
642 return ssi_transfer(s->bus[i], value);
643 }
644 }
645 return 0;
646}
647
648static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
649{
650 CorgiSSPState *s = (CorgiSSPState *)opaque;
651 assert(line >= 0 && line < 3);
652 s->enable[line] = !level;
653}
654
655#define MAX1111_BATT_VOLT 1
656#define MAX1111_BATT_TEMP 2
657#define MAX1111_ACIN_VOLT 3
658
659#define SPITZ_BATTERY_TEMP 0xe0
660#define SPITZ_BATTERY_VOLT 0xd0
661#define SPITZ_CHARGEON_ACIN 0x80
662
663static void spitz_adc_temp_on(void *opaque, int line, int level)
664{
665 if (!max1111)
666 return;
667
668 if (level)
669 max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
670 else
671 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
672}
673
674static void corgi_ssp_realize(SSISlave *d, Error **errp)
675{
676 DeviceState *dev = DEVICE(d);
677 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, d);
678
679 qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3);
680 s->bus[0] = ssi_create_bus(dev, "ssi0");
681 s->bus[1] = ssi_create_bus(dev, "ssi1");
682 s->bus[2] = ssi_create_bus(dev, "ssi2");
683}
684
685static void spitz_ssp_attach(PXA2xxState *cpu)
686{
687 DeviceState *mux;
688 DeviceState *dev;
689 void *bus;
690
691 mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
692
693 bus = qdev_get_child_bus(mux, "ssi0");
694 ssi_create_slave(bus, "spitz-lcdtg");
695
696 bus = qdev_get_child_bus(mux, "ssi1");
697 dev = ssi_create_slave(bus, "ads7846");
698 qdev_connect_gpio_out(dev, 0,
699 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT));
700
701 bus = qdev_get_child_bus(mux, "ssi2");
702 max1111 = ssi_create_slave(bus, "max1111");
703 max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
704 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
705 max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
706
707 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
708 qdev_get_gpio_in(mux, 0));
709 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
710 qdev_get_gpio_in(mux, 1));
711 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
712 qdev_get_gpio_in(mux, 2));
713}
714
715
716
717static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
718{
719 PCMCIACardState *md;
720 DriveInfo *dinfo;
721
722 dinfo = drive_get(IF_IDE, 0, 0);
723 if (!dinfo || dinfo->media_cd)
724 return;
725 md = dscm1xxxx_init(dinfo);
726 pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
727}
728
729
730
731#define AKITA_MAX_ADDR 0x18
732#define SPITZ_WM_ADDRL 0x1b
733#define SPITZ_WM_ADDRH 0x1a
734
735#define SPITZ_GPIO_WM 5
736
737static void spitz_wm8750_addr(void *opaque, int line, int level)
738{
739 I2CSlave *wm = (I2CSlave *) opaque;
740 if (level)
741 i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
742 else
743 i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
744}
745
746static void spitz_i2c_setup(PXA2xxState *cpu)
747{
748
749 I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
750
751 DeviceState *wm;
752
753
754 wm = i2c_create_slave(bus, TYPE_WM8750, 0);
755
756 spitz_wm8750_addr(wm, 0, 0);
757 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
758 qemu_allocate_irq(spitz_wm8750_addr, wm, 0));
759
760 cpu->i2s->opaque = wm;
761 cpu->i2s->codec_out = wm8750_dac_dat;
762 cpu->i2s->codec_in = wm8750_adc_dat;
763 wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
764}
765
766static void spitz_akita_i2c_setup(PXA2xxState *cpu)
767{
768
769 i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
770 AKITA_MAX_ADDR);
771}
772
773
774
775static void spitz_out_switch(void *opaque, int line, int level)
776{
777 switch (line) {
778 case 0:
779 zaurus_printf("Charging %s.\n", level ? "off" : "on");
780 break;
781 case 1:
782 zaurus_printf("Discharging %s.\n", level ? "on" : "off");
783 break;
784 case 2:
785 zaurus_printf("Green LED %s.\n", level ? "on" : "off");
786 break;
787 case 3:
788 zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
789 break;
790 case 4:
791 spitz_bl_bit5(opaque, line, level);
792 break;
793 case 5:
794 spitz_bl_power(opaque, line, level);
795 break;
796 case 6:
797 spitz_adc_temp_on(opaque, line, level);
798 break;
799 }
800}
801
802#define SPITZ_SCP_LED_GREEN 1
803#define SPITZ_SCP_JK_B 2
804#define SPITZ_SCP_CHRG_ON 3
805#define SPITZ_SCP_MUTE_L 4
806#define SPITZ_SCP_MUTE_R 5
807#define SPITZ_SCP_CF_POWER 6
808#define SPITZ_SCP_LED_ORANGE 7
809#define SPITZ_SCP_JK_A 8
810#define SPITZ_SCP_ADC_TEMP_ON 9
811#define SPITZ_SCP2_IR_ON 1
812#define SPITZ_SCP2_AKIN_PULLUP 2
813#define SPITZ_SCP2_BACKLIGHT_CONT 7
814#define SPITZ_SCP2_BACKLIGHT_ON 8
815#define SPITZ_SCP2_MIC_BIAS 9
816
817static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
818 DeviceState *scp0, DeviceState *scp1)
819{
820 qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
821
822 qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
823 qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]);
824 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
825 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
826
827 if (scp1) {
828 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
829 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
830 }
831
832 qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
833}
834
835#define SPITZ_GPIO_HSYNC 22
836#define SPITZ_GPIO_SD_DETECT 9
837#define SPITZ_GPIO_SD_WP 81
838#define SPITZ_GPIO_ON_RESET 89
839#define SPITZ_GPIO_BAT_COVER 90
840#define SPITZ_GPIO_CF1_IRQ 105
841#define SPITZ_GPIO_CF1_CD 94
842#define SPITZ_GPIO_CF2_IRQ 106
843#define SPITZ_GPIO_CF2_CD 93
844
845static int spitz_hsync;
846
847static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
848{
849 PXA2xxState *cpu = (PXA2xxState *) opaque;
850 qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
851 spitz_hsync ^= 1;
852}
853
854static void spitz_reset(void *opaque, int line, int level)
855{
856 if (level) {
857 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
858 }
859}
860
861static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
862{
863 qemu_irq lcd_hsync;
864 qemu_irq reset;
865
866
867
868
869
870
871
872 spitz_hsync = 0;
873 lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0);
874 pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
875 pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
876
877
878 pxa2xx_mmci_handlers(cpu->mmc,
879 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
880 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
881
882
883 qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
884
885
886 reset = qemu_allocate_irq(spitz_reset, cpu, 0);
887 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset);
888
889
890 if (slots >= 1)
891 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
892 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
893 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
894 if (slots >= 2)
895 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
896 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
897 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
898}
899
900
901enum spitz_model_e { spitz, akita, borzoi, terrier };
902
903#define SPITZ_RAM 0x04000000
904#define SPITZ_ROM 0x00800000
905
906static struct arm_boot_info spitz_binfo = {
907 .loader_start = PXA2XX_SDRAM_BASE,
908 .ram_size = 0x04000000,
909};
910
911static void spitz_common_init(MachineState *machine,
912 enum spitz_model_e model, int arm_id)
913{
914 PXA2xxState *mpu;
915 DeviceState *scp0, *scp1 = NULL;
916 MemoryRegion *address_space_mem = get_system_memory();
917 MemoryRegion *rom = g_new(MemoryRegion, 1);
918
919
920 mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size,
921 machine->cpu_type);
922
923 sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
924
925 memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal);
926 memory_region_set_readonly(rom, true);
927 memory_region_add_subregion(address_space_mem, 0, rom);
928
929
930 spitz_keyboard_register(mpu);
931
932 spitz_ssp_attach(mpu);
933
934 scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
935 if (model != akita) {
936 scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
937 }
938
939 spitz_scoop_gpio_setup(mpu, scp0, scp1);
940
941 spitz_gpio_setup(mpu, (model == akita) ? 1 : 2);
942
943 spitz_i2c_setup(mpu);
944
945 if (model == akita)
946 spitz_akita_i2c_setup(mpu);
947
948 if (model == terrier)
949
950 spitz_microdrive_attach(mpu, 1);
951 else if (model != akita)
952
953 spitz_microdrive_attach(mpu, 0);
954
955 spitz_binfo.kernel_filename = machine->kernel_filename;
956 spitz_binfo.kernel_cmdline = machine->kernel_cmdline;
957 spitz_binfo.initrd_filename = machine->initrd_filename;
958 spitz_binfo.board_id = arm_id;
959 arm_load_kernel(mpu->cpu, &spitz_binfo);
960 sl_bootparam_write(SL_PXA_PARAM_BASE);
961}
962
963static void spitz_init(MachineState *machine)
964{
965 spitz_common_init(machine, spitz, 0x2c9);
966}
967
968static void borzoi_init(MachineState *machine)
969{
970 spitz_common_init(machine, borzoi, 0x33f);
971}
972
973static void akita_init(MachineState *machine)
974{
975 spitz_common_init(machine, akita, 0x2e8);
976}
977
978static void terrier_init(MachineState *machine)
979{
980 spitz_common_init(machine, terrier, 0x33f);
981}
982
983static void akitapda_class_init(ObjectClass *oc, void *data)
984{
985 MachineClass *mc = MACHINE_CLASS(oc);
986
987 mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)";
988 mc->init = akita_init;
989 mc->ignore_memory_transaction_failures = true;
990 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
991}
992
993static const TypeInfo akitapda_type = {
994 .name = MACHINE_TYPE_NAME("akita"),
995 .parent = TYPE_MACHINE,
996 .class_init = akitapda_class_init,
997};
998
999static void spitzpda_class_init(ObjectClass *oc, void *data)
1000{
1001 MachineClass *mc = MACHINE_CLASS(oc);
1002
1003 mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)";
1004 mc->init = spitz_init;
1005 mc->block_default_type = IF_IDE;
1006 mc->ignore_memory_transaction_failures = true;
1007 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1008}
1009
1010static const TypeInfo spitzpda_type = {
1011 .name = MACHINE_TYPE_NAME("spitz"),
1012 .parent = TYPE_MACHINE,
1013 .class_init = spitzpda_class_init,
1014};
1015
1016static void borzoipda_class_init(ObjectClass *oc, void *data)
1017{
1018 MachineClass *mc = MACHINE_CLASS(oc);
1019
1020 mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)";
1021 mc->init = borzoi_init;
1022 mc->block_default_type = IF_IDE;
1023 mc->ignore_memory_transaction_failures = true;
1024 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1025}
1026
1027static const TypeInfo borzoipda_type = {
1028 .name = MACHINE_TYPE_NAME("borzoi"),
1029 .parent = TYPE_MACHINE,
1030 .class_init = borzoipda_class_init,
1031};
1032
1033static void terrierpda_class_init(ObjectClass *oc, void *data)
1034{
1035 MachineClass *mc = MACHINE_CLASS(oc);
1036
1037 mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)";
1038 mc->init = terrier_init;
1039 mc->block_default_type = IF_IDE;
1040 mc->ignore_memory_transaction_failures = true;
1041 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5");
1042}
1043
1044static const TypeInfo terrierpda_type = {
1045 .name = MACHINE_TYPE_NAME("terrier"),
1046 .parent = TYPE_MACHINE,
1047 .class_init = terrierpda_class_init,
1048};
1049
1050static void spitz_machine_init(void)
1051{
1052 type_register_static(&akitapda_type);
1053 type_register_static(&spitzpda_type);
1054 type_register_static(&borzoipda_type);
1055 type_register_static(&terrierpda_type);
1056}
1057
1058type_init(spitz_machine_init)
1059
1060static bool is_version_0(void *opaque, int version_id)
1061{
1062 return version_id == 0;
1063}
1064
1065static VMStateDescription vmstate_sl_nand_info = {
1066 .name = "sl-nand",
1067 .version_id = 0,
1068 .minimum_version_id = 0,
1069 .fields = (VMStateField[]) {
1070 VMSTATE_UINT8(ctl, SLNANDState),
1071 VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1072 VMSTATE_END_OF_LIST(),
1073 },
1074};
1075
1076static Property sl_nand_properties[] = {
1077 DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1078 DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1079 DEFINE_PROP_END_OF_LIST(),
1080};
1081
1082static void sl_nand_class_init(ObjectClass *klass, void *data)
1083{
1084 DeviceClass *dc = DEVICE_CLASS(klass);
1085
1086 dc->vmsd = &vmstate_sl_nand_info;
1087 dc->props = sl_nand_properties;
1088 dc->realize = sl_nand_realize;
1089
1090 dc->user_creatable = false;
1091}
1092
1093static const TypeInfo sl_nand_info = {
1094 .name = TYPE_SL_NAND,
1095 .parent = TYPE_SYS_BUS_DEVICE,
1096 .instance_size = sizeof(SLNANDState),
1097 .instance_init = sl_nand_init,
1098 .class_init = sl_nand_class_init,
1099};
1100
1101static VMStateDescription vmstate_spitz_kbd = {
1102 .name = "spitz-keyboard",
1103 .version_id = 1,
1104 .minimum_version_id = 0,
1105 .post_load = spitz_keyboard_post_load,
1106 .fields = (VMStateField[]) {
1107 VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1108 VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1109 VMSTATE_UNUSED_TEST(is_version_0, 5),
1110 VMSTATE_END_OF_LIST(),
1111 },
1112};
1113
1114static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
1115{
1116 DeviceClass *dc = DEVICE_CLASS(klass);
1117
1118 dc->vmsd = &vmstate_spitz_kbd;
1119}
1120
1121static const TypeInfo spitz_keyboard_info = {
1122 .name = TYPE_SPITZ_KEYBOARD,
1123 .parent = TYPE_SYS_BUS_DEVICE,
1124 .instance_size = sizeof(SpitzKeyboardState),
1125 .instance_init = spitz_keyboard_init,
1126 .class_init = spitz_keyboard_class_init,
1127};
1128
1129static const VMStateDescription vmstate_corgi_ssp_regs = {
1130 .name = "corgi-ssp",
1131 .version_id = 2,
1132 .minimum_version_id = 2,
1133 .fields = (VMStateField[]) {
1134 VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState),
1135 VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1136 VMSTATE_END_OF_LIST(),
1137 }
1138};
1139
1140static void corgi_ssp_class_init(ObjectClass *klass, void *data)
1141{
1142 DeviceClass *dc = DEVICE_CLASS(klass);
1143 SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1144
1145 k->realize = corgi_ssp_realize;
1146 k->transfer = corgi_ssp_transfer;
1147 dc->vmsd = &vmstate_corgi_ssp_regs;
1148}
1149
1150static const TypeInfo corgi_ssp_info = {
1151 .name = "corgi-ssp",
1152 .parent = TYPE_SSI_SLAVE,
1153 .instance_size = sizeof(CorgiSSPState),
1154 .class_init = corgi_ssp_class_init,
1155};
1156
1157static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1158 .name = "spitz-lcdtg",
1159 .version_id = 1,
1160 .minimum_version_id = 1,
1161 .fields = (VMStateField[]) {
1162 VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG),
1163 VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1164 VMSTATE_UINT32(bl_power, SpitzLCDTG),
1165 VMSTATE_END_OF_LIST(),
1166 }
1167};
1168
1169static void spitz_lcdtg_class_init(ObjectClass *klass, void *data)
1170{
1171 DeviceClass *dc = DEVICE_CLASS(klass);
1172 SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1173
1174 k->realize = spitz_lcdtg_realize;
1175 k->transfer = spitz_lcdtg_transfer;
1176 dc->vmsd = &vmstate_spitz_lcdtg_regs;
1177}
1178
1179static const TypeInfo spitz_lcdtg_info = {
1180 .name = "spitz-lcdtg",
1181 .parent = TYPE_SSI_SLAVE,
1182 .instance_size = sizeof(SpitzLCDTG),
1183 .class_init = spitz_lcdtg_class_init,
1184};
1185
1186static void spitz_register_types(void)
1187{
1188 type_register_static(&corgi_ssp_info);
1189 type_register_static(&spitz_lcdtg_info);
1190 type_register_static(&spitz_keyboard_info);
1191 type_register_static(&sl_nand_info);
1192}
1193
1194type_init(spitz_register_types)
1195
