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12#include "qemu/osdep.h"
13#include "qemu/units.h"
14#include "qemu-common.h"
15#include "e500.h"
16#include "hw/net/fsl_etsec/etsec.h"
17#include "hw/boards.h"
18#include "sysemu/device_tree.h"
19#include "sysemu/kvm.h"
20#include "hw/sysbus.h"
21#include "hw/pci/pci.h"
22#include "hw/ppc/openpic.h"
23#include "kvm_ppc.h"
24
25static void e500plat_fixup_devtree(void *fdt)
26{
27 const char model[] = "QEMU ppce500";
28 const char compatible[] = "fsl,qemu-e500";
29
30 qemu_fdt_setprop(fdt, "/", "model", model, sizeof(model));
31 qemu_fdt_setprop(fdt, "/", "compatible", compatible,
32 sizeof(compatible));
33}
34
35static void e500plat_init(MachineState *machine)
36{
37 PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(machine);
38
39
40 if (kvm_enabled() && !kvmppc_has_cap_epr()) {
41 pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_20;
42 }
43
44 ppce500_init(machine);
45}
46
47static void e500plat_machine_device_plug_cb(HotplugHandler *hotplug_dev,
48 DeviceState *dev, Error **errp)
49{
50 PPCE500MachineState *pms = PPCE500_MACHINE(hotplug_dev);
51
52 if (pms->pbus_dev) {
53 if (object_dynamic_cast(OBJECT(dev), TYPE_SYS_BUS_DEVICE)) {
54 platform_bus_link_device(pms->pbus_dev, SYS_BUS_DEVICE(dev));
55 }
56 }
57}
58
59static
60HotplugHandler *e500plat_machine_get_hotpug_handler(MachineState *machine,
61 DeviceState *dev)
62{
63 if (object_dynamic_cast(OBJECT(dev), TYPE_SYS_BUS_DEVICE)) {
64 return HOTPLUG_HANDLER(machine);
65 }
66
67 return NULL;
68}
69
70#define TYPE_E500PLAT_MACHINE MACHINE_TYPE_NAME("ppce500")
71
72static void e500plat_machine_class_init(ObjectClass *oc, void *data)
73{
74 PPCE500MachineClass *pmc = PPCE500_MACHINE_CLASS(oc);
75 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
76 MachineClass *mc = MACHINE_CLASS(oc);
77
78 assert(!mc->get_hotplug_handler);
79 mc->get_hotplug_handler = e500plat_machine_get_hotpug_handler;
80 hc->plug = e500plat_machine_device_plug_cb;
81
82 pmc->pci_first_slot = 0x1;
83 pmc->pci_nr_slots = PCI_SLOT_MAX - 1;
84 pmc->fixup_devtree = e500plat_fixup_devtree;
85 pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_42;
86 pmc->has_mpc8xxx_gpio = true;
87 pmc->has_platform_bus = true;
88 pmc->platform_bus_base = 0xf00000000ULL;
89 pmc->platform_bus_size = 128 * MiB;
90 pmc->platform_bus_first_irq = 5;
91 pmc->platform_bus_num_irqs = 10;
92 pmc->ccsrbar_base = 0xFE0000000ULL;
93 pmc->pci_pio_base = 0xFE1000000ULL;
94 pmc->pci_mmio_base = 0xC00000000ULL;
95 pmc->pci_mmio_bus_base = 0xE0000000ULL;
96 pmc->spin_base = 0xFEF000000ULL;
97
98 mc->desc = "generic paravirt e500 platform";
99 mc->init = e500plat_init;
100 mc->max_cpus = 32;
101 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("e500v2_v30");
102 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_ETSEC_COMMON);
103 }
104
105static const TypeInfo e500plat_info = {
106 .name = TYPE_E500PLAT_MACHINE,
107 .parent = TYPE_PPCE500_MACHINE,
108 .class_init = e500plat_machine_class_init,
109 .interfaces = (InterfaceInfo[]) {
110 { TYPE_HOTPLUG_HANDLER },
111 { }
112 }
113};
114
115static void e500plat_register_types(void)
116{
117 type_register_static(&e500plat_info);
118}
119type_init(e500plat_register_types)
120