LXR qemu/hw/timer/m48t59-internal.h

   1/*
   2 * QEMU M48T59 and M48T08 NVRAM emulation (common header)
   3 *
   4 * Copyright (c) 2003-2005, 2007 Jocelyn Mayer
   5 * Copyright (c) 2013 Hervé Poussineau
   6 *
   7 * Permission is hereby granted, free of charge, to any person obtaining a copy
   8 * of this software and associated documentation files (the "Software"), to deal
   9 * in the Software without restriction, including without limitation the rights
  10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11 * copies of the Software, and to permit persons to whom the Software is
  12 * furnished to do so, subject to the following conditions:
  13 *
  14 * The above copyright notice and this permission notice shall be included in
  15 * all copies or substantial portions of the Software.
  16 *
  17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23 * THE SOFTWARE.
  24 */
  25#ifndef HW_M48T59_INTERNAL_H
  26#define HW_M48T59_INTERNAL_H 1
  27
  28#define M48T59_DEBUG 0
  29
  30#define NVRAM_PRINTF(fmt, ...) do { \
  31    if (M48T59_DEBUG) { printf(fmt , ## __VA_ARGS__); } } while (0)
  32
  33/*
  34 * The M48T02, M48T08 and M48T59 chips are very similar. The newer '59 has
  35 * alarm and a watchdog timer and related control registers. In the
  36 * PPC platform there is also a nvram lock function.
  37 */
  38
  39typedef struct M48txxInfo {
  40    const char *bus_name;
  41    uint32_t model; /* 2 = m48t02, 8 = m48t08, 59 = m48t59 */
  42    uint32_t size;
  43} M48txxInfo;
  44
  45typedef struct M48t59State {
  46    /* Hardware parameters */
  47    qemu_irq IRQ;
  48    MemoryRegion iomem;
  49    uint32_t size;
  50    int32_t base_year;
  51    /* RTC management */
  52    time_t   time_offset;
  53    time_t   stop_time;
  54    /* Alarm & watchdog */
  55    struct tm alarm;
  56    QEMUTimer *alrm_timer;
  57    QEMUTimer *wd_timer;
  58    /* NVRAM storage */
  59    uint8_t *buffer;
  60    /* Model parameters */
  61    uint32_t model; /* 2 = m48t02, 8 = m48t08, 59 = m48t59 */
  62    /* NVRAM storage */
  63    uint16_t addr;
  64    uint8_t  lock;
  65} M48t59State;
  66
  67uint32_t m48t59_read(M48t59State *NVRAM, uint32_t addr);
  68void m48t59_write(M48t59State *NVRAM, uint32_t addr, uint32_t val);
  69void m48t59_reset_common(M48t59State *NVRAM);
  70void m48t59_realize_common(M48t59State *s, Error **errp);
  71
  72static inline void m48t59_toggle_lock(M48t59State *NVRAM, int lock)
  73{
  74    NVRAM->lock ^= 1 << lock;
  75}
  76
  77extern const MemoryRegionOps m48t59_io_ops;
  78
  79#endif /* HW_M48T59_INTERNAL_H */
  80