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30#ifndef QEMU_ARM_VIRT_H
31#define QEMU_ARM_VIRT_H
32
33#include "qemu-common.h"
34#include "exec/hwaddr.h"
35#include "qemu/notify.h"
36#include "hw/boards.h"
37#include "hw/arm/arm.h"
38#include "sysemu/kvm.h"
39#include "hw/intc/arm_gicv3_common.h"
40
41#define NUM_GICV2M_SPIS 64
42#define NUM_VIRTIO_TRANSPORTS 32
43#define NUM_SMMU_IRQS 4
44
45#define ARCH_GIC_MAINT_IRQ 9
46
47#define ARCH_TIMER_VIRT_IRQ 11
48#define ARCH_TIMER_S_EL1_IRQ 13
49#define ARCH_TIMER_NS_EL1_IRQ 14
50#define ARCH_TIMER_NS_EL2_IRQ 10
51
52#define VIRTUAL_PMU_IRQ 7
53
54#define PPI(irq) ((irq) + 16)
55
56enum {
57 VIRT_FLASH,
58 VIRT_MEM,
59 VIRT_CPUPERIPHS,
60 VIRT_GIC_DIST,
61 VIRT_GIC_CPU,
62 VIRT_GIC_V2M,
63 VIRT_GIC_HYP,
64 VIRT_GIC_VCPU,
65 VIRT_GIC_ITS,
66 VIRT_GIC_REDIST,
67 VIRT_GIC_REDIST2,
68 VIRT_SMMU,
69 VIRT_UART,
70 VIRT_MMIO,
71 VIRT_RTC,
72 VIRT_FW_CFG,
73 VIRT_PCIE,
74 VIRT_PCIE_MMIO,
75 VIRT_PCIE_PIO,
76 VIRT_PCIE_ECAM,
77 VIRT_PCIE_ECAM_HIGH,
78 VIRT_PLATFORM_BUS,
79 VIRT_PCIE_MMIO_HIGH,
80 VIRT_GPIO,
81 VIRT_SECURE_UART,
82 VIRT_SECURE_MEM,
83};
84
85typedef enum VirtIOMMUType {
86 VIRT_IOMMU_NONE,
87 VIRT_IOMMU_SMMUV3,
88 VIRT_IOMMU_VIRTIO,
89} VirtIOMMUType;
90
91typedef struct MemMapEntry {
92 hwaddr base;
93 hwaddr size;
94} MemMapEntry;
95
96typedef struct {
97 MachineClass parent;
98 bool disallow_affinity_adjustment;
99 bool no_its;
100 bool no_pmu;
101 bool claim_edge_triggered_timers;
102 bool smbios_old_sys_ver;
103 bool no_highmem_ecam;
104} VirtMachineClass;
105
106typedef struct {
107 MachineState parent;
108 Notifier machine_done;
109 DeviceState *platform_bus_dev;
110 FWCfgState *fw_cfg;
111 bool secure;
112 bool highmem;
113 bool highmem_ecam;
114 bool its;
115 bool virt;
116 int32_t gic_version;
117 VirtIOMMUType iommu;
118 struct arm_boot_info bootinfo;
119 const MemMapEntry *memmap;
120 const int *irqmap;
121 int smp_cpus;
122 void *fdt;
123 int fdt_size;
124 uint32_t clock_phandle;
125 uint32_t gic_phandle;
126 uint32_t msi_phandle;
127 uint32_t iommu_phandle;
128 int psci_conduit;
129} VirtMachineState;
130
131#define VIRT_ECAM_ID(high) (high ? VIRT_PCIE_ECAM_HIGH : VIRT_PCIE_ECAM)
132
133#define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt")
134#define VIRT_MACHINE(obj) \
135 OBJECT_CHECK(VirtMachineState, (obj), TYPE_VIRT_MACHINE)
136#define VIRT_MACHINE_GET_CLASS(obj) \
137 OBJECT_GET_CLASS(VirtMachineClass, obj, TYPE_VIRT_MACHINE)
138#define VIRT_MACHINE_CLASS(klass) \
139 OBJECT_CLASS_CHECK(VirtMachineClass, klass, TYPE_VIRT_MACHINE)
140
141void virt_acpi_setup(VirtMachineState *vms);
142
143
144static inline int virt_gicv3_redist_region_count(VirtMachineState *vms)
145{
146 uint32_t redist0_capacity =
147 vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE;
148
149 assert(vms->gic_version == 3);
150
151 return vms->smp_cpus > redist0_capacity ? 2 : 1;
152}
153
154#endif
155