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20#include "qemu/osdep.h"
21#include "qemu/units.h"
22#include "hw/hw.h"
23#include "qemu/error-report.h"
24#include "ui/console.h"
25#include "ui/pixel_ops.h"
26#include "trace.h"
27#include "hw/sysbus.h"
28
29typedef struct G364State {
30
31 uint8_t *vram;
32 uint32_t vram_size;
33 qemu_irq irq;
34 MemoryRegion mem_vram;
35 MemoryRegion mem_ctrl;
36
37 uint8_t color_palette[256][3];
38 uint8_t cursor_palette[3][3];
39 uint16_t cursor[512];
40 uint32_t cursor_position;
41 uint32_t ctla;
42 uint32_t top_of_screen;
43 uint32_t width, height;
44
45 QemuConsole *con;
46 int depth;
47 int blanked;
48} G364State;
49
50#define REG_BOOT 0x000000
51#define REG_DISPLAY 0x000118
52#define REG_VDISPLAY 0x000150
53#define REG_CTLA 0x000300
54#define REG_TOP 0x000400
55#define REG_CURS_PAL 0x000508
56#define REG_CURS_POS 0x000638
57#define REG_CLR_PAL 0x000800
58#define REG_CURS_PAT 0x001000
59#define REG_RESET 0x100000
60
61#define CTLA_FORCE_BLANK 0x00000400
62#define CTLA_NO_CURSOR 0x00800000
63
64#define G364_PAGE_SIZE 4096
65
66static inline int check_dirty(G364State *s, DirtyBitmapSnapshot *snap, ram_addr_t page)
67{
68 return memory_region_snapshot_get_dirty(&s->mem_vram, snap, page, G364_PAGE_SIZE);
69}
70
71static void g364fb_draw_graphic8(G364State *s)
72{
73 DisplaySurface *surface = qemu_console_surface(s->con);
74 DirtyBitmapSnapshot *snap;
75 int i, w;
76 uint8_t *vram;
77 uint8_t *data_display, *dd;
78 ram_addr_t page;
79 int x, y;
80 int xmin, xmax;
81 int ymin, ymax;
82 int xcursor, ycursor;
83 unsigned int (*rgb_to_pixel)(unsigned int r, unsigned int g, unsigned int b);
84
85 switch (surface_bits_per_pixel(surface)) {
86 case 8:
87 rgb_to_pixel = rgb_to_pixel8;
88 w = 1;
89 break;
90 case 15:
91 rgb_to_pixel = rgb_to_pixel15;
92 w = 2;
93 break;
94 case 16:
95 rgb_to_pixel = rgb_to_pixel16;
96 w = 2;
97 break;
98 case 32:
99 rgb_to_pixel = rgb_to_pixel32;
100 w = 4;
101 break;
102 default:
103 hw_error("g364: unknown host depth %d",
104 surface_bits_per_pixel(surface));
105 return;
106 }
107
108 page = 0;
109
110 x = y = 0;
111 xmin = s->width;
112 xmax = 0;
113 ymin = s->height;
114 ymax = 0;
115
116 if (!(s->ctla & CTLA_NO_CURSOR)) {
117 xcursor = s->cursor_position >> 12;
118 ycursor = s->cursor_position & 0xfff;
119 } else {
120 xcursor = ycursor = -65;
121 }
122
123 vram = s->vram + s->top_of_screen;
124
125 data_display = dd = surface_data(surface);
126 snap = memory_region_snapshot_and_clear_dirty(&s->mem_vram, 0, s->vram_size,
127 DIRTY_MEMORY_VGA);
128 while (y < s->height) {
129 if (check_dirty(s, snap, page)) {
130 if (y < ymin)
131 ymin = ymax = y;
132 if (x < xmin)
133 xmin = x;
134 for (i = 0; i < G364_PAGE_SIZE; i++) {
135 uint8_t index;
136 unsigned int color;
137 if (unlikely((y >= ycursor && y < ycursor + 64) &&
138 (x >= xcursor && x < xcursor + 64))) {
139
140 int xdiff = x - xcursor;
141 uint16_t curs = s->cursor[(y - ycursor) * 8 + xdiff / 8];
142 int op = (curs >> ((xdiff & 7) * 2)) & 3;
143 if (likely(op == 0)) {
144
145 index = *vram;
146 color = (*rgb_to_pixel)(
147 s->color_palette[index][0],
148 s->color_palette[index][1],
149 s->color_palette[index][2]);
150 } else {
151
152 index = op - 1;
153 color = (*rgb_to_pixel)(
154 s->cursor_palette[index][0],
155 s->cursor_palette[index][1],
156 s->cursor_palette[index][2]);
157 }
158 } else {
159
160 index = *vram;
161 color = (*rgb_to_pixel)(
162 s->color_palette[index][0],
163 s->color_palette[index][1],
164 s->color_palette[index][2]);
165 }
166 memcpy(dd, &color, w);
167 dd += w;
168 x++;
169 vram++;
170 if (x == s->width) {
171 xmax = s->width - 1;
172 y++;
173 if (y == s->height) {
174 ymax = s->height - 1;
175 goto done;
176 }
177 data_display = dd = data_display + surface_stride(surface);
178 xmin = 0;
179 x = 0;
180 }
181 }
182 if (x > xmax)
183 xmax = x;
184 if (y > ymax)
185 ymax = y;
186 } else {
187 int dy;
188 if (xmax || ymax) {
189 dpy_gfx_update(s->con, xmin, ymin,
190 xmax - xmin + 1, ymax - ymin + 1);
191 xmin = s->width;
192 xmax = 0;
193 ymin = s->height;
194 ymax = 0;
195 }
196 x += G364_PAGE_SIZE;
197 dy = x / s->width;
198 x = x % s->width;
199 y += dy;
200 vram += G364_PAGE_SIZE;
201 data_display += dy * surface_stride(surface);
202 dd = data_display + x * w;
203 }
204 page += G364_PAGE_SIZE;
205 }
206
207done:
208 if (xmax || ymax) {
209 dpy_gfx_update(s->con, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1);
210 }
211 g_free(snap);
212}
213
214static void g364fb_draw_blank(G364State *s)
215{
216 DisplaySurface *surface = qemu_console_surface(s->con);
217 int i, w;
218 uint8_t *d;
219
220 if (s->blanked) {
221
222 return;
223 }
224
225 w = s->width * surface_bytes_per_pixel(surface);
226 d = surface_data(surface);
227 for (i = 0; i < s->height; i++) {
228 memset(d, 0, w);
229 d += surface_stride(surface);
230 }
231
232 dpy_gfx_update_full(s->con);
233 s->blanked = 1;
234}
235
236static void g364fb_update_display(void *opaque)
237{
238 G364State *s = opaque;
239 DisplaySurface *surface = qemu_console_surface(s->con);
240
241 qemu_flush_coalesced_mmio_buffer();
242
243 if (s->width == 0 || s->height == 0)
244 return;
245
246 if (s->width != surface_width(surface) ||
247 s->height != surface_height(surface)) {
248 qemu_console_resize(s->con, s->width, s->height);
249 }
250
251 if (s->ctla & CTLA_FORCE_BLANK) {
252 g364fb_draw_blank(s);
253 } else if (s->depth == 8) {
254 g364fb_draw_graphic8(s);
255 } else {
256 error_report("g364: unknown guest depth %d", s->depth);
257 }
258
259 qemu_irq_raise(s->irq);
260}
261
262static inline void g364fb_invalidate_display(void *opaque)
263{
264 G364State *s = opaque;
265
266 s->blanked = 0;
267 memory_region_set_dirty(&s->mem_vram, 0, s->vram_size);
268}
269
270static void g364fb_reset(G364State *s)
271{
272 qemu_irq_lower(s->irq);
273
274 memset(s->color_palette, 0, sizeof(s->color_palette));
275 memset(s->cursor_palette, 0, sizeof(s->cursor_palette));
276 memset(s->cursor, 0, sizeof(s->cursor));
277 s->cursor_position = 0;
278 s->ctla = 0;
279 s->top_of_screen = 0;
280 s->width = s->height = 0;
281 memset(s->vram, 0, s->vram_size);
282 g364fb_invalidate_display(s);
283}
284
285
286static uint64_t g364fb_ctrl_read(void *opaque,
287 hwaddr addr,
288 unsigned int size)
289{
290 G364State *s = opaque;
291 uint32_t val;
292
293 if (addr >= REG_CURS_PAT && addr < REG_CURS_PAT + 0x1000) {
294
295 int idx = (addr - REG_CURS_PAT) >> 3;
296 val = s->cursor[idx];
297 } else if (addr >= REG_CURS_PAL && addr < REG_CURS_PAL + 0x18) {
298
299 int idx = (addr - REG_CURS_PAL) >> 3;
300 val = ((uint32_t)s->cursor_palette[idx][0] << 16);
301 val |= ((uint32_t)s->cursor_palette[idx][1] << 8);
302 val |= ((uint32_t)s->cursor_palette[idx][2] << 0);
303 } else {
304 switch (addr) {
305 case REG_DISPLAY:
306 val = s->width / 4;
307 break;
308 case REG_VDISPLAY:
309 val = s->height * 2;
310 break;
311 case REG_CTLA:
312 val = s->ctla;
313 break;
314 default:
315 {
316 error_report("g364: invalid read at [" TARGET_FMT_plx "]",
317 addr);
318 val = 0;
319 break;
320 }
321 }
322 }
323
324 trace_g364fb_read(addr, val);
325
326 return val;
327}
328
329static void g364fb_update_depth(G364State *s)
330{
331 static const int depths[8] = { 1, 2, 4, 8, 15, 16, 0 };
332 s->depth = depths[(s->ctla & 0x00700000) >> 20];
333}
334
335static void g364_invalidate_cursor_position(G364State *s)
336{
337 DisplaySurface *surface = qemu_console_surface(s->con);
338 int ymin, ymax, start, end;
339
340
341 ymin = s->cursor_position & 0xfff;
342 ymax = MIN(s->height, ymin + 64);
343 start = ymin * surface_stride(surface);
344 end = (ymax + 1) * surface_stride(surface);
345
346 memory_region_set_dirty(&s->mem_vram, start, end - start);
347}
348
349static void g364fb_ctrl_write(void *opaque,
350 hwaddr addr,
351 uint64_t val,
352 unsigned int size)
353{
354 G364State *s = opaque;
355
356 trace_g364fb_write(addr, val);
357
358 if (addr >= REG_CLR_PAL && addr < REG_CLR_PAL + 0x800) {
359
360 int idx = (addr - REG_CLR_PAL) >> 3;
361 s->color_palette[idx][0] = (val >> 16) & 0xff;
362 s->color_palette[idx][1] = (val >> 8) & 0xff;
363 s->color_palette[idx][2] = val & 0xff;
364 g364fb_invalidate_display(s);
365 } else if (addr >= REG_CURS_PAT && addr < REG_CURS_PAT + 0x1000) {
366
367 int idx = (addr - REG_CURS_PAT) >> 3;
368 s->cursor[idx] = val;
369 g364fb_invalidate_display(s);
370 } else if (addr >= REG_CURS_PAL && addr < REG_CURS_PAL + 0x18) {
371
372 int idx = (addr - REG_CURS_PAL) >> 3;
373 s->cursor_palette[idx][0] = (val >> 16) & 0xff;
374 s->cursor_palette[idx][1] = (val >> 8) & 0xff;
375 s->cursor_palette[idx][2] = val & 0xff;
376 g364fb_invalidate_display(s);
377 } else {
378 switch (addr) {
379 case REG_BOOT:
380 case 0x00108:
381 case 0x00110:
382 case 0x00120:
383 case 0x00128:
384 case 0x00130:
385 case 0x00138:
386 case 0x00140:
387 case 0x00148:
388 case 0x00158:
389 case 0x00160:
390 case 0x00168:
391 case 0x00170:
392 case 0x00200:
393
394 break;
395 case REG_TOP:
396 s->top_of_screen = val;
397 g364fb_invalidate_display(s);
398 break;
399 case REG_DISPLAY:
400 s->width = val * 4;
401 break;
402 case REG_VDISPLAY:
403 s->height = val / 2;
404 break;
405 case REG_CTLA:
406 s->ctla = val;
407 g364fb_update_depth(s);
408 g364fb_invalidate_display(s);
409 break;
410 case REG_CURS_POS:
411 g364_invalidate_cursor_position(s);
412 s->cursor_position = val;
413 g364_invalidate_cursor_position(s);
414 break;
415 case REG_RESET:
416 g364fb_reset(s);
417 break;
418 default:
419 error_report("g364: invalid write of 0x%" PRIx64
420 " at [" TARGET_FMT_plx "]", val, addr);
421 break;
422 }
423 }
424 qemu_irq_lower(s->irq);
425}
426
427static const MemoryRegionOps g364fb_ctrl_ops = {
428 .read = g364fb_ctrl_read,
429 .write = g364fb_ctrl_write,
430 .endianness = DEVICE_LITTLE_ENDIAN,
431 .impl.min_access_size = 4,
432 .impl.max_access_size = 4,
433};
434
435static int g364fb_post_load(void *opaque, int version_id)
436{
437 G364State *s = opaque;
438
439
440 g364fb_update_depth(s);
441 g364fb_invalidate_display(s);
442
443 return 0;
444}
445
446static const VMStateDescription vmstate_g364fb = {
447 .name = "g364fb",
448 .version_id = 1,
449 .minimum_version_id = 1,
450 .post_load = g364fb_post_load,
451 .fields = (VMStateField[]) {
452 VMSTATE_VBUFFER_UINT32(vram, G364State, 1, NULL, vram_size),
453 VMSTATE_BUFFER_UNSAFE(color_palette, G364State, 0, 256 * 3),
454 VMSTATE_BUFFER_UNSAFE(cursor_palette, G364State, 0, 9),
455 VMSTATE_UINT16_ARRAY(cursor, G364State, 512),
456 VMSTATE_UINT32(cursor_position, G364State),
457 VMSTATE_UINT32(ctla, G364State),
458 VMSTATE_UINT32(top_of_screen, G364State),
459 VMSTATE_UINT32(width, G364State),
460 VMSTATE_UINT32(height, G364State),
461 VMSTATE_END_OF_LIST()
462 }
463};
464
465static const GraphicHwOps g364fb_ops = {
466 .invalidate = g364fb_invalidate_display,
467 .gfx_update = g364fb_update_display,
468};
469
470static void g364fb_init(DeviceState *dev, G364State *s)
471{
472 s->vram = g_malloc0(s->vram_size);
473
474 s->con = graphic_console_init(dev, 0, &g364fb_ops, s);
475
476 memory_region_init_io(&s->mem_ctrl, NULL, &g364fb_ctrl_ops, s, "ctrl", 0x180000);
477 memory_region_init_ram_ptr(&s->mem_vram, NULL, "vram",
478 s->vram_size, s->vram);
479 vmstate_register_ram(&s->mem_vram, dev);
480 memory_region_set_log(&s->mem_vram, true, DIRTY_MEMORY_VGA);
481}
482
483#define TYPE_G364 "sysbus-g364"
484#define G364(obj) OBJECT_CHECK(G364SysBusState, (obj), TYPE_G364)
485
486typedef struct {
487 SysBusDevice parent_obj;
488
489 G364State g364;
490} G364SysBusState;
491
492static int g364fb_sysbus_init(SysBusDevice *sbd)
493{
494 DeviceState *dev = DEVICE(sbd);
495 G364SysBusState *sbs = G364(dev);
496 G364State *s = &sbs->g364;
497
498 g364fb_init(dev, s);
499 sysbus_init_irq(sbd, &s->irq);
500 sysbus_init_mmio(sbd, &s->mem_ctrl);
501 sysbus_init_mmio(sbd, &s->mem_vram);
502
503 return 0;
504}
505
506static void g364fb_sysbus_reset(DeviceState *d)
507{
508 G364SysBusState *s = G364(d);
509
510 g364fb_reset(&s->g364);
511}
512
513static Property g364fb_sysbus_properties[] = {
514 DEFINE_PROP_UINT32("vram_size", G364SysBusState, g364.vram_size, 8 * MiB),
515 DEFINE_PROP_END_OF_LIST(),
516};
517
518static void g364fb_sysbus_class_init(ObjectClass *klass, void *data)
519{
520 DeviceClass *dc = DEVICE_CLASS(klass);
521 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
522
523 k->init = g364fb_sysbus_init;
524 set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
525 dc->desc = "G364 framebuffer";
526 dc->reset = g364fb_sysbus_reset;
527 dc->vmsd = &vmstate_g364fb;
528 dc->props = g364fb_sysbus_properties;
529}
530
531static const TypeInfo g364fb_sysbus_info = {
532 .name = TYPE_G364,
533 .parent = TYPE_SYS_BUS_DEVICE,
534 .instance_size = sizeof(G364SysBusState),
535 .class_init = g364fb_sysbus_class_init,
536};
537
538static void g364fb_register_types(void)
539{
540 type_register_static(&g364fb_sysbus_info);
541}
542
543type_init(g364fb_register_types)
544
