1#ifndef QEMU_HW_MILKYMIST_HW_H
2#define QEMU_HW_MILKYMIST_HW_H
3
4#include "hw/qdev.h"
5#include "net/net.h"
6
7static inline DeviceState *milkymist_uart_create(hwaddr base,
8 qemu_irq irq,
9 Chardev *chr)
10{
11 DeviceState *dev;
12
13 dev = qdev_create(NULL, "milkymist-uart");
14 qdev_prop_set_chr(dev, "chardev", chr);
15 qdev_init_nofail(dev);
16 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
17 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
18
19 return dev;
20}
21
22static inline DeviceState *milkymist_hpdmc_create(hwaddr base)
23{
24 DeviceState *dev;
25
26 dev = qdev_create(NULL, "milkymist-hpdmc");
27 qdev_init_nofail(dev);
28 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
29
30 return dev;
31}
32
33static inline DeviceState *milkymist_memcard_create(hwaddr base)
34{
35 DeviceState *dev;
36
37 dev = qdev_create(NULL, "milkymist-memcard");
38 qdev_init_nofail(dev);
39 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
40
41 return dev;
42}
43
44static inline DeviceState *milkymist_vgafb_create(hwaddr base,
45 uint32_t fb_offset, uint32_t fb_mask)
46{
47 DeviceState *dev;
48
49 dev = qdev_create(NULL, "milkymist-vgafb");
50 qdev_prop_set_uint32(dev, "fb_offset", fb_offset);
51 qdev_prop_set_uint32(dev, "fb_mask", fb_mask);
52 qdev_init_nofail(dev);
53 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
54
55 return dev;
56}
57
58static inline DeviceState *milkymist_sysctl_create(hwaddr base,
59 qemu_irq gpio_irq, qemu_irq timer0_irq, qemu_irq timer1_irq,
60 uint32_t freq_hz, uint32_t system_id, uint32_t capabilities,
61 uint32_t gpio_strappings)
62{
63 DeviceState *dev;
64
65 dev = qdev_create(NULL, "milkymist-sysctl");
66 qdev_prop_set_uint32(dev, "frequency", freq_hz);
67 qdev_prop_set_uint32(dev, "systemid", system_id);
68 qdev_prop_set_uint32(dev, "capabilities", capabilities);
69 qdev_prop_set_uint32(dev, "gpio_strappings", gpio_strappings);
70 qdev_init_nofail(dev);
71 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
72 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, gpio_irq);
73 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, timer0_irq);
74 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, timer1_irq);
75
76 return dev;
77}
78
79static inline DeviceState *milkymist_pfpu_create(hwaddr base,
80 qemu_irq irq)
81{
82 DeviceState *dev;
83
84 dev = qdev_create(NULL, "milkymist-pfpu");
85 qdev_init_nofail(dev);
86 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
87 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
88 return dev;
89}
90
91#ifdef CONFIG_OPENGL
92#include <X11/Xlib.h>
93#include <epoxy/gl.h>
94#include <epoxy/glx.h>
95static const int glx_fbconfig_attr[] = {
96 GLX_GREEN_SIZE, 5,
97 GLX_GREEN_SIZE, 6,
98 GLX_BLUE_SIZE, 5,
99 None
100};
101#endif
102
103static inline DeviceState *milkymist_tmu2_create(hwaddr base,
104 qemu_irq irq)
105{
106#ifdef CONFIG_OPENGL
107 DeviceState *dev;
108 Display *d;
109 GLXFBConfig *configs;
110 int nelements;
111 int ver_major, ver_minor;
112
113
114 d = XOpenDisplay(NULL);
115 if (d == NULL) {
116 return NULL;
117 }
118
119 if (!glXQueryVersion(d, &ver_major, &ver_minor)) {
120
121
122 XCloseDisplay(d);
123 return NULL;
124 }
125
126 if ((ver_major < 1) || ((ver_major == 1) && (ver_minor < 3))) {
127 printf("Your GLX version is %d.%d,"
128 "but TMU emulation needs at least 1.3. TMU disabled.\n",
129 ver_major, ver_minor);
130 XCloseDisplay(d);
131 return NULL;
132 }
133
134 configs = glXChooseFBConfig(d, 0, glx_fbconfig_attr, &nelements);
135 if (configs == NULL) {
136 XCloseDisplay(d);
137 return NULL;
138 }
139
140 XFree(configs);
141 XCloseDisplay(d);
142
143 dev = qdev_create(NULL, "milkymist-tmu2");
144 qdev_init_nofail(dev);
145 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
146 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
147
148 return dev;
149#else
150 return NULL;
151#endif
152}
153
154static inline DeviceState *milkymist_ac97_create(hwaddr base,
155 qemu_irq crrequest_irq, qemu_irq crreply_irq, qemu_irq dmar_irq,
156 qemu_irq dmaw_irq)
157{
158 DeviceState *dev;
159
160 dev = qdev_create(NULL, "milkymist-ac97");
161 qdev_init_nofail(dev);
162 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
163 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, crrequest_irq);
164 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, crreply_irq);
165 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, dmar_irq);
166 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 3, dmaw_irq);
167
168 return dev;
169}
170
171static inline DeviceState *milkymist_minimac2_create(hwaddr base,
172 hwaddr buffers_base, qemu_irq rx_irq, qemu_irq tx_irq)
173{
174 DeviceState *dev;
175
176 qemu_check_nic_model(&nd_table[0], "minimac2");
177 dev = qdev_create(NULL, "milkymist-minimac2");
178 qdev_set_nic_properties(dev, &nd_table[0]);
179 qdev_init_nofail(dev);
180 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
181 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, buffers_base);
182 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, rx_irq);
183 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, tx_irq);
184
185 return dev;
186}
187
188static inline DeviceState *milkymist_softusb_create(hwaddr base,
189 qemu_irq irq, uint32_t pmem_base, uint32_t pmem_size,
190 uint32_t dmem_base, uint32_t dmem_size)
191{
192 DeviceState *dev;
193
194 dev = qdev_create(NULL, "milkymist-softusb");
195 qdev_prop_set_uint32(dev, "pmem_size", pmem_size);
196 qdev_prop_set_uint32(dev, "dmem_size", dmem_size);
197 qdev_init_nofail(dev);
198 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
199 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, pmem_base);
200 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, dmem_base);
201 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
202
203 return dev;
204}
205
206#endif
207
