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25#include "qemu/osdep.h"
26#include "qemu/units.h"
27#include "hw/hw.h"
28#include "hw/pci/pci.h"
29#include "net/net.h"
30
31#include "e1000x_common.h"
32
33#include "trace.h"
34
35bool e1000x_rx_ready(PCIDevice *d, uint32_t *mac)
36{
37 bool link_up = mac[STATUS] & E1000_STATUS_LU;
38 bool rx_enabled = mac[RCTL] & E1000_RCTL_EN;
39 bool pci_master = d->config[PCI_COMMAND] & PCI_COMMAND_MASTER;
40
41 if (!link_up || !rx_enabled || !pci_master) {
42 trace_e1000x_rx_can_recv_disabled(link_up, rx_enabled, pci_master);
43 return false;
44 }
45
46 return true;
47}
48
49bool e1000x_is_vlan_packet(const uint8_t *buf, uint16_t vet)
50{
51 uint16_t eth_proto = lduw_be_p(buf + 12);
52 bool res = (eth_proto == vet);
53
54 trace_e1000x_vlan_is_vlan_pkt(res, eth_proto, vet);
55
56 return res;
57}
58
59bool e1000x_rx_group_filter(uint32_t *mac, const uint8_t *buf)
60{
61 static const int mta_shift[] = { 4, 3, 2, 0 };
62 uint32_t f, ra[2], *rp, rctl = mac[RCTL];
63
64 for (rp = mac + RA; rp < mac + RA + 32; rp += 2) {
65 if (!(rp[1] & E1000_RAH_AV)) {
66 continue;
67 }
68 ra[0] = cpu_to_le32(rp[0]);
69 ra[1] = cpu_to_le32(rp[1]);
70 if (!memcmp(buf, (uint8_t *)ra, 6)) {
71 trace_e1000x_rx_flt_ucast_match((int)(rp - mac - RA) / 2,
72 MAC_ARG(buf));
73 return true;
74 }
75 }
76 trace_e1000x_rx_flt_ucast_mismatch(MAC_ARG(buf));
77
78 f = mta_shift[(rctl >> E1000_RCTL_MO_SHIFT) & 3];
79 f = (((buf[5] << 8) | buf[4]) >> f) & 0xfff;
80 if (mac[MTA + (f >> 5)] & (1 << (f & 0x1f))) {
81 e1000x_inc_reg_if_not_full(mac, MPRC);
82 return true;
83 }
84
85 trace_e1000x_rx_flt_inexact_mismatch(MAC_ARG(buf),
86 (rctl >> E1000_RCTL_MO_SHIFT) & 3,
87 f >> 5,
88 mac[MTA + (f >> 5)]);
89
90 return false;
91}
92
93bool e1000x_hw_rx_enabled(uint32_t *mac)
94{
95 if (!(mac[STATUS] & E1000_STATUS_LU)) {
96 trace_e1000x_rx_link_down(mac[STATUS]);
97 return false;
98 }
99
100 if (!(mac[RCTL] & E1000_RCTL_EN)) {
101 trace_e1000x_rx_disabled(mac[RCTL]);
102 return false;
103 }
104
105 return true;
106}
107
108bool e1000x_is_oversized(uint32_t *mac, size_t size)
109{
110
111
112 static const int maximum_ethernet_vlan_size = 1522;
113
114
115 static const int maximum_ethernet_lpe_size = 16 * KiB;
116
117 if ((size > maximum_ethernet_lpe_size ||
118 (size > maximum_ethernet_vlan_size
119 && !(mac[RCTL] & E1000_RCTL_LPE)))
120 && !(mac[RCTL] & E1000_RCTL_SBP)) {
121 e1000x_inc_reg_if_not_full(mac, ROC);
122 trace_e1000x_rx_oversized(size);
123 return true;
124 }
125
126 return false;
127}
128
129void e1000x_restart_autoneg(uint32_t *mac, uint16_t *phy, QEMUTimer *timer)
130{
131 e1000x_update_regs_on_link_down(mac, phy);
132 trace_e1000x_link_negotiation_start();
133 timer_mod(timer, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + 500);
134}
135
136void e1000x_reset_mac_addr(NICState *nic, uint32_t *mac_regs,
137 uint8_t *mac_addr)
138{
139 int i;
140
141 mac_regs[RA] = 0;
142 mac_regs[RA + 1] = E1000_RAH_AV;
143 for (i = 0; i < 4; i++) {
144 mac_regs[RA] |= mac_addr[i] << (8 * i);
145 mac_regs[RA + 1] |=
146 (i < 2) ? mac_addr[i + 4] << (8 * i) : 0;
147 }
148
149 qemu_format_nic_info_str(qemu_get_queue(nic), mac_addr);
150 trace_e1000x_mac_indicate(MAC_ARG(mac_addr));
151}
152
153void e1000x_update_regs_on_autoneg_done(uint32_t *mac, uint16_t *phy)
154{
155 e1000x_update_regs_on_link_up(mac, phy);
156 phy[PHY_LP_ABILITY] |= MII_LPAR_LPACK;
157 phy[PHY_STATUS] |= MII_SR_AUTONEG_COMPLETE;
158 trace_e1000x_link_negotiation_done();
159}
160
161void
162e1000x_core_prepare_eeprom(uint16_t *eeprom,
163 const uint16_t *templ,
164 uint32_t templ_size,
165 uint16_t dev_id,
166 const uint8_t *macaddr)
167{
168 uint16_t checksum = 0;
169 int i;
170
171 memmove(eeprom, templ, templ_size);
172
173 for (i = 0; i < 3; i++) {
174 eeprom[i] = (macaddr[2 * i + 1] << 8) | macaddr[2 * i];
175 }
176
177 eeprom[11] = eeprom[13] = dev_id;
178
179 for (i = 0; i < EEPROM_CHECKSUM_REG; i++) {
180 checksum += eeprom[i];
181 }
182
183 checksum = (uint16_t) EEPROM_SUM - checksum;
184
185 eeprom[EEPROM_CHECKSUM_REG] = checksum;
186}
187
188uint32_t
189e1000x_rxbufsize(uint32_t rctl)
190{
191 rctl &= E1000_RCTL_BSEX | E1000_RCTL_SZ_16384 | E1000_RCTL_SZ_8192 |
192 E1000_RCTL_SZ_4096 | E1000_RCTL_SZ_2048 | E1000_RCTL_SZ_1024 |
193 E1000_RCTL_SZ_512 | E1000_RCTL_SZ_256;
194 switch (rctl) {
195 case E1000_RCTL_BSEX | E1000_RCTL_SZ_16384:
196 return 16384;
197 case E1000_RCTL_BSEX | E1000_RCTL_SZ_8192:
198 return 8192;
199 case E1000_RCTL_BSEX | E1000_RCTL_SZ_4096:
200 return 4096;
201 case E1000_RCTL_SZ_1024:
202 return 1024;
203 case E1000_RCTL_SZ_512:
204 return 512;
205 case E1000_RCTL_SZ_256:
206 return 256;
207 }
208 return 2048;
209}
210
211void
212e1000x_update_rx_total_stats(uint32_t *mac,
213 size_t data_size,
214 size_t data_fcs_size)
215{
216 static const int PRCregs[6] = { PRC64, PRC127, PRC255, PRC511,
217 PRC1023, PRC1522 };
218
219 e1000x_increase_size_stats(mac, PRCregs, data_fcs_size);
220 e1000x_inc_reg_if_not_full(mac, TPR);
221 mac[GPRC] = mac[TPR];
222
223
224
225
226
227 e1000x_grow_8reg_if_not_full(mac, TORL, data_size + 4);
228 mac[GORCL] = mac[TORL];
229 mac[GORCH] = mac[TORH];
230}
231
232void
233e1000x_increase_size_stats(uint32_t *mac, const int *size_regs, int size)
234{
235 if (size > 1023) {
236 e1000x_inc_reg_if_not_full(mac, size_regs[5]);
237 } else if (size > 511) {
238 e1000x_inc_reg_if_not_full(mac, size_regs[4]);
239 } else if (size > 255) {
240 e1000x_inc_reg_if_not_full(mac, size_regs[3]);
241 } else if (size > 127) {
242 e1000x_inc_reg_if_not_full(mac, size_regs[2]);
243 } else if (size > 64) {
244 e1000x_inc_reg_if_not_full(mac, size_regs[1]);
245 } else if (size == 64) {
246 e1000x_inc_reg_if_not_full(mac, size_regs[0]);
247 }
248}
249
250void
251e1000x_read_tx_ctx_descr(struct e1000_context_desc *d,
252 e1000x_txd_props *props)
253{
254 uint32_t op = le32_to_cpu(d->cmd_and_length);
255
256 props->ipcss = d->lower_setup.ip_fields.ipcss;
257 props->ipcso = d->lower_setup.ip_fields.ipcso;
258 props->ipcse = le16_to_cpu(d->lower_setup.ip_fields.ipcse);
259 props->tucss = d->upper_setup.tcp_fields.tucss;
260 props->tucso = d->upper_setup.tcp_fields.tucso;
261 props->tucse = le16_to_cpu(d->upper_setup.tcp_fields.tucse);
262 props->paylen = op & 0xfffff;
263 props->hdr_len = d->tcp_seg_setup.fields.hdr_len;
264 props->mss = le16_to_cpu(d->tcp_seg_setup.fields.mss);
265 props->ip = (op & E1000_TXD_CMD_IP) ? 1 : 0;
266 props->tcp = (op & E1000_TXD_CMD_TCP) ? 1 : 0;
267 props->tse = (op & E1000_TXD_CMD_TSE) ? 1 : 0;
268}
269
