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25#ifndef PPC405_H
26#define PPC405_H
27
28#include "hw/ppc/ppc4xx.h"
29
30
31typedef struct ppc4xx_bd_info_t ppc4xx_bd_info_t;
32struct ppc4xx_bd_info_t {
33 uint32_t bi_memstart;
34 uint32_t bi_memsize;
35 uint32_t bi_flashstart;
36 uint32_t bi_flashsize;
37 uint32_t bi_flashoffset;
38 uint32_t bi_sramstart;
39 uint32_t bi_sramsize;
40 uint32_t bi_bootflags;
41 uint32_t bi_ipaddr;
42 uint8_t bi_enetaddr[6];
43 uint16_t bi_ethspeed;
44 uint32_t bi_intfreq;
45 uint32_t bi_busfreq;
46 uint32_t bi_baudrate;
47 uint8_t bi_s_version[4];
48 uint8_t bi_r_version[32];
49 uint32_t bi_procfreq;
50 uint32_t bi_plb_busfreq;
51 uint32_t bi_pci_busfreq;
52 uint8_t bi_pci_enetaddr[6];
53 uint32_t bi_pci_enetaddr2[6];
54 uint32_t bi_opbfreq;
55 uint32_t bi_iic_fast[2];
56};
57
58
59ram_addr_t ppc405_set_bootinfo (CPUPPCState *env, ppc4xx_bd_info_t *bd,
60 uint32_t flags);
61
62void ppc4xx_plb_init(CPUPPCState *env);
63void ppc405_ebc_init(CPUPPCState *env);
64
65CPUPPCState *ppc405cr_init(MemoryRegion *address_space_mem,
66 MemoryRegion ram_memories[4],
67 hwaddr ram_bases[4],
68 hwaddr ram_sizes[4],
69 uint32_t sysclk, qemu_irq **picp,
70 int do_init);
71CPUPPCState *ppc405ep_init(MemoryRegion *address_space_mem,
72 MemoryRegion ram_memories[2],
73 hwaddr ram_bases[2],
74 hwaddr ram_sizes[2],
75 uint32_t sysclk, qemu_irq **picp,
76 int do_init);
77
78#endif
79