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14#include "qemu/osdep.h"
15#include "qemu/log.h"
16#include "sysemu/blockdev.h"
17#include "hw/sd/bcm2835_sdhost.h"
18#include "trace.h"
19
20#define TYPE_BCM2835_SDHOST_BUS "bcm2835-sdhost-bus"
21#define BCM2835_SDHOST_BUS(obj) \
22 OBJECT_CHECK(SDBus, (obj), TYPE_BCM2835_SDHOST_BUS)
23
24#define SDCMD 0x00
25#define SDARG 0x04
26#define SDTOUT 0x08
27#define SDCDIV 0x0c
28#define SDRSP0 0x10
29#define SDRSP1 0x14
30#define SDRSP2 0x18
31#define SDRSP3 0x1c
32#define SDHSTS 0x20
33#define SDVDD 0x30
34#define SDEDM 0x34
35#define SDHCFG 0x38
36#define SDHBCT 0x3c
37#define SDDATA 0x40
38#define SDHBLC 0x50
39
40#define SDCMD_NEW_FLAG 0x8000
41#define SDCMD_FAIL_FLAG 0x4000
42#define SDCMD_BUSYWAIT 0x800
43#define SDCMD_NO_RESPONSE 0x400
44#define SDCMD_LONG_RESPONSE 0x200
45#define SDCMD_WRITE_CMD 0x80
46#define SDCMD_READ_CMD 0x40
47#define SDCMD_CMD_MASK 0x3f
48
49#define SDCDIV_MAX_CDIV 0x7ff
50
51#define SDHSTS_BUSY_IRPT 0x400
52#define SDHSTS_BLOCK_IRPT 0x200
53#define SDHSTS_SDIO_IRPT 0x100
54#define SDHSTS_REW_TIME_OUT 0x80
55#define SDHSTS_CMD_TIME_OUT 0x40
56#define SDHSTS_CRC16_ERROR 0x20
57#define SDHSTS_CRC7_ERROR 0x10
58#define SDHSTS_FIFO_ERROR 0x08
59
60
61#define SDHSTS_DATA_FLAG 0x01
62
63#define SDHCFG_BUSY_IRPT_EN (1 << 10)
64#define SDHCFG_BLOCK_IRPT_EN (1 << 8)
65#define SDHCFG_SDIO_IRPT_EN (1 << 5)
66#define SDHCFG_DATA_IRPT_EN (1 << 4)
67#define SDHCFG_SLOW_CARD (1 << 3)
68#define SDHCFG_WIDE_EXT_BUS (1 << 2)
69#define SDHCFG_WIDE_INT_BUS (1 << 1)
70#define SDHCFG_REL_CMD_LINE (1 << 0)
71
72#define SDEDM_FORCE_DATA_MODE (1 << 19)
73#define SDEDM_CLOCK_PULSE (1 << 20)
74#define SDEDM_BYPASS (1 << 21)
75
76#define SDEDM_WRITE_THRESHOLD_SHIFT 9
77#define SDEDM_READ_THRESHOLD_SHIFT 14
78#define SDEDM_THRESHOLD_MASK 0x1f
79
80#define SDEDM_FSM_MASK 0xf
81#define SDEDM_FSM_IDENTMODE 0x0
82#define SDEDM_FSM_DATAMODE 0x1
83#define SDEDM_FSM_READDATA 0x2
84#define SDEDM_FSM_WRITEDATA 0x3
85#define SDEDM_FSM_READWAIT 0x4
86#define SDEDM_FSM_READCRC 0x5
87#define SDEDM_FSM_WRITECRC 0x6
88#define SDEDM_FSM_WRITEWAIT1 0x7
89#define SDEDM_FSM_POWERDOWN 0x8
90#define SDEDM_FSM_POWERUP 0x9
91#define SDEDM_FSM_WRITESTART1 0xa
92#define SDEDM_FSM_WRITESTART2 0xb
93#define SDEDM_FSM_GENPULSES 0xc
94#define SDEDM_FSM_WRITEWAIT2 0xd
95#define SDEDM_FSM_STARTPOWDOWN 0xf
96
97#define SDDATA_FIFO_WORDS 16
98
99static void bcm2835_sdhost_update_irq(BCM2835SDHostState *s)
100{
101 uint32_t irq = s->status &
102 (SDHSTS_BUSY_IRPT | SDHSTS_BLOCK_IRPT | SDHSTS_SDIO_IRPT);
103 trace_bcm2835_sdhost_update_irq(irq);
104 qemu_set_irq(s->irq, !!irq);
105}
106
107static void bcm2835_sdhost_send_command(BCM2835SDHostState *s)
108{
109 SDRequest request;
110 uint8_t rsp[16];
111 int rlen;
112
113 request.cmd = s->cmd & SDCMD_CMD_MASK;
114 request.arg = s->cmdarg;
115
116 rlen = sdbus_do_command(&s->sdbus, &request, rsp);
117 if (rlen < 0) {
118 goto error;
119 }
120 if (!(s->cmd & SDCMD_NO_RESPONSE)) {
121 if (rlen == 0 || (rlen == 4 && (s->cmd & SDCMD_LONG_RESPONSE))) {
122 goto error;
123 }
124 if (rlen != 4 && rlen != 16) {
125 goto error;
126 }
127 if (rlen == 4) {
128 s->rsp[0] = ldl_be_p(&rsp[0]);
129 s->rsp[1] = s->rsp[2] = s->rsp[3] = 0;
130 } else {
131 s->rsp[0] = ldl_be_p(&rsp[12]);
132 s->rsp[1] = ldl_be_p(&rsp[8]);
133 s->rsp[2] = ldl_be_p(&rsp[4]);
134 s->rsp[3] = ldl_be_p(&rsp[0]);
135 }
136 }
137
138
139
140 if ((s->cmd & SDCMD_BUSYWAIT) && (s->config & SDHCFG_BUSY_IRPT_EN)) {
141 s->status |= SDHSTS_BUSY_IRPT;
142 }
143 return;
144
145error:
146 s->cmd |= SDCMD_FAIL_FLAG;
147 s->status |= SDHSTS_CMD_TIME_OUT;
148}
149
150static void bcm2835_sdhost_fifo_push(BCM2835SDHostState *s, uint32_t value)
151{
152 int n;
153
154 if (s->fifo_len == BCM2835_SDHOST_FIFO_LEN) {
155
156 return;
157 }
158 n = (s->fifo_pos + s->fifo_len) & (BCM2835_SDHOST_FIFO_LEN - 1);
159 s->fifo_len++;
160 s->fifo[n] = value;
161}
162
163static uint32_t bcm2835_sdhost_fifo_pop(BCM2835SDHostState *s)
164{
165 uint32_t value;
166
167 if (s->fifo_len == 0) {
168
169 return 0;
170 }
171 value = s->fifo[s->fifo_pos];
172 s->fifo_len--;
173 s->fifo_pos = (s->fifo_pos + 1) & (BCM2835_SDHOST_FIFO_LEN - 1);
174 return value;
175}
176
177static void bcm2835_sdhost_fifo_run(BCM2835SDHostState *s)
178{
179 uint32_t value = 0;
180 int n;
181 int is_read;
182 int is_write;
183
184 is_read = (s->cmd & SDCMD_READ_CMD) != 0;
185 is_write = (s->cmd & SDCMD_WRITE_CMD) != 0;
186 if (s->datacnt != 0 && (is_write || sdbus_data_ready(&s->sdbus))) {
187 if (is_read) {
188 n = 0;
189 while (s->datacnt && s->fifo_len < BCM2835_SDHOST_FIFO_LEN) {
190 value |= (uint32_t)sdbus_read_data(&s->sdbus) << (n * 8);
191 s->datacnt--;
192 n++;
193 if (n == 4) {
194 bcm2835_sdhost_fifo_push(s, value);
195 s->status |= SDHSTS_DATA_FLAG;
196 if (s->config & SDHCFG_DATA_IRPT_EN) {
197 s->status |= SDHSTS_SDIO_IRPT;
198 }
199 n = 0;
200 value = 0;
201 }
202 }
203 if (n != 0) {
204 bcm2835_sdhost_fifo_push(s, value);
205 s->status |= SDHSTS_DATA_FLAG;
206 if (s->config & SDHCFG_DATA_IRPT_EN) {
207 s->status |= SDHSTS_SDIO_IRPT;
208 }
209 }
210 } else if (is_write) {
211 n = 0;
212 while (s->datacnt > 0 && (s->fifo_len > 0 || n > 0)) {
213 if (n == 0) {
214 value = bcm2835_sdhost_fifo_pop(s);
215 s->status |= SDHSTS_DATA_FLAG;
216 if (s->config & SDHCFG_DATA_IRPT_EN) {
217 s->status |= SDHSTS_SDIO_IRPT;
218 }
219 n = 4;
220 }
221 n--;
222 s->datacnt--;
223 sdbus_write_data(&s->sdbus, value & 0xff);
224 value >>= 8;
225 }
226 }
227 if (s->datacnt == 0) {
228 s->edm &= ~SDEDM_FSM_MASK;
229 s->edm |= SDEDM_FSM_DATAMODE;
230 trace_bcm2835_sdhost_edm_change("datacnt 0", s->edm);
231 }
232 if (is_write) {
233
234 if (s->hbct && s->datacnt % s->hbct == 0 &&
235 (s->config & SDHCFG_BLOCK_IRPT_EN)) {
236 s->status |= SDHSTS_BLOCK_IRPT;
237 }
238
239 s->status |= SDHSTS_DATA_FLAG;
240 if (s->config & SDHCFG_DATA_IRPT_EN) {
241 s->status |= SDHSTS_SDIO_IRPT;
242 }
243 }
244 }
245
246 bcm2835_sdhost_update_irq(s);
247
248 s->edm &= ~(0x1f << 4);
249 s->edm |= ((s->fifo_len & 0x1f) << 4);
250 trace_bcm2835_sdhost_edm_change("fifo run", s->edm);
251}
252
253static uint64_t bcm2835_sdhost_read(void *opaque, hwaddr offset,
254 unsigned size)
255{
256 BCM2835SDHostState *s = (BCM2835SDHostState *)opaque;
257 uint32_t res = 0;
258
259 switch (offset) {
260 case SDCMD:
261 res = s->cmd;
262 break;
263 case SDHSTS:
264 res = s->status;
265 break;
266 case SDRSP0:
267 res = s->rsp[0];
268 break;
269 case SDRSP1:
270 res = s->rsp[1];
271 break;
272 case SDRSP2:
273 res = s->rsp[2];
274 break;
275 case SDRSP3:
276 res = s->rsp[3];
277 break;
278 case SDEDM:
279 res = s->edm;
280 break;
281 case SDVDD:
282 res = s->vdd;
283 break;
284 case SDDATA:
285 res = bcm2835_sdhost_fifo_pop(s);
286 bcm2835_sdhost_fifo_run(s);
287 break;
288 case SDHBCT:
289 res = s->hbct;
290 break;
291 case SDHBLC:
292 res = s->hblc;
293 break;
294
295 default:
296 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
297 __func__, offset);
298 res = 0;
299 break;
300 }
301
302 trace_bcm2835_sdhost_read(offset, res, size);
303
304 return res;
305}
306
307static void bcm2835_sdhost_write(void *opaque, hwaddr offset,
308 uint64_t value, unsigned size)
309{
310 BCM2835SDHostState *s = (BCM2835SDHostState *)opaque;
311
312 trace_bcm2835_sdhost_write(offset, value, size);
313
314 switch (offset) {
315 case SDCMD:
316 s->cmd = value;
317 if (value & SDCMD_NEW_FLAG) {
318 bcm2835_sdhost_send_command(s);
319 bcm2835_sdhost_fifo_run(s);
320 s->cmd &= ~SDCMD_NEW_FLAG;
321 }
322 break;
323 case SDTOUT:
324 break;
325 case SDCDIV:
326 break;
327 case SDHSTS:
328 s->status &= ~value;
329 bcm2835_sdhost_update_irq(s);
330 break;
331 case SDARG:
332 s->cmdarg = value;
333 break;
334 case SDEDM:
335 if ((value & 0xf) == 0xf) {
336
337 value &= ~0xf;
338 }
339 s->edm = value;
340 trace_bcm2835_sdhost_edm_change("guest register write", s->edm);
341 break;
342 case SDHCFG:
343 s->config = value;
344 bcm2835_sdhost_fifo_run(s);
345 break;
346 case SDVDD:
347 s->vdd = value;
348 break;
349 case SDDATA:
350 bcm2835_sdhost_fifo_push(s, value);
351 bcm2835_sdhost_fifo_run(s);
352 break;
353 case SDHBCT:
354 s->hbct = value;
355 break;
356 case SDHBLC:
357 s->hblc = value;
358 s->datacnt = s->hblc * s->hbct;
359 bcm2835_sdhost_fifo_run(s);
360 break;
361
362 default:
363 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
364 __func__, offset);
365 break;
366 }
367}
368
369static const MemoryRegionOps bcm2835_sdhost_ops = {
370 .read = bcm2835_sdhost_read,
371 .write = bcm2835_sdhost_write,
372 .endianness = DEVICE_NATIVE_ENDIAN,
373};
374
375static const VMStateDescription vmstate_bcm2835_sdhost = {
376 .name = TYPE_BCM2835_SDHOST,
377 .version_id = 1,
378 .minimum_version_id = 1,
379 .fields = (VMStateField[]) {
380 VMSTATE_UINT32(cmd, BCM2835SDHostState),
381 VMSTATE_UINT32(cmdarg, BCM2835SDHostState),
382 VMSTATE_UINT32(status, BCM2835SDHostState),
383 VMSTATE_UINT32_ARRAY(rsp, BCM2835SDHostState, 4),
384 VMSTATE_UINT32(config, BCM2835SDHostState),
385 VMSTATE_UINT32(edm, BCM2835SDHostState),
386 VMSTATE_UINT32(vdd, BCM2835SDHostState),
387 VMSTATE_UINT32(hbct, BCM2835SDHostState),
388 VMSTATE_UINT32(hblc, BCM2835SDHostState),
389 VMSTATE_INT32(fifo_pos, BCM2835SDHostState),
390 VMSTATE_INT32(fifo_len, BCM2835SDHostState),
391 VMSTATE_UINT32_ARRAY(fifo, BCM2835SDHostState, BCM2835_SDHOST_FIFO_LEN),
392 VMSTATE_UINT32(datacnt, BCM2835SDHostState),
393 VMSTATE_END_OF_LIST()
394 }
395};
396
397static void bcm2835_sdhost_init(Object *obj)
398{
399 BCM2835SDHostState *s = BCM2835_SDHOST(obj);
400
401 qbus_create_inplace(&s->sdbus, sizeof(s->sdbus),
402 TYPE_BCM2835_SDHOST_BUS, DEVICE(s), "sd-bus");
403
404 memory_region_init_io(&s->iomem, obj, &bcm2835_sdhost_ops, s,
405 TYPE_BCM2835_SDHOST, 0x1000);
406 sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem);
407 sysbus_init_irq(SYS_BUS_DEVICE(s), &s->irq);
408}
409
410static void bcm2835_sdhost_reset(DeviceState *dev)
411{
412 BCM2835SDHostState *s = BCM2835_SDHOST(dev);
413
414 s->cmd = 0;
415 s->cmdarg = 0;
416 s->edm = 0x0000c60f;
417 trace_bcm2835_sdhost_edm_change("device reset", s->edm);
418 s->config = 0;
419 s->hbct = 0;
420 s->hblc = 0;
421 s->datacnt = 0;
422 s->fifo_pos = 0;
423 s->fifo_len = 0;
424}
425
426static void bcm2835_sdhost_class_init(ObjectClass *klass, void *data)
427{
428 DeviceClass *dc = DEVICE_CLASS(klass);
429
430 dc->reset = bcm2835_sdhost_reset;
431 dc->vmsd = &vmstate_bcm2835_sdhost;
432}
433
434static TypeInfo bcm2835_sdhost_info = {
435 .name = TYPE_BCM2835_SDHOST,
436 .parent = TYPE_SYS_BUS_DEVICE,
437 .instance_size = sizeof(BCM2835SDHostState),
438 .class_init = bcm2835_sdhost_class_init,
439 .instance_init = bcm2835_sdhost_init,
440};
441
442static const TypeInfo bcm2835_sdhost_bus_info = {
443 .name = TYPE_BCM2835_SDHOST_BUS,
444 .parent = TYPE_SD_BUS,
445 .instance_size = sizeof(SDBus),
446};
447
448static void bcm2835_sdhost_register_types(void)
449{
450 type_register_static(&bcm2835_sdhost_info);
451 type_register_static(&bcm2835_sdhost_bus_info);
452}
453
454type_init(bcm2835_sdhost_register_types)
455
