LXR qemu/tests/tcg/mips/mips64-dsp/mulsaq_s_w

   1#include "io.h"
   2
   3int main(void)
   4{
   5    long long rs, rt, dsp;
   6    long long achi, acli;
   7    long long acho, aclo;
   8    long long resl, resh;
   9
  10    achi = 0x4;
  11    acli = 0x4;
  12
  13    rs = 0x5678123443218765;
  14    rt = 0x4321876556781234;
  15
  16    resh = 0x4;
  17    resl = 0x342fcbd4;
  18    __asm
  19        ("mthi %2, $ac1\n\t"
  20         "mtlo %3, $ac1\n\t"
  21         "mulsaq_s.w.qh $ac1, %4, %5\n\t"
  22         "mfhi %0, $ac1\n\t"
  23         "mflo %1, $ac1\n\t"
  24         : "=r"(acho), "=r"(aclo)
  25         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
  26        );
  27
  28    if ((acho != resh) || (aclo != resl)) {
  29        printf("1 mulsaq_s.w.qh wrong\n");
  30        return -1;
  31    }
  32
  33    achi = 0x4;
  34    acli = 0x4;
  35
  36    rs = 0x8000800087654321;
  37    rt = 0x8000800012345678;
  38
  39    resh = 0x3;
  40    resl = 0xffffffffe5e81a1c;
  41    __asm
  42        ("mthi %3, $ac1\n\t"
  43         "mtlo %4, $ac1\n\t"
  44         "mulsaq_s.w.qh $ac1, %5, %6\n\t"
  45         "mfhi %0, $ac1\n\t"
  46         "mflo %1, $ac1\n\t"
  47         "rddsp %2\n\t"
  48         : "=r"(acho), "=r"(aclo), "=r"(dsp)
  49         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
  50        );
  51    dsp = (dsp >> 17) & 0x1;
  52    if ((dsp != 0x1) || (acho != resh) || (aclo != resl)) {
  53        printf("2 mulsaq_s.w.qh wrong\n");
  54        return -1;
  55    }
  56    return 0;
  57}
  58