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10#include "qemu/osdep.h"
11#include "qapi/error.h"
12#include "qemu-common.h"
13#include "cpu.h"
14#include "hw/sysbus.h"
15#include "hw/arm/arm.h"
16#include "hw/arm/primecell.h"
17#include "hw/devices.h"
18#include "hw/pci/pci.h"
19#include "net/net.h"
20#include "sysemu/sysemu.h"
21#include "hw/boards.h"
22#include "hw/i2c/i2c.h"
23#include "exec/address-spaces.h"
24#include "qemu/error-report.h"
25#include "hw/char/pl011.h"
26#include "hw/cpu/a9mpcore.h"
27#include "hw/intc/realview_gic.h"
28
29#define SMP_BOOT_ADDR 0xe0000000
30#define SMP_BOOTREG_ADDR 0x10000030
31
32
33
34static struct arm_boot_info realview_binfo = {
35 .smp_loader_start = SMP_BOOT_ADDR,
36 .smp_bootreg_addr = SMP_BOOTREG_ADDR,
37};
38
39
40enum realview_board_type {
41 BOARD_EB,
42 BOARD_EB_MPCORE,
43 BOARD_PB_A8,
44 BOARD_PBX_A9,
45};
46
47static const int realview_board_id[] = {
48 0x33b,
49 0x33b,
50 0x769,
51 0x76d
52};
53
54static void realview_init(MachineState *machine,
55 enum realview_board_type board_type)
56{
57 ARMCPU *cpu = NULL;
58 CPUARMState *env;
59 MemoryRegion *sysmem = get_system_memory();
60 MemoryRegion *ram_lo;
61 MemoryRegion *ram_hi = g_new(MemoryRegion, 1);
62 MemoryRegion *ram_alias = g_new(MemoryRegion, 1);
63 MemoryRegion *ram_hack = g_new(MemoryRegion, 1);
64 DeviceState *dev, *sysctl, *gpio2, *pl041;
65 SysBusDevice *busdev;
66 qemu_irq pic[64];
67 qemu_irq mmc_irq[2];
68 PCIBus *pci_bus = NULL;
69 NICInfo *nd;
70 I2CBus *i2c;
71 int n;
72 int done_nic = 0;
73 qemu_irq cpu_irq[4];
74 int is_mpcore = 0;
75 int is_pb = 0;
76 uint32_t proc_id = 0;
77 uint32_t sys_id;
78 ram_addr_t low_ram_size;
79 ram_addr_t ram_size = machine->ram_size;
80 hwaddr periphbase = 0;
81
82 switch (board_type) {
83 case BOARD_EB:
84 break;
85 case BOARD_EB_MPCORE:
86 is_mpcore = 1;
87 periphbase = 0x10100000;
88 break;
89 case BOARD_PB_A8:
90 is_pb = 1;
91 break;
92 case BOARD_PBX_A9:
93 is_mpcore = 1;
94 is_pb = 1;
95 periphbase = 0x1f000000;
96 break;
97 }
98
99 for (n = 0; n < smp_cpus; n++) {
100 Object *cpuobj = object_new(machine->cpu_type);
101
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103
104
105
106 if (object_property_find(cpuobj, "has_el3", NULL)) {
107 object_property_set_bool(cpuobj, false, "has_el3", &error_fatal);
108 }
109
110 if (is_pb && is_mpcore) {
111 object_property_set_int(cpuobj, periphbase, "reset-cbar",
112 &error_fatal);
113 }
114
115 object_property_set_bool(cpuobj, true, "realized", &error_fatal);
116
117 cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpuobj), ARM_CPU_IRQ);
118 }
119 cpu = ARM_CPU(first_cpu);
120 env = &cpu->env;
121 if (arm_feature(env, ARM_FEATURE_V7)) {
122 if (is_mpcore) {
123 proc_id = 0x0c000000;
124 } else {
125 proc_id = 0x0e000000;
126 }
127 } else if (arm_feature(env, ARM_FEATURE_V6K)) {
128 proc_id = 0x06000000;
129 } else if (arm_feature(env, ARM_FEATURE_V6)) {
130 proc_id = 0x04000000;
131 } else {
132 proc_id = 0x02000000;
133 }
134
135 if (is_pb && ram_size > 0x20000000) {
136
137 ram_lo = g_new(MemoryRegion, 1);
138 low_ram_size = ram_size - 0x20000000;
139 ram_size = 0x20000000;
140 memory_region_init_ram(ram_lo, NULL, "realview.lowmem", low_ram_size,
141 &error_fatal);
142 memory_region_add_subregion(sysmem, 0x20000000, ram_lo);
143 }
144
145 memory_region_init_ram(ram_hi, NULL, "realview.highmem", ram_size,
146 &error_fatal);
147 low_ram_size = ram_size;
148 if (low_ram_size > 0x10000000)
149 low_ram_size = 0x10000000;
150
151 memory_region_init_alias(ram_alias, NULL, "realview.alias",
152 ram_hi, 0, low_ram_size);
153 memory_region_add_subregion(sysmem, 0, ram_alias);
154 if (is_pb) {
155
156 memory_region_add_subregion(sysmem, 0x70000000, ram_hi);
157 } else {
158 ram_size = low_ram_size;
159 }
160
161 sys_id = is_pb ? 0x01780500 : 0xc1400400;
162 sysctl = qdev_create(NULL, "realview_sysctl");
163 qdev_prop_set_uint32(sysctl, "sys_id", sys_id);
164 qdev_prop_set_uint32(sysctl, "proc_id", proc_id);
165 qdev_init_nofail(sysctl);
166 sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, 0x10000000);
167
168 if (is_mpcore) {
169 dev = qdev_create(NULL, is_pb ? TYPE_A9MPCORE_PRIV : "realview_mpcore");
170 qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
171 qdev_init_nofail(dev);
172 busdev = SYS_BUS_DEVICE(dev);
173 sysbus_mmio_map(busdev, 0, periphbase);
174 for (n = 0; n < smp_cpus; n++) {
175 sysbus_connect_irq(busdev, n, cpu_irq[n]);
176 }
177 sysbus_create_varargs("l2x0", periphbase + 0x2000, NULL);
178
179 realview_binfo.gic_cpu_if_addr = periphbase + 0x100;
180 } else {
181 uint32_t gic_addr = is_pb ? 0x1e000000 : 0x10040000;
182
183 dev = sysbus_create_simple(TYPE_REALVIEW_GIC, gic_addr, cpu_irq[0]);
184 }
185 for (n = 0; n < 64; n++) {
186 pic[n] = qdev_get_gpio_in(dev, n);
187 }
188
189 pl041 = qdev_create(NULL, "pl041");
190 qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512);
191 qdev_init_nofail(pl041);
192 sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, 0x10004000);
193 sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, pic[19]);
194
195 sysbus_create_simple("pl050_keyboard", 0x10006000, pic[20]);
196 sysbus_create_simple("pl050_mouse", 0x10007000, pic[21]);
197
198 pl011_create(0x10009000, pic[12], serial_hd(0));
199 pl011_create(0x1000a000, pic[13], serial_hd(1));
200 pl011_create(0x1000b000, pic[14], serial_hd(2));
201 pl011_create(0x1000c000, pic[15], serial_hd(3));
202
203
204 dev = qdev_create(NULL, "pl081");
205 object_property_set_link(OBJECT(dev), OBJECT(sysmem), "downstream",
206 &error_fatal);
207 qdev_init_nofail(dev);
208 busdev = SYS_BUS_DEVICE(dev);
209 sysbus_mmio_map(busdev, 0, 0x10030000);
210 sysbus_connect_irq(busdev, 0, pic[24]);
211
212 sysbus_create_simple("sp804", 0x10011000, pic[4]);
213 sysbus_create_simple("sp804", 0x10012000, pic[5]);
214
215 sysbus_create_simple("pl061", 0x10013000, pic[6]);
216 sysbus_create_simple("pl061", 0x10014000, pic[7]);
217 gpio2 = sysbus_create_simple("pl061", 0x10015000, pic[8]);
218
219 sysbus_create_simple("pl111", 0x10020000, pic[23]);
220
221 dev = sysbus_create_varargs("pl181", 0x10005000, pic[17], pic[18], NULL);
222
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227
228 mmc_irq[0] = qemu_irq_split(
229 qdev_get_gpio_in(sysctl, ARM_SYSCTL_GPIO_MMC_WPROT),
230 qdev_get_gpio_in(gpio2, 1));
231 mmc_irq[1] = qemu_irq_split(
232 qdev_get_gpio_in(sysctl, ARM_SYSCTL_GPIO_MMC_CARDIN),
233 qemu_irq_invert(qdev_get_gpio_in(gpio2, 0)));
234 qdev_connect_gpio_out(dev, 0, mmc_irq[0]);
235 qdev_connect_gpio_out(dev, 1, mmc_irq[1]);
236
237 sysbus_create_simple("pl031", 0x10017000, pic[10]);
238
239 if (!is_pb) {
240 dev = qdev_create(NULL, "realview_pci");
241 busdev = SYS_BUS_DEVICE(dev);
242 qdev_init_nofail(dev);
243 sysbus_mmio_map(busdev, 0, 0x10019000);
244 sysbus_mmio_map(busdev, 1, 0x60000000);
245 sysbus_mmio_map(busdev, 2, 0x61000000);
246 sysbus_mmio_map(busdev, 3, 0x62000000);
247 sysbus_mmio_map(busdev, 4, 0x63000000);
248 sysbus_mmio_map(busdev, 5, 0x64000000);
249 sysbus_mmio_map(busdev, 6, 0x68000000);
250 sysbus_connect_irq(busdev, 0, pic[48]);
251 sysbus_connect_irq(busdev, 1, pic[49]);
252 sysbus_connect_irq(busdev, 2, pic[50]);
253 sysbus_connect_irq(busdev, 3, pic[51]);
254 pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
255 if (machine_usb(machine)) {
256 pci_create_simple(pci_bus, -1, "pci-ohci");
257 }
258 n = drive_get_max_bus(IF_SCSI);
259 while (n >= 0) {
260 dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a"));
261 lsi53c8xx_handle_legacy_cmdline(dev);
262 n--;
263 }
264 }
265 for(n = 0; n < nb_nics; n++) {
266 nd = &nd_table[n];
267
268 if (!done_nic && (!nd->model ||
269 strcmp(nd->model, is_pb ? "lan9118" : "smc91c111") == 0)) {
270 if (is_pb) {
271 lan9118_init(nd, 0x4e000000, pic[28]);
272 } else {
273 smc91c111_init(nd, 0x4e000000, pic[28]);
274 }
275 done_nic = 1;
276 } else {
277 if (pci_bus) {
278 pci_nic_init_nofail(nd, pci_bus, "rtl8139", NULL);
279 }
280 }
281 }
282
283 dev = sysbus_create_simple("versatile_i2c", 0x10002000, NULL);
284 i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c");
285 i2c_create_slave(i2c, "ds1338", 0x68);
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347 memory_region_init_ram(ram_hack, NULL, "realview.hack", 0x1000,
348 &error_fatal);
349 memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, ram_hack);
350
351 realview_binfo.ram_size = ram_size;
352 realview_binfo.kernel_filename = machine->kernel_filename;
353 realview_binfo.kernel_cmdline = machine->kernel_cmdline;
354 realview_binfo.initrd_filename = machine->initrd_filename;
355 realview_binfo.nb_cpus = smp_cpus;
356 realview_binfo.board_id = realview_board_id[board_type];
357 realview_binfo.loader_start = (board_type == BOARD_PB_A8 ? 0x70000000 : 0);
358 arm_load_kernel(ARM_CPU(first_cpu), &realview_binfo);
359}
360
361static void realview_eb_init(MachineState *machine)
362{
363 realview_init(machine, BOARD_EB);
364}
365
366static void realview_eb_mpcore_init(MachineState *machine)
367{
368 realview_init(machine, BOARD_EB_MPCORE);
369}
370
371static void realview_pb_a8_init(MachineState *machine)
372{
373 realview_init(machine, BOARD_PB_A8);
374}
375
376static void realview_pbx_a9_init(MachineState *machine)
377{
378 realview_init(machine, BOARD_PBX_A9);
379}
380
381static void realview_eb_class_init(ObjectClass *oc, void *data)
382{
383 MachineClass *mc = MACHINE_CLASS(oc);
384
385 mc->desc = "ARM RealView Emulation Baseboard (ARM926EJ-S)";
386 mc->init = realview_eb_init;
387 mc->block_default_type = IF_SCSI;
388 mc->ignore_memory_transaction_failures = true;
389 mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm926");
390}
391
392static const TypeInfo realview_eb_type = {
393 .name = MACHINE_TYPE_NAME("realview-eb"),
394 .parent = TYPE_MACHINE,
395 .class_init = realview_eb_class_init,
396};
397
398static void realview_eb_mpcore_class_init(ObjectClass *oc, void *data)
399{
400 MachineClass *mc = MACHINE_CLASS(oc);
401
402 mc->desc = "ARM RealView Emulation Baseboard (ARM11MPCore)";
403 mc->init = realview_eb_mpcore_init;
404 mc->block_default_type = IF_SCSI;
405 mc->max_cpus = 4;
406 mc->ignore_memory_transaction_failures = true;
407 mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm11mpcore");
408}
409
410static const TypeInfo realview_eb_mpcore_type = {
411 .name = MACHINE_TYPE_NAME("realview-eb-mpcore"),
412 .parent = TYPE_MACHINE,
413 .class_init = realview_eb_mpcore_class_init,
414};
415
416static void realview_pb_a8_class_init(ObjectClass *oc, void *data)
417{
418 MachineClass *mc = MACHINE_CLASS(oc);
419
420 mc->desc = "ARM RealView Platform Baseboard for Cortex-A8";
421 mc->init = realview_pb_a8_init;
422 mc->ignore_memory_transaction_failures = true;
423 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a8");
424}
425
426static const TypeInfo realview_pb_a8_type = {
427 .name = MACHINE_TYPE_NAME("realview-pb-a8"),
428 .parent = TYPE_MACHINE,
429 .class_init = realview_pb_a8_class_init,
430};
431
432static void realview_pbx_a9_class_init(ObjectClass *oc, void *data)
433{
434 MachineClass *mc = MACHINE_CLASS(oc);
435
436 mc->desc = "ARM RealView Platform Baseboard Explore for Cortex-A9";
437 mc->init = realview_pbx_a9_init;
438 mc->max_cpus = 4;
439 mc->ignore_memory_transaction_failures = true;
440 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
441}
442
443static const TypeInfo realview_pbx_a9_type = {
444 .name = MACHINE_TYPE_NAME("realview-pbx-a9"),
445 .parent = TYPE_MACHINE,
446 .class_init = realview_pbx_a9_class_init,
447};
448
449static void realview_machine_init(void)
450{
451 type_register_static(&realview_eb_type);
452 type_register_static(&realview_eb_mpcore_type);
453 type_register_static(&realview_pb_a8_type);
454 type_register_static(&realview_pbx_a9_type);
455}
456
457type_init(realview_machine_init)
458