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31#include "qemu/osdep.h"
32#include "qemu/units.h"
33#include "hw/hw.h"
34#include "hw/loader.h"
35#include "sysemu/arch_init.h"
36#include "hw/i2c/smbus_eeprom.h"
37#include "hw/boards.h"
38#include "hw/timer/mc146818rtc.h"
39#include "hw/xen/xen.h"
40#include "sysemu/kvm.h"
41#include "kvm_i386.h"
42#include "hw/kvm/clock.h"
43#include "hw/pci-host/q35.h"
44#include "exec/address-spaces.h"
45#include "hw/i386/pc.h"
46#include "hw/i386/ich9.h"
47#include "hw/i386/amd_iommu.h"
48#include "hw/i386/intel_iommu.h"
49#include "hw/display/ramfb.h"
50#include "hw/firmware/smbios.h"
51#include "hw/ide/pci.h"
52#include "hw/ide/ahci.h"
53#include "hw/usb.h"
54#include "qapi/error.h"
55#include "qemu/error-report.h"
56#include "sysemu/numa.h"
57
58
59#define MAX_SATA_PORTS 6
60
61struct ehci_companions {
62 const char *name;
63 int func;
64 int port;
65};
66
67static const struct ehci_companions ich9_1d[] = {
68 { .name = "ich9-usb-uhci1", .func = 0, .port = 0 },
69 { .name = "ich9-usb-uhci2", .func = 1, .port = 2 },
70 { .name = "ich9-usb-uhci3", .func = 2, .port = 4 },
71};
72
73static const struct ehci_companions ich9_1a[] = {
74 { .name = "ich9-usb-uhci4", .func = 0, .port = 0 },
75 { .name = "ich9-usb-uhci5", .func = 1, .port = 2 },
76 { .name = "ich9-usb-uhci6", .func = 2, .port = 4 },
77};
78
79static int ehci_create_ich9_with_companions(PCIBus *bus, int slot)
80{
81 const struct ehci_companions *comp;
82 PCIDevice *ehci, *uhci;
83 BusState *usbbus;
84 const char *name;
85 int i;
86
87 switch (slot) {
88 case 0x1d:
89 name = "ich9-usb-ehci1";
90 comp = ich9_1d;
91 break;
92 case 0x1a:
93 name = "ich9-usb-ehci2";
94 comp = ich9_1a;
95 break;
96 default:
97 return -1;
98 }
99
100 ehci = pci_create_multifunction(bus, PCI_DEVFN(slot, 7), true, name);
101 qdev_init_nofail(&ehci->qdev);
102 usbbus = QLIST_FIRST(&ehci->qdev.child_bus);
103
104 for (i = 0; i < 3; i++) {
105 uhci = pci_create_multifunction(bus, PCI_DEVFN(slot, comp[i].func),
106 true, comp[i].name);
107 qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name);
108 qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port);
109 qdev_init_nofail(&uhci->qdev);
110 }
111 return 0;
112}
113
114
115static void pc_q35_init(MachineState *machine)
116{
117 PCMachineState *pcms = PC_MACHINE(machine);
118 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
119 Q35PCIHost *q35_host;
120 PCIHostState *phb;
121 PCIBus *host_bus;
122 PCIDevice *lpc;
123 DeviceState *lpc_dev;
124 BusState *idebus[MAX_SATA_PORTS];
125 ISADevice *rtc_state;
126 MemoryRegion *system_io = get_system_io();
127 MemoryRegion *pci_memory;
128 MemoryRegion *rom_memory;
129 MemoryRegion *ram_memory;
130 GSIState *gsi_state;
131 ISABus *isa_bus;
132 qemu_irq *i8259;
133 int i;
134 ICH9LPCState *ich9_lpc;
135 PCIDevice *ahci;
136 ram_addr_t lowmem;
137 DriveInfo *hd[MAX_SATA_PORTS];
138 MachineClass *mc = MACHINE_GET_CLASS(machine);
139
140
141
142
143
144
145
146
147 if (machine->ram_size >= 0xb0000000) {
148 lowmem = 0x80000000;
149 } else {
150 lowmem = 0xb0000000;
151 }
152
153
154
155
156 if (!pcms->max_ram_below_4g) {
157 pcms->max_ram_below_4g = 1ULL << 32; ;
158 }
159 if (lowmem > pcms->max_ram_below_4g) {
160 lowmem = pcms->max_ram_below_4g;
161 if (machine->ram_size - lowmem > lowmem &&
162 lowmem & (1 * GiB - 1)) {
163 warn_report("There is possibly poor performance as the ram size "
164 " (0x%" PRIx64 ") is more then twice the size of"
165 " max-ram-below-4g (%"PRIu64") and"
166 " max-ram-below-4g is not a multiple of 1G.",
167 (uint64_t)machine->ram_size, pcms->max_ram_below_4g);
168 }
169 }
170
171 if (machine->ram_size >= lowmem) {
172 pcms->above_4g_mem_size = machine->ram_size - lowmem;
173 pcms->below_4g_mem_size = lowmem;
174 } else {
175 pcms->above_4g_mem_size = 0;
176 pcms->below_4g_mem_size = machine->ram_size;
177 }
178
179 if (xen_enabled()) {
180 xen_hvm_init(pcms, &ram_memory);
181 }
182
183 pc_cpus_init(pcms);
184
185 kvmclock_create();
186
187
188 if (pcmc->pci_enabled) {
189 pci_memory = g_new(MemoryRegion, 1);
190 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
191 rom_memory = pci_memory;
192 } else {
193 pci_memory = NULL;
194 rom_memory = get_system_memory();
195 }
196
197 pc_guest_info_init(pcms);
198
199 if (pcmc->smbios_defaults) {
200
201 smbios_set_defaults("QEMU", "Standard PC (Q35 + ICH9, 2009)",
202 mc->name, pcmc->smbios_legacy_mode,
203 pcmc->smbios_uuid_encoded,
204 SMBIOS_ENTRY_POINT_21);
205 }
206
207
208 if (!xen_enabled()) {
209 pc_memory_init(pcms, get_system_memory(),
210 rom_memory, &ram_memory);
211 }
212
213
214 gsi_state = g_malloc0(sizeof(*gsi_state));
215 if (kvm_ioapic_in_kernel()) {
216 kvm_pc_setup_irq_routing(pcmc->pci_enabled);
217 pcms->gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
218 GSI_NUM_PINS);
219 } else {
220 pcms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
221 }
222
223
224 q35_host = Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE));
225
226 object_property_add_child(qdev_get_machine(), "q35", OBJECT(q35_host), NULL);
227 object_property_set_link(OBJECT(q35_host), OBJECT(ram_memory),
228 MCH_HOST_PROP_RAM_MEM, NULL);
229 object_property_set_link(OBJECT(q35_host), OBJECT(pci_memory),
230 MCH_HOST_PROP_PCI_MEM, NULL);
231 object_property_set_link(OBJECT(q35_host), OBJECT(get_system_memory()),
232 MCH_HOST_PROP_SYSTEM_MEM, NULL);
233 object_property_set_link(OBJECT(q35_host), OBJECT(system_io),
234 MCH_HOST_PROP_IO_MEM, NULL);
235 object_property_set_int(OBJECT(q35_host), pcms->below_4g_mem_size,
236 PCI_HOST_BELOW_4G_MEM_SIZE, NULL);
237 object_property_set_int(OBJECT(q35_host), pcms->above_4g_mem_size,
238 PCI_HOST_ABOVE_4G_MEM_SIZE, NULL);
239
240 qdev_init_nofail(DEVICE(q35_host));
241 phb = PCI_HOST_BRIDGE(q35_host);
242 host_bus = phb->bus;
243
244 lpc = pci_create_simple_multifunction(host_bus, PCI_DEVFN(ICH9_LPC_DEV,
245 ICH9_LPC_FUNC), true,
246 TYPE_ICH9_LPC_DEVICE);
247
248 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
249 TYPE_HOTPLUG_HANDLER,
250 (Object **)&pcms->acpi_dev,
251 object_property_allow_set_link,
252 OBJ_PROP_LINK_STRONG, &error_abort);
253 object_property_set_link(OBJECT(machine), OBJECT(lpc),
254 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
255
256 ich9_lpc = ICH9_LPC_DEVICE(lpc);
257 lpc_dev = DEVICE(lpc);
258 for (i = 0; i < GSI_NUM_PINS; i++) {
259 qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, pcms->gsi[i]);
260 }
261 pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc,
262 ICH9_LPC_NB_PIRQS);
263 pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq);
264 isa_bus = ich9_lpc->isa_bus;
265
266 if (kvm_pic_in_kernel()) {
267 i8259 = kvm_i8259_init(isa_bus);
268 } else if (xen_enabled()) {
269 i8259 = xen_interrupt_controller_init();
270 } else {
271 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq());
272 }
273
274 for (i = 0; i < ISA_NUM_IRQS; i++) {
275 gsi_state->i8259_irq[i] = i8259[i];
276 }
277 g_free(i8259);
278
279 if (pcmc->pci_enabled) {
280 ioapic_init_gsi(gsi_state, "q35");
281 }
282
283 pc_register_ferr_irq(pcms->gsi[13]);
284
285 assert(pcms->vmport != ON_OFF_AUTO__MAX);
286 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
287 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
288 }
289
290
291 pc_basic_device_init(isa_bus, pcms->gsi, &rtc_state, !mc->no_floppy,
292 (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit_enabled,
293 0xff0104);
294
295
296 ich9_lpc_pm_init(lpc, pc_machine_is_smm_enabled(pcms));
297
298 if (pcms->sata_enabled) {
299
300 ahci = pci_create_simple_multifunction(host_bus,
301 PCI_DEVFN(ICH9_SATA1_DEV,
302 ICH9_SATA1_FUNC),
303 true, "ich9-ahci");
304 idebus[0] = qdev_get_child_bus(&ahci->qdev, "ide.0");
305 idebus[1] = qdev_get_child_bus(&ahci->qdev, "ide.1");
306 g_assert(MAX_SATA_PORTS == ahci_get_num_ports(ahci));
307 ide_drive_get(hd, ahci_get_num_ports(ahci));
308 ahci_ide_create_devs(ahci, hd);
309 } else {
310 idebus[0] = idebus[1] = NULL;
311 }
312
313 if (machine_usb(machine)) {
314
315 ehci_create_ich9_with_companions(host_bus, 0x1d);
316 }
317
318 if (pcms->smbus_enabled) {
319
320 smbus_eeprom_init(ich9_smb_init(host_bus,
321 PCI_DEVFN(ICH9_SMB_DEV, ICH9_SMB_FUNC),
322 0xb100),
323 8, NULL, 0);
324 }
325
326 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
327
328
329 pc_vga_init(isa_bus, host_bus);
330 pc_nic_init(pcmc, isa_bus, host_bus);
331
332 if (machine->nvdimms_state->is_enabled) {
333 nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
334 pcms->fw_cfg, OBJECT(pcms));
335 }
336}
337
338#define DEFINE_Q35_MACHINE(suffix, name, compatfn, optionfn) \
339 static void pc_init_##suffix(MachineState *machine) \
340 { \
341 void (*compat)(MachineState *m) = (compatfn); \
342 if (compat) { \
343 compat(machine); \
344 } \
345 pc_q35_init(machine); \
346 } \
347 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
348
349
350static void pc_q35_machine_options(MachineClass *m)
351{
352 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
353 pcmc->default_nic_model = "e1000e";
354
355 m->family = "pc_q35";
356 m->desc = "Standard PC (Q35 + ICH9, 2009)";
357 m->units_per_default_bus = 1;
358 m->default_machine_opts = "firmware=bios-256k.bin";
359 m->default_display = "std";
360 m->default_kernel_irqchip_split = true;
361 m->no_floppy = 1;
362 machine_class_allow_dynamic_sysbus_dev(m, TYPE_AMD_IOMMU_DEVICE);
363 machine_class_allow_dynamic_sysbus_dev(m, TYPE_INTEL_IOMMU_DEVICE);
364 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
365 m->max_cpus = 288;
366}
367
368static void pc_q35_4_0_machine_options(MachineClass *m)
369{
370 pc_q35_machine_options(m);
371 m->alias = "q35";
372}
373
374DEFINE_Q35_MACHINE(v4_0, "pc-q35-4.0", NULL,
375 pc_q35_4_0_machine_options);
376
377static void pc_q35_3_1_machine_options(MachineClass *m)
378{
379 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
380
381 pc_q35_4_0_machine_options(m);
382 m->default_kernel_irqchip_split = false;
383 m->smbus_no_migration_support = true;
384 m->alias = NULL;
385 pcmc->pvh_enabled = false;
386 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
387 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
388}
389
390DEFINE_Q35_MACHINE(v3_1, "pc-q35-3.1", NULL,
391 pc_q35_3_1_machine_options);
392
393static void pc_q35_3_0_machine_options(MachineClass *m)
394{
395 pc_q35_3_1_machine_options(m);
396 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len);
397 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len);
398}
399
400DEFINE_Q35_MACHINE(v3_0, "pc-q35-3.0", NULL,
401 pc_q35_3_0_machine_options);
402
403static void pc_q35_2_12_machine_options(MachineClass *m)
404{
405 pc_q35_3_0_machine_options(m);
406 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len);
407 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len);
408}
409
410DEFINE_Q35_MACHINE(v2_12, "pc-q35-2.12", NULL,
411 pc_q35_2_12_machine_options);
412
413static void pc_q35_2_11_machine_options(MachineClass *m)
414{
415 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
416
417 pc_q35_2_12_machine_options(m);
418 pcmc->default_nic_model = "e1000";
419 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len);
420 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len);
421}
422
423DEFINE_Q35_MACHINE(v2_11, "pc-q35-2.11", NULL,
424 pc_q35_2_11_machine_options);
425
426static void pc_q35_2_10_machine_options(MachineClass *m)
427{
428 pc_q35_2_11_machine_options(m);
429 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len);
430 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len);
431 m->numa_auto_assign_ram = numa_legacy_auto_assign_ram;
432 m->auto_enable_numa_with_memhp = false;
433}
434
435DEFINE_Q35_MACHINE(v2_10, "pc-q35-2.10", NULL,
436 pc_q35_2_10_machine_options);
437
438static void pc_q35_2_9_machine_options(MachineClass *m)
439{
440 pc_q35_2_10_machine_options(m);
441 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len);
442 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len);
443}
444
445DEFINE_Q35_MACHINE(v2_9, "pc-q35-2.9", NULL,
446 pc_q35_2_9_machine_options);
447
448static void pc_q35_2_8_machine_options(MachineClass *m)
449{
450 pc_q35_2_9_machine_options(m);
451 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len);
452 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len);
453}
454
455DEFINE_Q35_MACHINE(v2_8, "pc-q35-2.8", NULL,
456 pc_q35_2_8_machine_options);
457
458static void pc_q35_2_7_machine_options(MachineClass *m)
459{
460 pc_q35_2_8_machine_options(m);
461 m->max_cpus = 255;
462 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len);
463 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len);
464}
465
466DEFINE_Q35_MACHINE(v2_7, "pc-q35-2.7", NULL,
467 pc_q35_2_7_machine_options);
468
469static void pc_q35_2_6_machine_options(MachineClass *m)
470{
471 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
472
473 pc_q35_2_7_machine_options(m);
474 pcmc->legacy_cpu_hotplug = true;
475 pcmc->linuxboot_dma_enabled = false;
476 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len);
477 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len);
478}
479
480DEFINE_Q35_MACHINE(v2_6, "pc-q35-2.6", NULL,
481 pc_q35_2_6_machine_options);
482
483static void pc_q35_2_5_machine_options(MachineClass *m)
484{
485 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
486
487 pc_q35_2_6_machine_options(m);
488 pcmc->save_tsc_khz = false;
489 m->legacy_fw_cfg_order = 1;
490 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len);
491 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len);
492}
493
494DEFINE_Q35_MACHINE(v2_5, "pc-q35-2.5", NULL,
495 pc_q35_2_5_machine_options);
496
497static void pc_q35_2_4_machine_options(MachineClass *m)
498{
499 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
500
501 pc_q35_2_5_machine_options(m);
502 m->hw_version = "2.4.0";
503 pcmc->broken_reserved_end = true;
504 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len);
505 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len);
506}
507
508DEFINE_Q35_MACHINE(v2_4, "pc-q35-2.4", NULL,
509 pc_q35_2_4_machine_options);
510
