LXR qemu/hw/microblaze/petalogix_s3adsp1800

   1/*
   2 * Model of Petalogix linux reference design targeting Xilinx Spartan 3ADSP-1800
   3 * boards.
   4 *
   5 * Copyright (c) 2009 Edgar E. Iglesias.
   6 *
   7 * Permission is hereby granted, free of charge, to any person obtaining a copy
   8 * of this software and associated documentation files (the "Software"), to deal
   9 * in the Software without restriction, including without limitation the rights
  10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11 * copies of the Software, and to permit persons to whom the Software is
  12 * furnished to do so, subject to the following conditions:
  13 *
  14 * The above copyright notice and this permission notice shall be included in
  15 * all copies or substantial portions of the Software.
  16 *
  17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23 * THE SOFTWARE.
  24 */
  25
  26#include "qemu/osdep.h"
  27#include "qemu/units.h"
  28#include "qapi/error.h"
  29#include "qemu-common.h"
  30#include "cpu.h"
  31#include "hw/sysbus.h"
  32#include "hw/hw.h"
  33#include "net/net.h"
  34#include "hw/block/flash.h"
  35#include "sysemu/sysemu.h"
  36#include "hw/boards.h"
  37#include "hw/misc/unimp.h"
  38#include "exec/address-spaces.h"
  39#include "hw/char/xilinx_uartlite.h"
  40
  41#include "boot.h"
  42
  43#define LMB_BRAM_SIZE  (128 * KiB)
  44#define FLASH_SIZE     (16 * MiB)
  45
  46#define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb"
  47
  48#define MEMORY_BASEADDR 0x90000000
  49#define FLASH_BASEADDR 0xa0000000
  50#define GPIO_BASEADDR 0x81400000
  51#define INTC_BASEADDR 0x81800000
  52#define TIMER_BASEADDR 0x83c00000
  53#define UARTLITE_BASEADDR 0x84000000
  54#define ETHLITE_BASEADDR 0x81000000
  55
  56#define TIMER_IRQ           0
  57#define ETHLITE_IRQ         1
  58#define UARTLITE_IRQ        3
  59
  60static void
  61petalogix_s3adsp1800_init(MachineState *machine)
  62{
  63    ram_addr_t ram_size = machine->ram_size;
  64    DeviceState *dev;
  65    MicroBlazeCPU *cpu;
  66    DriveInfo *dinfo;
  67    int i;
  68    hwaddr ddr_base = MEMORY_BASEADDR;
  69    MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1);
  70    MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
  71    qemu_irq irq[32];
  72    MemoryRegion *sysmem = get_system_memory();
  73
  74    cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU));
  75    object_property_set_str(OBJECT(cpu), "7.10.d", "version", &error_abort);
  76    object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort);
  77
  78    /* Attach emulated BRAM through the LMB.  */
  79    memory_region_init_ram(phys_lmb_bram, NULL,
  80                           "petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE,
  81                           &error_fatal);
  82    memory_region_add_subregion(sysmem, 0x00000000, phys_lmb_bram);
  83
  84    memory_region_init_ram(phys_ram, NULL, "petalogix_s3adsp1800.ram",
  85                           ram_size, &error_fatal);
  86    memory_region_add_subregion(sysmem, ddr_base, phys_ram);
  87
  88    dinfo = drive_get(IF_PFLASH, 0, 0);
  89    pflash_cfi01_register(FLASH_BASEADDR,
  90                          "petalogix_s3adsp1800.flash", FLASH_SIZE,
  91                          dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
  92                          64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1);
  93
  94    dev = qdev_create(NULL, "xlnx.xps-intc");
  95    qdev_prop_set_uint32(dev, "kind-of-intr",
  96                         1 << ETHLITE_IRQ | 1 << UARTLITE_IRQ);
  97    qdev_init_nofail(dev);
  98    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR);
  99    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
 100                       qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ));
 101    for (i = 0; i < 32; i++) {
 102        irq[i] = qdev_get_gpio_in(dev, i);
 103    }
 104
 105    xilinx_uartlite_create(UARTLITE_BASEADDR, irq[UARTLITE_IRQ],
 106                           serial_hd(0));
 107
 108    /* 2 timers at irq 2 @ 62 Mhz.  */
 109    dev = qdev_create(NULL, "xlnx.xps-timer");
 110    qdev_prop_set_uint32(dev, "one-timer-only", 0);
 111    qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000);
 112    qdev_init_nofail(dev);
 113    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR);
 114    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]);
 115
 116    qemu_check_nic_model(&nd_table[0], "xlnx.xps-ethernetlite");
 117    dev = qdev_create(NULL, "xlnx.xps-ethernetlite");
 118    qdev_set_nic_properties(dev, &nd_table[0]);
 119    qdev_prop_set_uint32(dev, "tx-ping-pong", 0);
 120    qdev_prop_set_uint32(dev, "rx-ping-pong", 0);
 121    qdev_init_nofail(dev);
 122    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, ETHLITE_BASEADDR);
 123    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[ETHLITE_IRQ]);
 124
 125    create_unimplemented_device("gpio", GPIO_BASEADDR, 0x10000);
 126
 127    microblaze_load_kernel(cpu, ddr_base, ram_size,
 128                           machine->initrd_filename,
 129                           BINARY_DEVICE_TREE_FILE,
 130                           NULL);
 131}
 132
 133static void petalogix_s3adsp1800_machine_init(MachineClass *mc)
 134{
 135    mc->desc = "PetaLogix linux refdesign for xilinx Spartan 3ADSP1800";
 136    mc->init = petalogix_s3adsp1800_init;
 137    mc->is_default = 1;
 138}
 139
 140DEFINE_MACHINE("petalogix-s3adsp1800", petalogix_s3adsp1800_machine_init)
 141