LXR qemu/hw/nvram/ds1225y.c

   1/*
   2 * QEMU NVRAM emulation for DS1225Y chip
   3 *
   4 * Copyright (c) 2007-2008 Hervé Poussineau
   5 *
   6 * Permission is hereby granted, free of charge, to any person obtaining a copy
   7 * of this software and associated documentation files (the "Software"), to deal
   8 * in the Software without restriction, including without limitation the rights
   9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 * copies of the Software, and to permit persons to whom the Software is
  11 * furnished to do so, subject to the following conditions:
  12 *
  13 * The above copyright notice and this permission notice shall be included in
  14 * all copies or substantial portions of the Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22 * THE SOFTWARE.
  23 */
  24
  25#include "qemu/osdep.h"
  26#include "hw/sysbus.h"
  27#include "trace.h"
  28#include "qemu/error-report.h"
  29
  30typedef struct {
  31    MemoryRegion iomem;
  32    uint32_t chip_size;
  33    char *filename;
  34    FILE *file;
  35    uint8_t *contents;
  36} NvRamState;
  37
  38static uint64_t nvram_read(void *opaque, hwaddr addr, unsigned size)
  39{
  40    NvRamState *s = opaque;
  41    uint32_t val;
  42
  43    val = s->contents[addr];
  44    trace_nvram_read(addr, val);
  45    return val;
  46}
  47
  48static void nvram_write(void *opaque, hwaddr addr, uint64_t val,
  49                        unsigned size)
  50{
  51    NvRamState *s = opaque;
  52
  53    val &= 0xff;
  54    trace_nvram_write(addr, s->contents[addr], val);
  55
  56    s->contents[addr] = val;
  57    if (s->file) {
  58        fseek(s->file, addr, SEEK_SET);
  59        fputc(val, s->file);
  60        fflush(s->file);
  61    }
  62}
  63
  64static const MemoryRegionOps nvram_ops = {
  65    .read = nvram_read,
  66    .write = nvram_write,
  67    .impl = {
  68        .min_access_size = 1,
  69        .max_access_size = 1,
  70    },
  71    .endianness = DEVICE_LITTLE_ENDIAN,
  72};
  73
  74static int nvram_post_load(void *opaque, int version_id)
  75{
  76    NvRamState *s = opaque;
  77
  78    /* Close file, as filename may has changed in load/store process */
  79    if (s->file) {
  80        fclose(s->file);
  81    }
  82
  83    /* Write back nvram contents */
  84    s->file = s->filename ? fopen(s->filename, "wb") : NULL;
  85    if (s->file) {
  86        /* Write back contents, as 'wb' mode cleaned the file */
  87        if (fwrite(s->contents, s->chip_size, 1, s->file) != 1) {
  88            printf("nvram_post_load: short write\n");
  89        }
  90        fflush(s->file);
  91    }
  92
  93    return 0;
  94}
  95
  96static const VMStateDescription vmstate_nvram = {
  97    .name = "nvram",
  98    .version_id = 0,
  99    .minimum_version_id = 0,
 100    .post_load = nvram_post_load,
 101    .fields = (VMStateField[]) {
 102        VMSTATE_VARRAY_UINT32(contents, NvRamState, chip_size, 0,
 103                              vmstate_info_uint8, uint8_t),
 104        VMSTATE_END_OF_LIST()
 105    }
 106};
 107
 108#define TYPE_DS1225Y "ds1225y"
 109#define DS1225Y(obj) OBJECT_CHECK(SysBusNvRamState, (obj), TYPE_DS1225Y)
 110
 111typedef struct {
 112    SysBusDevice parent_obj;
 113
 114    NvRamState nvram;
 115} SysBusNvRamState;
 116
 117static void nvram_sysbus_realize(DeviceState *dev, Error **errp)
 118{
 119    SysBusNvRamState *sys = DS1225Y(dev);
 120    NvRamState *s = &sys->nvram;
 121    FILE *file;
 122
 123    s->contents = g_malloc0(s->chip_size);
 124
 125    memory_region_init_io(&s->iomem, OBJECT(s), &nvram_ops, s,
 126                          "nvram", s->chip_size);
 127    sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
 128
 129    /* Read current file */
 130    file = s->filename ? fopen(s->filename, "rb") : NULL;
 131    if (file) {
 132        /* Read nvram contents */
 133        if (fread(s->contents, s->chip_size, 1, file) != 1) {
 134            error_report("nvram_sysbus_realize: short read");
 135        }
 136        fclose(file);
 137    }
 138    nvram_post_load(s, 0);
 139}
 140
 141static Property nvram_sysbus_properties[] = {
 142    DEFINE_PROP_UINT32("size", SysBusNvRamState, nvram.chip_size, 0x2000),
 143    DEFINE_PROP_STRING("filename", SysBusNvRamState, nvram.filename),
 144    DEFINE_PROP_END_OF_LIST(),
 145};
 146
 147static void nvram_sysbus_class_init(ObjectClass *klass, void *data)
 148{
 149    DeviceClass *dc = DEVICE_CLASS(klass);
 150
 151    dc->realize = nvram_sysbus_realize;
 152    dc->vmsd = &vmstate_nvram;
 153    dc->props = nvram_sysbus_properties;
 154}
 155
 156static const TypeInfo nvram_sysbus_info = {
 157    .name          = TYPE_DS1225Y,
 158    .parent        = TYPE_SYS_BUS_DEVICE,
 159    .instance_size = sizeof(SysBusNvRamState),
 160    .class_init    = nvram_sysbus_class_init,
 161};
 162
 163static void nvram_register_types(void)
 164{
 165    type_register_static(&nvram_sysbus_info);
 166}
 167
 168type_init(nvram_register_types)
 169