1
2
3
4
5
6
7
8
9
10
11
12#include "qemu/osdep.h"
13#include "qemu-common.h"
14#include "e500.h"
15#include "hw/boards.h"
16#include "sysemu/device_tree.h"
17#include "hw/ppc/openpic.h"
18#include "qemu/error-report.h"
19#include "cpu.h"
20
21static void mpc8544ds_fixup_devtree(void *fdt)
22{
23 const char model[] = "MPC8544DS";
24 const char compatible[] = "MPC8544DS\0MPC85xxDS";
25
26 qemu_fdt_setprop(fdt, "/", "model", model, sizeof(model));
27 qemu_fdt_setprop(fdt, "/", "compatible", compatible,
28 sizeof(compatible));
29}
30
31static void mpc8544ds_init(MachineState *machine)
32{
33 if (machine->ram_size > 0xc0000000) {
34 error_report("The MPC8544DS board only supports up to 3GB of RAM");
35 exit(1);
36 }
37
38 ppce500_init(machine);
39}
40
41static void e500plat_machine_class_init(ObjectClass *oc, void *data)
42{
43 MachineClass *mc = MACHINE_CLASS(oc);
44 PPCE500MachineClass *pmc = PPCE500_MACHINE_CLASS(oc);
45
46 pmc->pci_first_slot = 0x11;
47 pmc->pci_nr_slots = 2;
48 pmc->fixup_devtree = mpc8544ds_fixup_devtree;
49 pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_20;
50 pmc->ccsrbar_base = 0xE0000000ULL;
51 pmc->pci_mmio_base = 0xC0000000ULL;
52 pmc->pci_mmio_bus_base = 0xC0000000ULL;
53 pmc->pci_pio_base = 0xE1000000ULL;
54 pmc->spin_base = 0xEF000000ULL;
55
56 mc->desc = "mpc8544ds";
57 mc->init = mpc8544ds_init;
58 mc->max_cpus = 15;
59 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("e500v2_v30");
60}
61
62#define TYPE_MPC8544DS_MACHINE MACHINE_TYPE_NAME("mpc8544ds")
63
64static const TypeInfo mpc8544ds_info = {
65 .name = TYPE_MPC8544DS_MACHINE,
66 .parent = TYPE_PPCE500_MACHINE,
67 .class_init = e500plat_machine_class_init,
68};
69
70static void mpc8544ds_register_types(void)
71{
72 type_register_static(&mpc8544ds_info);
73}
74
75type_init(mpc8544ds_register_types)
76