1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18#include "qemu/osdep.h"
19
20#include "standard-headers/linux/virtio_pci.h"
21#include "hw/virtio/virtio.h"
22#include "hw/pci/pci.h"
23#include "qapi/error.h"
24#include "qemu/error-report.h"
25#include "hw/pci/msi.h"
26#include "hw/pci/msix.h"
27#include "hw/loader.h"
28#include "sysemu/kvm.h"
29#include "virtio-pci.h"
30#include "qemu/range.h"
31#include "hw/virtio/virtio-bus.h"
32#include "qapi/visitor.h"
33
34#define VIRTIO_PCI_REGION_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_present(dev))
35
36#undef VIRTIO_PCI_CONFIG
37
38
39
40#define VIRTIO_PCI_CONFIG_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_enabled(dev))
41
42static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size,
43 VirtIOPCIProxy *dev);
44static void virtio_pci_reset(DeviceState *qdev);
45
46
47
48static inline VirtIOPCIProxy *to_virtio_pci_proxy(DeviceState *d)
49{
50 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
51}
52
53
54
55
56static inline VirtIOPCIProxy *to_virtio_pci_proxy_fast(DeviceState *d)
57{
58 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
59}
60
61static void virtio_pci_notify(DeviceState *d, uint16_t vector)
62{
63 VirtIOPCIProxy *proxy = to_virtio_pci_proxy_fast(d);
64
65 if (msix_enabled(&proxy->pci_dev))
66 msix_notify(&proxy->pci_dev, vector);
67 else {
68 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
69 pci_set_irq(&proxy->pci_dev, atomic_read(&vdev->isr) & 1);
70 }
71}
72
73static void virtio_pci_save_config(DeviceState *d, QEMUFile *f)
74{
75 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
76 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
77
78 pci_device_save(&proxy->pci_dev, f);
79 msix_save(&proxy->pci_dev, f);
80 if (msix_present(&proxy->pci_dev))
81 qemu_put_be16(f, vdev->config_vector);
82}
83
84static const VMStateDescription vmstate_virtio_pci_modern_queue_state = {
85 .name = "virtio_pci/modern_queue_state",
86 .version_id = 1,
87 .minimum_version_id = 1,
88 .fields = (VMStateField[]) {
89 VMSTATE_UINT16(num, VirtIOPCIQueue),
90 VMSTATE_UNUSED(1),
91 VMSTATE_BOOL(enabled, VirtIOPCIQueue),
92 VMSTATE_UINT32_ARRAY(desc, VirtIOPCIQueue, 2),
93 VMSTATE_UINT32_ARRAY(avail, VirtIOPCIQueue, 2),
94 VMSTATE_UINT32_ARRAY(used, VirtIOPCIQueue, 2),
95 VMSTATE_END_OF_LIST()
96 }
97};
98
99static bool virtio_pci_modern_state_needed(void *opaque)
100{
101 VirtIOPCIProxy *proxy = opaque;
102
103 return virtio_pci_modern(proxy);
104}
105
106static const VMStateDescription vmstate_virtio_pci_modern_state_sub = {
107 .name = "virtio_pci/modern_state",
108 .version_id = 1,
109 .minimum_version_id = 1,
110 .needed = &virtio_pci_modern_state_needed,
111 .fields = (VMStateField[]) {
112 VMSTATE_UINT32(dfselect, VirtIOPCIProxy),
113 VMSTATE_UINT32(gfselect, VirtIOPCIProxy),
114 VMSTATE_UINT32_ARRAY(guest_features, VirtIOPCIProxy, 2),
115 VMSTATE_STRUCT_ARRAY(vqs, VirtIOPCIProxy, VIRTIO_QUEUE_MAX, 0,
116 vmstate_virtio_pci_modern_queue_state,
117 VirtIOPCIQueue),
118 VMSTATE_END_OF_LIST()
119 }
120};
121
122static const VMStateDescription vmstate_virtio_pci = {
123 .name = "virtio_pci",
124 .version_id = 1,
125 .minimum_version_id = 1,
126 .minimum_version_id_old = 1,
127 .fields = (VMStateField[]) {
128 VMSTATE_END_OF_LIST()
129 },
130 .subsections = (const VMStateDescription*[]) {
131 &vmstate_virtio_pci_modern_state_sub,
132 NULL
133 }
134};
135
136static bool virtio_pci_has_extra_state(DeviceState *d)
137{
138 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
139
140 return proxy->flags & VIRTIO_PCI_FLAG_MIGRATE_EXTRA;
141}
142
143static void virtio_pci_save_extra_state(DeviceState *d, QEMUFile *f)
144{
145 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
146
147 vmstate_save_state(f, &vmstate_virtio_pci, proxy, NULL);
148}
149
150static int virtio_pci_load_extra_state(DeviceState *d, QEMUFile *f)
151{
152 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
153
154 return vmstate_load_state(f, &vmstate_virtio_pci, proxy, 1);
155}
156
157static void virtio_pci_save_queue(DeviceState *d, int n, QEMUFile *f)
158{
159 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
160 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
161
162 if (msix_present(&proxy->pci_dev))
163 qemu_put_be16(f, virtio_queue_vector(vdev, n));
164}
165
166static int virtio_pci_load_config(DeviceState *d, QEMUFile *f)
167{
168 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
169 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
170
171 int ret;
172 ret = pci_device_load(&proxy->pci_dev, f);
173 if (ret) {
174 return ret;
175 }
176 msix_unuse_all_vectors(&proxy->pci_dev);
177 msix_load(&proxy->pci_dev, f);
178 if (msix_present(&proxy->pci_dev)) {
179 qemu_get_be16s(f, &vdev->config_vector);
180 } else {
181 vdev->config_vector = VIRTIO_NO_VECTOR;
182 }
183 if (vdev->config_vector != VIRTIO_NO_VECTOR) {
184 return msix_vector_use(&proxy->pci_dev, vdev->config_vector);
185 }
186 return 0;
187}
188
189static int virtio_pci_load_queue(DeviceState *d, int n, QEMUFile *f)
190{
191 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
192 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
193
194 uint16_t vector;
195 if (msix_present(&proxy->pci_dev)) {
196 qemu_get_be16s(f, &vector);
197 } else {
198 vector = VIRTIO_NO_VECTOR;
199 }
200 virtio_queue_set_vector(vdev, n, vector);
201 if (vector != VIRTIO_NO_VECTOR) {
202 return msix_vector_use(&proxy->pci_dev, vector);
203 }
204
205 return 0;
206}
207
208static bool virtio_pci_ioeventfd_enabled(DeviceState *d)
209{
210 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
211
212 return (proxy->flags & VIRTIO_PCI_FLAG_USE_IOEVENTFD) != 0;
213}
214
215#define QEMU_VIRTIO_PCI_QUEUE_MEM_MULT 0x1000
216
217static inline int virtio_pci_queue_mem_mult(struct VirtIOPCIProxy *proxy)
218{
219 return (proxy->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ) ?
220 QEMU_VIRTIO_PCI_QUEUE_MEM_MULT : 4;
221}
222
223static int virtio_pci_ioeventfd_assign(DeviceState *d, EventNotifier *notifier,
224 int n, bool assign)
225{
226 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
227 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
228 VirtQueue *vq = virtio_get_queue(vdev, n);
229 bool legacy = virtio_pci_legacy(proxy);
230 bool modern = virtio_pci_modern(proxy);
231 bool fast_mmio = kvm_ioeventfd_any_length_enabled();
232 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
233 MemoryRegion *modern_mr = &proxy->notify.mr;
234 MemoryRegion *modern_notify_mr = &proxy->notify_pio.mr;
235 MemoryRegion *legacy_mr = &proxy->bar;
236 hwaddr modern_addr = virtio_pci_queue_mem_mult(proxy) *
237 virtio_get_queue_index(vq);
238 hwaddr legacy_addr = VIRTIO_PCI_QUEUE_NOTIFY;
239
240 if (assign) {
241 if (modern) {
242 if (fast_mmio) {
243 memory_region_add_eventfd(modern_mr, modern_addr, 0,
244 false, n, notifier);
245 } else {
246 memory_region_add_eventfd(modern_mr, modern_addr, 2,
247 false, n, notifier);
248 }
249 if (modern_pio) {
250 memory_region_add_eventfd(modern_notify_mr, 0, 2,
251 true, n, notifier);
252 }
253 }
254 if (legacy) {
255 memory_region_add_eventfd(legacy_mr, legacy_addr, 2,
256 true, n, notifier);
257 }
258 } else {
259 if (modern) {
260 if (fast_mmio) {
261 memory_region_del_eventfd(modern_mr, modern_addr, 0,
262 false, n, notifier);
263 } else {
264 memory_region_del_eventfd(modern_mr, modern_addr, 2,
265 false, n, notifier);
266 }
267 if (modern_pio) {
268 memory_region_del_eventfd(modern_notify_mr, 0, 2,
269 true, n, notifier);
270 }
271 }
272 if (legacy) {
273 memory_region_del_eventfd(legacy_mr, legacy_addr, 2,
274 true, n, notifier);
275 }
276 }
277 return 0;
278}
279
280static void virtio_pci_start_ioeventfd(VirtIOPCIProxy *proxy)
281{
282 virtio_bus_start_ioeventfd(&proxy->bus);
283}
284
285static void virtio_pci_stop_ioeventfd(VirtIOPCIProxy *proxy)
286{
287 virtio_bus_stop_ioeventfd(&proxy->bus);
288}
289
290static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
291{
292 VirtIOPCIProxy *proxy = opaque;
293 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
294 hwaddr pa;
295
296 switch (addr) {
297 case VIRTIO_PCI_GUEST_FEATURES:
298
299 if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
300 val = virtio_bus_get_vdev_bad_features(&proxy->bus);
301 }
302 virtio_set_features(vdev, val);
303 break;
304 case VIRTIO_PCI_QUEUE_PFN:
305 pa = (hwaddr)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
306 if (pa == 0) {
307 virtio_pci_reset(DEVICE(proxy));
308 }
309 else
310 virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
311 break;
312 case VIRTIO_PCI_QUEUE_SEL:
313 if (val < VIRTIO_QUEUE_MAX)
314 vdev->queue_sel = val;
315 break;
316 case VIRTIO_PCI_QUEUE_NOTIFY:
317 if (val < VIRTIO_QUEUE_MAX) {
318 virtio_queue_notify(vdev, val);
319 }
320 break;
321 case VIRTIO_PCI_STATUS:
322 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
323 virtio_pci_stop_ioeventfd(proxy);
324 }
325
326 virtio_set_status(vdev, val & 0xFF);
327
328 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
329 virtio_pci_start_ioeventfd(proxy);
330 }
331
332 if (vdev->status == 0) {
333 virtio_pci_reset(DEVICE(proxy));
334 }
335
336
337
338
339
340 if (val == (VIRTIO_CONFIG_S_ACKNOWLEDGE | VIRTIO_CONFIG_S_DRIVER)) {
341 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND,
342 proxy->pci_dev.config[PCI_COMMAND] |
343 PCI_COMMAND_MASTER, 1);
344 }
345 break;
346 case VIRTIO_MSI_CONFIG_VECTOR:
347 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
348
349 if (msix_vector_use(&proxy->pci_dev, val) < 0)
350 val = VIRTIO_NO_VECTOR;
351 vdev->config_vector = val;
352 break;
353 case VIRTIO_MSI_QUEUE_VECTOR:
354 msix_vector_unuse(&proxy->pci_dev,
355 virtio_queue_vector(vdev, vdev->queue_sel));
356
357 if (msix_vector_use(&proxy->pci_dev, val) < 0)
358 val = VIRTIO_NO_VECTOR;
359 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
360 break;
361 default:
362 error_report("%s: unexpected address 0x%x value 0x%x",
363 __func__, addr, val);
364 break;
365 }
366}
367
368static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
369{
370 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
371 uint32_t ret = 0xFFFFFFFF;
372
373 switch (addr) {
374 case VIRTIO_PCI_HOST_FEATURES:
375 ret = vdev->host_features;
376 break;
377 case VIRTIO_PCI_GUEST_FEATURES:
378 ret = vdev->guest_features;
379 break;
380 case VIRTIO_PCI_QUEUE_PFN:
381 ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
382 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
383 break;
384 case VIRTIO_PCI_QUEUE_NUM:
385 ret = virtio_queue_get_num(vdev, vdev->queue_sel);
386 break;
387 case VIRTIO_PCI_QUEUE_SEL:
388 ret = vdev->queue_sel;
389 break;
390 case VIRTIO_PCI_STATUS:
391 ret = vdev->status;
392 break;
393 case VIRTIO_PCI_ISR:
394
395 ret = atomic_xchg(&vdev->isr, 0);
396 pci_irq_deassert(&proxy->pci_dev);
397 break;
398 case VIRTIO_MSI_CONFIG_VECTOR:
399 ret = vdev->config_vector;
400 break;
401 case VIRTIO_MSI_QUEUE_VECTOR:
402 ret = virtio_queue_vector(vdev, vdev->queue_sel);
403 break;
404 default:
405 break;
406 }
407
408 return ret;
409}
410
411static uint64_t virtio_pci_config_read(void *opaque, hwaddr addr,
412 unsigned size)
413{
414 VirtIOPCIProxy *proxy = opaque;
415 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
416 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev);
417 uint64_t val = 0;
418 if (addr < config) {
419 return virtio_ioport_read(proxy, addr);
420 }
421 addr -= config;
422
423 switch (size) {
424 case 1:
425 val = virtio_config_readb(vdev, addr);
426 break;
427 case 2:
428 val = virtio_config_readw(vdev, addr);
429 if (virtio_is_big_endian(vdev)) {
430 val = bswap16(val);
431 }
432 break;
433 case 4:
434 val = virtio_config_readl(vdev, addr);
435 if (virtio_is_big_endian(vdev)) {
436 val = bswap32(val);
437 }
438 break;
439 }
440 return val;
441}
442
443static void virtio_pci_config_write(void *opaque, hwaddr addr,
444 uint64_t val, unsigned size)
445{
446 VirtIOPCIProxy *proxy = opaque;
447 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev);
448 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
449 if (addr < config) {
450 virtio_ioport_write(proxy, addr, val);
451 return;
452 }
453 addr -= config;
454
455
456
457
458 switch (size) {
459 case 1:
460 virtio_config_writeb(vdev, addr, val);
461 break;
462 case 2:
463 if (virtio_is_big_endian(vdev)) {
464 val = bswap16(val);
465 }
466 virtio_config_writew(vdev, addr, val);
467 break;
468 case 4:
469 if (virtio_is_big_endian(vdev)) {
470 val = bswap32(val);
471 }
472 virtio_config_writel(vdev, addr, val);
473 break;
474 }
475}
476
477static const MemoryRegionOps virtio_pci_config_ops = {
478 .read = virtio_pci_config_read,
479 .write = virtio_pci_config_write,
480 .impl = {
481 .min_access_size = 1,
482 .max_access_size = 4,
483 },
484 .endianness = DEVICE_LITTLE_ENDIAN,
485};
486
487static MemoryRegion *virtio_address_space_lookup(VirtIOPCIProxy *proxy,
488 hwaddr *off, int len)
489{
490 int i;
491 VirtIOPCIRegion *reg;
492
493 for (i = 0; i < ARRAY_SIZE(proxy->regs); ++i) {
494 reg = &proxy->regs[i];
495 if (*off >= reg->offset &&
496 *off + len <= reg->offset + reg->size) {
497 *off -= reg->offset;
498 return ®->mr;
499 }
500 }
501
502 return NULL;
503}
504
505
506
507
508
509
510
511
512
513
514
515
516
517static
518void virtio_address_space_write(VirtIOPCIProxy *proxy, hwaddr addr,
519 const uint8_t *buf, int len)
520{
521 uint64_t val;
522 MemoryRegion *mr;
523
524
525
526
527 addr &= ~(len - 1);
528
529 mr = virtio_address_space_lookup(proxy, &addr, len);
530 if (!mr) {
531 return;
532 }
533
534
535 assert(!(((uintptr_t)buf) & (len - 1)));
536
537 switch (len) {
538 case 1:
539 val = pci_get_byte(buf);
540 break;
541 case 2:
542 val = cpu_to_le16(pci_get_word(buf));
543 break;
544 case 4:
545 val = cpu_to_le32(pci_get_long(buf));
546 break;
547 default:
548
549 return;
550 }
551 memory_region_dispatch_write(mr, addr, val, len, MEMTXATTRS_UNSPECIFIED);
552}
553
554static void
555virtio_address_space_read(VirtIOPCIProxy *proxy, hwaddr addr,
556 uint8_t *buf, int len)
557{
558 uint64_t val;
559 MemoryRegion *mr;
560
561
562
563
564 addr &= ~(len - 1);
565
566 mr = virtio_address_space_lookup(proxy, &addr, len);
567 if (!mr) {
568 return;
569 }
570
571
572 assert(!(((uintptr_t)buf) & (len - 1)));
573
574 memory_region_dispatch_read(mr, addr, &val, len, MEMTXATTRS_UNSPECIFIED);
575 switch (len) {
576 case 1:
577 pci_set_byte(buf, val);
578 break;
579 case 2:
580 pci_set_word(buf, le16_to_cpu(val));
581 break;
582 case 4:
583 pci_set_long(buf, le32_to_cpu(val));
584 break;
585 default:
586
587 break;
588 }
589}
590
591static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
592 uint32_t val, int len)
593{
594 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
595 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
596 struct virtio_pci_cfg_cap *cfg;
597
598 pci_default_write_config(pci_dev, address, val, len);
599
600 if (range_covers_byte(address, len, PCI_COMMAND) &&
601 !(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
602 virtio_pci_stop_ioeventfd(proxy);
603 virtio_set_status(vdev, vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK);
604 }
605
606 if (proxy->config_cap &&
607 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap,
608 pci_cfg_data),
609 sizeof cfg->pci_cfg_data)) {
610 uint32_t off;
611 uint32_t len;
612
613 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap);
614 off = le32_to_cpu(cfg->cap.offset);
615 len = le32_to_cpu(cfg->cap.length);
616
617 if (len == 1 || len == 2 || len == 4) {
618 assert(len <= sizeof cfg->pci_cfg_data);
619 virtio_address_space_write(proxy, off, cfg->pci_cfg_data, len);
620 }
621 }
622}
623
624static uint32_t virtio_read_config(PCIDevice *pci_dev,
625 uint32_t address, int len)
626{
627 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
628 struct virtio_pci_cfg_cap *cfg;
629
630 if (proxy->config_cap &&
631 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap,
632 pci_cfg_data),
633 sizeof cfg->pci_cfg_data)) {
634 uint32_t off;
635 uint32_t len;
636
637 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap);
638 off = le32_to_cpu(cfg->cap.offset);
639 len = le32_to_cpu(cfg->cap.length);
640
641 if (len == 1 || len == 2 || len == 4) {
642 assert(len <= sizeof cfg->pci_cfg_data);
643 virtio_address_space_read(proxy, off, cfg->pci_cfg_data, len);
644 }
645 }
646
647 return pci_default_read_config(pci_dev, address, len);
648}
649
650static int kvm_virtio_pci_vq_vector_use(VirtIOPCIProxy *proxy,
651 unsigned int queue_no,
652 unsigned int vector)
653{
654 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
655 int ret;
656
657 if (irqfd->users == 0) {
658 ret = kvm_irqchip_add_msi_route(kvm_state, vector, &proxy->pci_dev);
659 if (ret < 0) {
660 return ret;
661 }
662 irqfd->virq = ret;
663 }
664 irqfd->users++;
665 return 0;
666}
667
668static void kvm_virtio_pci_vq_vector_release(VirtIOPCIProxy *proxy,
669 unsigned int vector)
670{
671 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
672 if (--irqfd->users == 0) {
673 kvm_irqchip_release_virq(kvm_state, irqfd->virq);
674 }
675}
676
677static int kvm_virtio_pci_irqfd_use(VirtIOPCIProxy *proxy,
678 unsigned int queue_no,
679 unsigned int vector)
680{
681 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
682 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
683 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
684 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
685 return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, irqfd->virq);
686}
687
688static void kvm_virtio_pci_irqfd_release(VirtIOPCIProxy *proxy,
689 unsigned int queue_no,
690 unsigned int vector)
691{
692 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
693 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
694 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
695 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
696 int ret;
697
698 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, irqfd->virq);
699 assert(ret == 0);
700}
701
702static int kvm_virtio_pci_vector_use(VirtIOPCIProxy *proxy, int nvqs)
703{
704 PCIDevice *dev = &proxy->pci_dev;
705 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
706 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
707 unsigned int vector;
708 int ret, queue_no;
709
710 for (queue_no = 0; queue_no < nvqs; queue_no++) {
711 if (!virtio_queue_get_num(vdev, queue_no)) {
712 break;
713 }
714 vector = virtio_queue_vector(vdev, queue_no);
715 if (vector >= msix_nr_vectors_allocated(dev)) {
716 continue;
717 }
718 ret = kvm_virtio_pci_vq_vector_use(proxy, queue_no, vector);
719 if (ret < 0) {
720 goto undo;
721 }
722
723
724
725 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
726 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector);
727 if (ret < 0) {
728 kvm_virtio_pci_vq_vector_release(proxy, vector);
729 goto undo;
730 }
731 }
732 }
733 return 0;
734
735undo:
736 while (--queue_no >= 0) {
737 vector = virtio_queue_vector(vdev, queue_no);
738 if (vector >= msix_nr_vectors_allocated(dev)) {
739 continue;
740 }
741 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
742 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
743 }
744 kvm_virtio_pci_vq_vector_release(proxy, vector);
745 }
746 return ret;
747}
748
749static void kvm_virtio_pci_vector_release(VirtIOPCIProxy *proxy, int nvqs)
750{
751 PCIDevice *dev = &proxy->pci_dev;
752 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
753 unsigned int vector;
754 int queue_no;
755 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
756
757 for (queue_no = 0; queue_no < nvqs; queue_no++) {
758 if (!virtio_queue_get_num(vdev, queue_no)) {
759 break;
760 }
761 vector = virtio_queue_vector(vdev, queue_no);
762 if (vector >= msix_nr_vectors_allocated(dev)) {
763 continue;
764 }
765
766
767
768 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
769 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
770 }
771 kvm_virtio_pci_vq_vector_release(proxy, vector);
772 }
773}
774
775static int virtio_pci_vq_vector_unmask(VirtIOPCIProxy *proxy,
776 unsigned int queue_no,
777 unsigned int vector,
778 MSIMessage msg)
779{
780 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
781 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
782 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
783 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
784 VirtIOIRQFD *irqfd;
785 int ret = 0;
786
787 if (proxy->vector_irqfd) {
788 irqfd = &proxy->vector_irqfd[vector];
789 if (irqfd->msg.data != msg.data || irqfd->msg.address != msg.address) {
790 ret = kvm_irqchip_update_msi_route(kvm_state, irqfd->virq, msg,
791 &proxy->pci_dev);
792 if (ret < 0) {
793 return ret;
794 }
795 kvm_irqchip_commit_routes(kvm_state);
796 }
797 }
798
799
800
801
802 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
803 k->guest_notifier_mask(vdev, queue_no, false);
804
805 if (k->guest_notifier_pending &&
806 k->guest_notifier_pending(vdev, queue_no)) {
807 event_notifier_set(n);
808 }
809 } else {
810 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector);
811 }
812 return ret;
813}
814
815static void virtio_pci_vq_vector_mask(VirtIOPCIProxy *proxy,
816 unsigned int queue_no,
817 unsigned int vector)
818{
819 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
820 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
821
822
823
824
825 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
826 k->guest_notifier_mask(vdev, queue_no, true);
827 } else {
828 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
829 }
830}
831
832static int virtio_pci_vector_unmask(PCIDevice *dev, unsigned vector,
833 MSIMessage msg)
834{
835 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
836 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
837 VirtQueue *vq = virtio_vector_first_queue(vdev, vector);
838 int ret, index, unmasked = 0;
839
840 while (vq) {
841 index = virtio_get_queue_index(vq);
842 if (!virtio_queue_get_num(vdev, index)) {
843 break;
844 }
845 if (index < proxy->nvqs_with_notifiers) {
846 ret = virtio_pci_vq_vector_unmask(proxy, index, vector, msg);
847 if (ret < 0) {
848 goto undo;
849 }
850 ++unmasked;
851 }
852 vq = virtio_vector_next_queue(vq);
853 }
854
855 return 0;
856
857undo:
858 vq = virtio_vector_first_queue(vdev, vector);
859 while (vq && unmasked >= 0) {
860 index = virtio_get_queue_index(vq);
861 if (index < proxy->nvqs_with_notifiers) {
862 virtio_pci_vq_vector_mask(proxy, index, vector);
863 --unmasked;
864 }
865 vq = virtio_vector_next_queue(vq);
866 }
867 return ret;
868}
869
870static void virtio_pci_vector_mask(PCIDevice *dev, unsigned vector)
871{
872 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
873 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
874 VirtQueue *vq = virtio_vector_first_queue(vdev, vector);
875 int index;
876
877 while (vq) {
878 index = virtio_get_queue_index(vq);
879 if (!virtio_queue_get_num(vdev, index)) {
880 break;
881 }
882 if (index < proxy->nvqs_with_notifiers) {
883 virtio_pci_vq_vector_mask(proxy, index, vector);
884 }
885 vq = virtio_vector_next_queue(vq);
886 }
887}
888
889static void virtio_pci_vector_poll(PCIDevice *dev,
890 unsigned int vector_start,
891 unsigned int vector_end)
892{
893 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
894 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
895 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
896 int queue_no;
897 unsigned int vector;
898 EventNotifier *notifier;
899 VirtQueue *vq;
900
901 for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) {
902 if (!virtio_queue_get_num(vdev, queue_no)) {
903 break;
904 }
905 vector = virtio_queue_vector(vdev, queue_no);
906 if (vector < vector_start || vector >= vector_end ||
907 !msix_is_masked(dev, vector)) {
908 continue;
909 }
910 vq = virtio_get_queue(vdev, queue_no);
911 notifier = virtio_queue_get_guest_notifier(vq);
912 if (k->guest_notifier_pending) {
913 if (k->guest_notifier_pending(vdev, queue_no)) {
914 msix_set_pending(dev, vector);
915 }
916 } else if (event_notifier_test_and_clear(notifier)) {
917 msix_set_pending(dev, vector);
918 }
919 }
920}
921
922static int virtio_pci_set_guest_notifier(DeviceState *d, int n, bool assign,
923 bool with_irqfd)
924{
925 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
926 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
927 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev);
928 VirtQueue *vq = virtio_get_queue(vdev, n);
929 EventNotifier *notifier = virtio_queue_get_guest_notifier(vq);
930
931 if (assign) {
932 int r = event_notifier_init(notifier, 0);
933 if (r < 0) {
934 return r;
935 }
936 virtio_queue_set_guest_notifier_fd_handler(vq, true, with_irqfd);
937 } else {
938 virtio_queue_set_guest_notifier_fd_handler(vq, false, with_irqfd);
939 event_notifier_cleanup(notifier);
940 }
941
942 if (!msix_enabled(&proxy->pci_dev) &&
943 vdev->use_guest_notifier_mask &&
944 vdc->guest_notifier_mask) {
945 vdc->guest_notifier_mask(vdev, n, !assign);
946 }
947
948 return 0;
949}
950
951static bool virtio_pci_query_guest_notifiers(DeviceState *d)
952{
953 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
954 return msix_enabled(&proxy->pci_dev);
955}
956
957static int virtio_pci_set_guest_notifiers(DeviceState *d, int nvqs, bool assign)
958{
959 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
960 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
961 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
962 int r, n;
963 bool with_irqfd = msix_enabled(&proxy->pci_dev) &&
964 kvm_msi_via_irqfd_enabled();
965
966 nvqs = MIN(nvqs, VIRTIO_QUEUE_MAX);
967
968
969
970
971 assert(assign || nvqs == proxy->nvqs_with_notifiers);
972
973 proxy->nvqs_with_notifiers = nvqs;
974
975
976 if ((proxy->vector_irqfd || k->guest_notifier_mask) && !assign) {
977 msix_unset_vector_notifiers(&proxy->pci_dev);
978 if (proxy->vector_irqfd) {
979 kvm_virtio_pci_vector_release(proxy, nvqs);
980 g_free(proxy->vector_irqfd);
981 proxy->vector_irqfd = NULL;
982 }
983 }
984
985 for (n = 0; n < nvqs; n++) {
986 if (!virtio_queue_get_num(vdev, n)) {
987 break;
988 }
989
990 r = virtio_pci_set_guest_notifier(d, n, assign, with_irqfd);
991 if (r < 0) {
992 goto assign_error;
993 }
994 }
995
996
997 if ((with_irqfd || k->guest_notifier_mask) && assign) {
998 if (with_irqfd) {
999 proxy->vector_irqfd =
1000 g_malloc0(sizeof(*proxy->vector_irqfd) *
1001 msix_nr_vectors_allocated(&proxy->pci_dev));
1002 r = kvm_virtio_pci_vector_use(proxy, nvqs);
1003 if (r < 0) {
1004 goto assign_error;
1005 }
1006 }
1007 r = msix_set_vector_notifiers(&proxy->pci_dev,
1008 virtio_pci_vector_unmask,
1009 virtio_pci_vector_mask,
1010 virtio_pci_vector_poll);
1011 if (r < 0) {
1012 goto notifiers_error;
1013 }
1014 }
1015
1016 return 0;
1017
1018notifiers_error:
1019 if (with_irqfd) {
1020 assert(assign);
1021 kvm_virtio_pci_vector_release(proxy, nvqs);
1022 }
1023
1024assign_error:
1025
1026 assert(assign);
1027 while (--n >= 0) {
1028 virtio_pci_set_guest_notifier(d, n, !assign, with_irqfd);
1029 }
1030 return r;
1031}
1032
1033static int virtio_pci_set_host_notifier_mr(DeviceState *d, int n,
1034 MemoryRegion *mr, bool assign)
1035{
1036 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1037 int offset;
1038
1039 if (n >= VIRTIO_QUEUE_MAX || !virtio_pci_modern(proxy) ||
1040 virtio_pci_queue_mem_mult(proxy) != memory_region_size(mr)) {
1041 return -1;
1042 }
1043
1044 if (assign) {
1045 offset = virtio_pci_queue_mem_mult(proxy) * n;
1046 memory_region_add_subregion_overlap(&proxy->notify.mr, offset, mr, 1);
1047 } else {
1048 memory_region_del_subregion(&proxy->notify.mr, mr);
1049 }
1050
1051 return 0;
1052}
1053
1054static void virtio_pci_vmstate_change(DeviceState *d, bool running)
1055{
1056 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1057 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1058
1059 if (running) {
1060
1061
1062
1063 if ((proxy->flags & VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION) &&
1064 (vdev->status & VIRTIO_CONFIG_S_DRIVER) &&
1065 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
1066 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND,
1067 proxy->pci_dev.config[PCI_COMMAND] |
1068 PCI_COMMAND_MASTER, 1);
1069 }
1070 virtio_pci_start_ioeventfd(proxy);
1071 } else {
1072 virtio_pci_stop_ioeventfd(proxy);
1073 }
1074}
1075
1076
1077
1078
1079
1080static int virtio_pci_query_nvectors(DeviceState *d)
1081{
1082 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1083
1084 return proxy->nvectors;
1085}
1086
1087static AddressSpace *virtio_pci_get_dma_as(DeviceState *d)
1088{
1089 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1090 PCIDevice *dev = &proxy->pci_dev;
1091
1092 return pci_get_address_space(dev);
1093}
1094
1095static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy,
1096 struct virtio_pci_cap *cap)
1097{
1098 PCIDevice *dev = &proxy->pci_dev;
1099 int offset;
1100
1101 offset = pci_add_capability(dev, PCI_CAP_ID_VNDR, 0,
1102 cap->cap_len, &error_abort);
1103
1104 assert(cap->cap_len >= sizeof *cap);
1105 memcpy(dev->config + offset + PCI_CAP_FLAGS, &cap->cap_len,
1106 cap->cap_len - PCI_CAP_FLAGS);
1107
1108 return offset;
1109}
1110
1111static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr,
1112 unsigned size)
1113{
1114 VirtIOPCIProxy *proxy = opaque;
1115 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1116 uint32_t val = 0;
1117 int i;
1118
1119 switch (addr) {
1120 case VIRTIO_PCI_COMMON_DFSELECT:
1121 val = proxy->dfselect;
1122 break;
1123 case VIRTIO_PCI_COMMON_DF:
1124 if (proxy->dfselect <= 1) {
1125 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev);
1126
1127 val = (vdev->host_features & ~vdc->legacy_features) >>
1128 (32 * proxy->dfselect);
1129 }
1130 break;
1131 case VIRTIO_PCI_COMMON_GFSELECT:
1132 val = proxy->gfselect;
1133 break;
1134 case VIRTIO_PCI_COMMON_GF:
1135 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) {
1136 val = proxy->guest_features[proxy->gfselect];
1137 }
1138 break;
1139 case VIRTIO_PCI_COMMON_MSIX:
1140 val = vdev->config_vector;
1141 break;
1142 case VIRTIO_PCI_COMMON_NUMQ:
1143 for (i = 0; i < VIRTIO_QUEUE_MAX; ++i) {
1144 if (virtio_queue_get_num(vdev, i)) {
1145 val = i + 1;
1146 }
1147 }
1148 break;
1149 case VIRTIO_PCI_COMMON_STATUS:
1150 val = vdev->status;
1151 break;
1152 case VIRTIO_PCI_COMMON_CFGGENERATION:
1153 val = vdev->generation;
1154 break;
1155 case VIRTIO_PCI_COMMON_Q_SELECT:
1156 val = vdev->queue_sel;
1157 break;
1158 case VIRTIO_PCI_COMMON_Q_SIZE:
1159 val = virtio_queue_get_num(vdev, vdev->queue_sel);
1160 break;
1161 case VIRTIO_PCI_COMMON_Q_MSIX:
1162 val = virtio_queue_vector(vdev, vdev->queue_sel);
1163 break;
1164 case VIRTIO_PCI_COMMON_Q_ENABLE:
1165 val = proxy->vqs[vdev->queue_sel].enabled;
1166 break;
1167 case VIRTIO_PCI_COMMON_Q_NOFF:
1168
1169 val = vdev->queue_sel;
1170 break;
1171 case VIRTIO_PCI_COMMON_Q_DESCLO:
1172 val = proxy->vqs[vdev->queue_sel].desc[0];
1173 break;
1174 case VIRTIO_PCI_COMMON_Q_DESCHI:
1175 val = proxy->vqs[vdev->queue_sel].desc[1];
1176 break;
1177 case VIRTIO_PCI_COMMON_Q_AVAILLO:
1178 val = proxy->vqs[vdev->queue_sel].avail[0];
1179 break;
1180 case VIRTIO_PCI_COMMON_Q_AVAILHI:
1181 val = proxy->vqs[vdev->queue_sel].avail[1];
1182 break;
1183 case VIRTIO_PCI_COMMON_Q_USEDLO:
1184 val = proxy->vqs[vdev->queue_sel].used[0];
1185 break;
1186 case VIRTIO_PCI_COMMON_Q_USEDHI:
1187 val = proxy->vqs[vdev->queue_sel].used[1];
1188 break;
1189 default:
1190 val = 0;
1191 }
1192
1193 return val;
1194}
1195
1196static void virtio_pci_common_write(void *opaque, hwaddr addr,
1197 uint64_t val, unsigned size)
1198{
1199 VirtIOPCIProxy *proxy = opaque;
1200 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1201
1202 switch (addr) {
1203 case VIRTIO_PCI_COMMON_DFSELECT:
1204 proxy->dfselect = val;
1205 break;
1206 case VIRTIO_PCI_COMMON_GFSELECT:
1207 proxy->gfselect = val;
1208 break;
1209 case VIRTIO_PCI_COMMON_GF:
1210 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) {
1211 proxy->guest_features[proxy->gfselect] = val;
1212 virtio_set_features(vdev,
1213 (((uint64_t)proxy->guest_features[1]) << 32) |
1214 proxy->guest_features[0]);
1215 }
1216 break;
1217 case VIRTIO_PCI_COMMON_MSIX:
1218 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
1219
1220 if (msix_vector_use(&proxy->pci_dev, val) < 0) {
1221 val = VIRTIO_NO_VECTOR;
1222 }
1223 vdev->config_vector = val;
1224 break;
1225 case VIRTIO_PCI_COMMON_STATUS:
1226 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
1227 virtio_pci_stop_ioeventfd(proxy);
1228 }
1229
1230 virtio_set_status(vdev, val & 0xFF);
1231
1232 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
1233 virtio_pci_start_ioeventfd(proxy);
1234 }
1235
1236 if (vdev->status == 0) {
1237 virtio_pci_reset(DEVICE(proxy));
1238 }
1239
1240 break;
1241 case VIRTIO_PCI_COMMON_Q_SELECT:
1242 if (val < VIRTIO_QUEUE_MAX) {
1243 vdev->queue_sel = val;
1244 }
1245 break;
1246 case VIRTIO_PCI_COMMON_Q_SIZE:
1247 proxy->vqs[vdev->queue_sel].num = val;
1248 break;
1249 case VIRTIO_PCI_COMMON_Q_MSIX:
1250 msix_vector_unuse(&proxy->pci_dev,
1251 virtio_queue_vector(vdev, vdev->queue_sel));
1252
1253 if (msix_vector_use(&proxy->pci_dev, val) < 0) {
1254 val = VIRTIO_NO_VECTOR;
1255 }
1256 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
1257 break;
1258 case VIRTIO_PCI_COMMON_Q_ENABLE:
1259 virtio_queue_set_num(vdev, vdev->queue_sel,
1260 proxy->vqs[vdev->queue_sel].num);
1261 virtio_queue_set_rings(vdev, vdev->queue_sel,
1262 ((uint64_t)proxy->vqs[vdev->queue_sel].desc[1]) << 32 |
1263 proxy->vqs[vdev->queue_sel].desc[0],
1264 ((uint64_t)proxy->vqs[vdev->queue_sel].avail[1]) << 32 |
1265 proxy->vqs[vdev->queue_sel].avail[0],
1266 ((uint64_t)proxy->vqs[vdev->queue_sel].used[1]) << 32 |
1267 proxy->vqs[vdev->queue_sel].used[0]);
1268 proxy->vqs[vdev->queue_sel].enabled = 1;
1269 break;
1270 case VIRTIO_PCI_COMMON_Q_DESCLO:
1271 proxy->vqs[vdev->queue_sel].desc[0] = val;
1272 break;
1273 case VIRTIO_PCI_COMMON_Q_DESCHI:
1274 proxy->vqs[vdev->queue_sel].desc[1] = val;
1275 break;
1276 case VIRTIO_PCI_COMMON_Q_AVAILLO:
1277 proxy->vqs[vdev->queue_sel].avail[0] = val;
1278 break;
1279 case VIRTIO_PCI_COMMON_Q_AVAILHI:
1280 proxy->vqs[vdev->queue_sel].avail[1] = val;
1281 break;
1282 case VIRTIO_PCI_COMMON_Q_USEDLO:
1283 proxy->vqs[vdev->queue_sel].used[0] = val;
1284 break;
1285 case VIRTIO_PCI_COMMON_Q_USEDHI:
1286 proxy->vqs[vdev->queue_sel].used[1] = val;
1287 break;
1288 default:
1289 break;
1290 }
1291}
1292
1293
1294static uint64_t virtio_pci_notify_read(void *opaque, hwaddr addr,
1295 unsigned size)
1296{
1297 return 0;
1298}
1299
1300static void virtio_pci_notify_write(void *opaque, hwaddr addr,
1301 uint64_t val, unsigned size)
1302{
1303 VirtIODevice *vdev = opaque;
1304 VirtIOPCIProxy *proxy = VIRTIO_PCI(DEVICE(vdev)->parent_bus->parent);
1305 unsigned queue = addr / virtio_pci_queue_mem_mult(proxy);
1306
1307 if (queue < VIRTIO_QUEUE_MAX) {
1308 virtio_queue_notify(vdev, queue);
1309 }
1310}
1311
1312static void virtio_pci_notify_write_pio(void *opaque, hwaddr addr,
1313 uint64_t val, unsigned size)
1314{
1315 VirtIODevice *vdev = opaque;
1316 unsigned queue = val;
1317
1318 if (queue < VIRTIO_QUEUE_MAX) {
1319 virtio_queue_notify(vdev, queue);
1320 }
1321}
1322
1323static uint64_t virtio_pci_isr_read(void *opaque, hwaddr addr,
1324 unsigned size)
1325{
1326 VirtIOPCIProxy *proxy = opaque;
1327 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1328 uint64_t val = atomic_xchg(&vdev->isr, 0);
1329 pci_irq_deassert(&proxy->pci_dev);
1330
1331 return val;
1332}
1333
1334static void virtio_pci_isr_write(void *opaque, hwaddr addr,
1335 uint64_t val, unsigned size)
1336{
1337}
1338
1339static uint64_t virtio_pci_device_read(void *opaque, hwaddr addr,
1340 unsigned size)
1341{
1342 VirtIODevice *vdev = opaque;
1343 uint64_t val = 0;
1344
1345 switch (size) {
1346 case 1:
1347 val = virtio_config_modern_readb(vdev, addr);
1348 break;
1349 case 2:
1350 val = virtio_config_modern_readw(vdev, addr);
1351 break;
1352 case 4:
1353 val = virtio_config_modern_readl(vdev, addr);
1354 break;
1355 }
1356 return val;
1357}
1358
1359static void virtio_pci_device_write(void *opaque, hwaddr addr,
1360 uint64_t val, unsigned size)
1361{
1362 VirtIODevice *vdev = opaque;
1363 switch (size) {
1364 case 1:
1365 virtio_config_modern_writeb(vdev, addr, val);
1366 break;
1367 case 2:
1368 virtio_config_modern_writew(vdev, addr, val);
1369 break;
1370 case 4:
1371 virtio_config_modern_writel(vdev, addr, val);
1372 break;
1373 }
1374}
1375
1376static void virtio_pci_modern_regions_init(VirtIOPCIProxy *proxy)
1377{
1378 static const MemoryRegionOps common_ops = {
1379 .read = virtio_pci_common_read,
1380 .write = virtio_pci_common_write,
1381 .impl = {
1382 .min_access_size = 1,
1383 .max_access_size = 4,
1384 },
1385 .endianness = DEVICE_LITTLE_ENDIAN,
1386 };
1387 static const MemoryRegionOps isr_ops = {
1388 .read = virtio_pci_isr_read,
1389 .write = virtio_pci_isr_write,
1390 .impl = {
1391 .min_access_size = 1,
1392 .max_access_size = 4,
1393 },
1394 .endianness = DEVICE_LITTLE_ENDIAN,
1395 };
1396 static const MemoryRegionOps device_ops = {
1397 .read = virtio_pci_device_read,
1398 .write = virtio_pci_device_write,
1399 .impl = {
1400 .min_access_size = 1,
1401 .max_access_size = 4,
1402 },
1403 .endianness = DEVICE_LITTLE_ENDIAN,
1404 };
1405 static const MemoryRegionOps notify_ops = {
1406 .read = virtio_pci_notify_read,
1407 .write = virtio_pci_notify_write,
1408 .impl = {
1409 .min_access_size = 1,
1410 .max_access_size = 4,
1411 },
1412 .endianness = DEVICE_LITTLE_ENDIAN,
1413 };
1414 static const MemoryRegionOps notify_pio_ops = {
1415 .read = virtio_pci_notify_read,
1416 .write = virtio_pci_notify_write_pio,
1417 .impl = {
1418 .min_access_size = 1,
1419 .max_access_size = 4,
1420 },
1421 .endianness = DEVICE_LITTLE_ENDIAN,
1422 };
1423
1424
1425 memory_region_init_io(&proxy->common.mr, OBJECT(proxy),
1426 &common_ops,
1427 proxy,
1428 "virtio-pci-common",
1429 proxy->common.size);
1430
1431 memory_region_init_io(&proxy->isr.mr, OBJECT(proxy),
1432 &isr_ops,
1433 proxy,
1434 "virtio-pci-isr",
1435 proxy->isr.size);
1436
1437 memory_region_init_io(&proxy->device.mr, OBJECT(proxy),
1438 &device_ops,
1439 virtio_bus_get_device(&proxy->bus),
1440 "virtio-pci-device",
1441 proxy->device.size);
1442
1443 memory_region_init_io(&proxy->notify.mr, OBJECT(proxy),
1444 ¬ify_ops,
1445 virtio_bus_get_device(&proxy->bus),
1446 "virtio-pci-notify",
1447 proxy->notify.size);
1448
1449 memory_region_init_io(&proxy->notify_pio.mr, OBJECT(proxy),
1450 ¬ify_pio_ops,
1451 virtio_bus_get_device(&proxy->bus),
1452 "virtio-pci-notify-pio",
1453 proxy->notify_pio.size);
1454}
1455
1456static void virtio_pci_modern_region_map(VirtIOPCIProxy *proxy,
1457 VirtIOPCIRegion *region,
1458 struct virtio_pci_cap *cap,
1459 MemoryRegion *mr,
1460 uint8_t bar)
1461{
1462 memory_region_add_subregion(mr, region->offset, ®ion->mr);
1463
1464 cap->cfg_type = region->type;
1465 cap->bar = bar;
1466 cap->offset = cpu_to_le32(region->offset);
1467 cap->length = cpu_to_le32(region->size);
1468 virtio_pci_add_mem_cap(proxy, cap);
1469
1470}
1471
1472static void virtio_pci_modern_mem_region_map(VirtIOPCIProxy *proxy,
1473 VirtIOPCIRegion *region,
1474 struct virtio_pci_cap *cap)
1475{
1476 virtio_pci_modern_region_map(proxy, region, cap,
1477 &proxy->modern_bar, proxy->modern_mem_bar_idx);
1478}
1479
1480static void virtio_pci_modern_io_region_map(VirtIOPCIProxy *proxy,
1481 VirtIOPCIRegion *region,
1482 struct virtio_pci_cap *cap)
1483{
1484 virtio_pci_modern_region_map(proxy, region, cap,
1485 &proxy->io_bar, proxy->modern_io_bar_idx);
1486}
1487
1488static void virtio_pci_modern_mem_region_unmap(VirtIOPCIProxy *proxy,
1489 VirtIOPCIRegion *region)
1490{
1491 memory_region_del_subregion(&proxy->modern_bar,
1492 ®ion->mr);
1493}
1494
1495static void virtio_pci_modern_io_region_unmap(VirtIOPCIProxy *proxy,
1496 VirtIOPCIRegion *region)
1497{
1498 memory_region_del_subregion(&proxy->io_bar,
1499 ®ion->mr);
1500}
1501
1502static void virtio_pci_pre_plugged(DeviceState *d, Error **errp)
1503{
1504 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1505 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1506
1507 if (virtio_pci_modern(proxy)) {
1508 virtio_add_feature(&vdev->host_features, VIRTIO_F_VERSION_1);
1509 }
1510
1511 virtio_add_feature(&vdev->host_features, VIRTIO_F_BAD_FEATURE);
1512}
1513
1514
1515static void virtio_pci_device_plugged(DeviceState *d, Error **errp)
1516{
1517 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1518 VirtioBusState *bus = &proxy->bus;
1519 bool legacy = virtio_pci_legacy(proxy);
1520 bool modern;
1521 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
1522 uint8_t *config;
1523 uint32_t size;
1524 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1525
1526
1527
1528
1529
1530 if (!proxy->ignore_backend_features &&
1531 !virtio_has_feature(vdev->host_features, VIRTIO_F_VERSION_1)) {
1532 virtio_pci_disable_modern(proxy);
1533
1534 if (!legacy) {
1535 error_setg(errp, "Device doesn't support modern mode, and legacy"
1536 " mode is disabled");
1537 error_append_hint(errp, "Set disable-legacy to off\n");
1538
1539 return;
1540 }
1541 }
1542
1543 modern = virtio_pci_modern(proxy);
1544
1545 config = proxy->pci_dev.config;
1546 if (proxy->class_code) {
1547 pci_config_set_class(config, proxy->class_code);
1548 }
1549
1550 if (legacy) {
1551 if (virtio_host_has_feature(vdev, VIRTIO_F_IOMMU_PLATFORM)) {
1552 error_setg(errp, "VIRTIO_F_IOMMU_PLATFORM was supported by"
1553 " neither legacy nor transitional device");
1554 return ;
1555 }
1556
1557
1558
1559
1560
1561 pci_set_word(config + PCI_SUBSYSTEM_ID, virtio_bus_get_vdev_id(bus));
1562 } else {
1563
1564 pci_set_word(config + PCI_VENDOR_ID,
1565 PCI_VENDOR_ID_REDHAT_QUMRANET);
1566 pci_set_word(config + PCI_DEVICE_ID,
1567 0x1040 + virtio_bus_get_vdev_id(bus));
1568 pci_config_set_revision(config, 1);
1569 }
1570 config[PCI_INTERRUPT_PIN] = 1;
1571
1572
1573 if (modern) {
1574 struct virtio_pci_cap cap = {
1575 .cap_len = sizeof cap,
1576 };
1577 struct virtio_pci_notify_cap notify = {
1578 .cap.cap_len = sizeof notify,
1579 .notify_off_multiplier =
1580 cpu_to_le32(virtio_pci_queue_mem_mult(proxy)),
1581 };
1582 struct virtio_pci_cfg_cap cfg = {
1583 .cap.cap_len = sizeof cfg,
1584 .cap.cfg_type = VIRTIO_PCI_CAP_PCI_CFG,
1585 };
1586 struct virtio_pci_notify_cap notify_pio = {
1587 .cap.cap_len = sizeof notify,
1588 .notify_off_multiplier = cpu_to_le32(0x0),
1589 };
1590
1591 struct virtio_pci_cfg_cap *cfg_mask;
1592
1593 virtio_pci_modern_regions_init(proxy);
1594
1595 virtio_pci_modern_mem_region_map(proxy, &proxy->common, &cap);
1596 virtio_pci_modern_mem_region_map(proxy, &proxy->isr, &cap);
1597 virtio_pci_modern_mem_region_map(proxy, &proxy->device, &cap);
1598 virtio_pci_modern_mem_region_map(proxy, &proxy->notify, ¬ify.cap);
1599
1600 if (modern_pio) {
1601 memory_region_init(&proxy->io_bar, OBJECT(proxy),
1602 "virtio-pci-io", 0x4);
1603
1604 pci_register_bar(&proxy->pci_dev, proxy->modern_io_bar_idx,
1605 PCI_BASE_ADDRESS_SPACE_IO, &proxy->io_bar);
1606
1607 virtio_pci_modern_io_region_map(proxy, &proxy->notify_pio,
1608 ¬ify_pio.cap);
1609 }
1610
1611 pci_register_bar(&proxy->pci_dev, proxy->modern_mem_bar_idx,
1612 PCI_BASE_ADDRESS_SPACE_MEMORY |
1613 PCI_BASE_ADDRESS_MEM_PREFETCH |
1614 PCI_BASE_ADDRESS_MEM_TYPE_64,
1615 &proxy->modern_bar);
1616
1617 proxy->config_cap = virtio_pci_add_mem_cap(proxy, &cfg.cap);
1618 cfg_mask = (void *)(proxy->pci_dev.wmask + proxy->config_cap);
1619 pci_set_byte(&cfg_mask->cap.bar, ~0x0);
1620 pci_set_long((uint8_t *)&cfg_mask->cap.offset, ~0x0);
1621 pci_set_long((uint8_t *)&cfg_mask->cap.length, ~0x0);
1622 pci_set_long(cfg_mask->pci_cfg_data, ~0x0);
1623 }
1624
1625 if (proxy->nvectors) {
1626 int err = msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors,
1627 proxy->msix_bar_idx, NULL);
1628 if (err) {
1629
1630 if (err != -ENOTSUP) {
1631 warn_report("unable to init msix vectors to %" PRIu32,
1632 proxy->nvectors);
1633 }
1634 proxy->nvectors = 0;
1635 }
1636 }
1637
1638 proxy->pci_dev.config_write = virtio_write_config;
1639 proxy->pci_dev.config_read = virtio_read_config;
1640
1641 if (legacy) {
1642 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev)
1643 + virtio_bus_get_vdev_config_len(bus);
1644 size = pow2ceil(size);
1645
1646 memory_region_init_io(&proxy->bar, OBJECT(proxy),
1647 &virtio_pci_config_ops,
1648 proxy, "virtio-pci", size);
1649
1650 pci_register_bar(&proxy->pci_dev, proxy->legacy_io_bar_idx,
1651 PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar);
1652 }
1653}
1654
1655static void virtio_pci_device_unplugged(DeviceState *d)
1656{
1657 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1658 bool modern = virtio_pci_modern(proxy);
1659 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
1660
1661 virtio_pci_stop_ioeventfd(proxy);
1662
1663 if (modern) {
1664 virtio_pci_modern_mem_region_unmap(proxy, &proxy->common);
1665 virtio_pci_modern_mem_region_unmap(proxy, &proxy->isr);
1666 virtio_pci_modern_mem_region_unmap(proxy, &proxy->device);
1667 virtio_pci_modern_mem_region_unmap(proxy, &proxy->notify);
1668 if (modern_pio) {
1669 virtio_pci_modern_io_region_unmap(proxy, &proxy->notify_pio);
1670 }
1671 }
1672}
1673
1674static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
1675{
1676 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
1677 VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev);
1678 bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) &&
1679 !pci_bus_is_root(pci_get_bus(pci_dev));
1680
1681 if (kvm_enabled() && !kvm_has_many_ioeventfds()) {
1682 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD;
1683 }
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694 proxy->legacy_io_bar_idx = 0;
1695 proxy->msix_bar_idx = 1;
1696 proxy->modern_io_bar_idx = 2;
1697 proxy->modern_mem_bar_idx = 4;
1698
1699 proxy->common.offset = 0x0;
1700 proxy->common.size = 0x1000;
1701 proxy->common.type = VIRTIO_PCI_CAP_COMMON_CFG;
1702
1703 proxy->isr.offset = 0x1000;
1704 proxy->isr.size = 0x1000;
1705 proxy->isr.type = VIRTIO_PCI_CAP_ISR_CFG;
1706
1707 proxy->device.offset = 0x2000;
1708 proxy->device.size = 0x1000;
1709 proxy->device.type = VIRTIO_PCI_CAP_DEVICE_CFG;
1710
1711 proxy->notify.offset = 0x3000;
1712 proxy->notify.size = virtio_pci_queue_mem_mult(proxy) * VIRTIO_QUEUE_MAX;
1713 proxy->notify.type = VIRTIO_PCI_CAP_NOTIFY_CFG;
1714
1715 proxy->notify_pio.offset = 0x0;
1716 proxy->notify_pio.size = 0x4;
1717 proxy->notify_pio.type = VIRTIO_PCI_CAP_NOTIFY_CFG;
1718
1719
1720 memory_region_init(&proxy->modern_bar, OBJECT(proxy), "virtio-pci",
1721
1722 pow2ceil(proxy->notify.offset + proxy->notify.size));
1723
1724 if (proxy->disable_legacy == ON_OFF_AUTO_AUTO) {
1725 proxy->disable_legacy = pcie_port ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
1726 }
1727
1728 if (!virtio_pci_modern(proxy) && !virtio_pci_legacy(proxy)) {
1729 error_setg(errp, "device cannot work as neither modern nor legacy mode"
1730 " is enabled");
1731 error_append_hint(errp, "Set either disable-modern or disable-legacy"
1732 " to off\n");
1733 return;
1734 }
1735
1736 if (pcie_port && pci_is_express(pci_dev)) {
1737 int pos;
1738
1739 pos = pcie_endpoint_cap_init(pci_dev, 0);
1740 assert(pos > 0);
1741
1742 pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0,
1743 PCI_PM_SIZEOF, errp);
1744 if (pos < 0) {
1745 return;
1746 }
1747
1748 pci_dev->exp.pm_cap = pos;
1749
1750
1751
1752
1753
1754 pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);
1755
1756 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_DEVERR) {
1757
1758 pcie_cap_deverr_init(pci_dev);
1759 }
1760
1761 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_LNKCTL) {
1762
1763 pcie_cap_lnkctl_init(pci_dev);
1764 }
1765
1766 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) {
1767
1768 pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL,
1769 PCI_PM_CTRL_STATE_MASK);
1770 }
1771
1772 if (proxy->flags & VIRTIO_PCI_FLAG_ATS) {
1773 pcie_ats_init(pci_dev, 256);
1774 }
1775
1776 } else {
1777
1778
1779
1780
1781 pci_dev->cap_present &= ~QEMU_PCI_CAP_EXPRESS;
1782 }
1783
1784 virtio_pci_bus_new(&proxy->bus, sizeof(proxy->bus), proxy);
1785 if (k->realize) {
1786 k->realize(proxy, errp);
1787 }
1788}
1789
1790static void virtio_pci_exit(PCIDevice *pci_dev)
1791{
1792 msix_uninit_exclusive_bar(pci_dev);
1793}
1794
1795static void virtio_pci_reset(DeviceState *qdev)
1796{
1797 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
1798 VirtioBusState *bus = VIRTIO_BUS(&proxy->bus);
1799 PCIDevice *dev = PCI_DEVICE(qdev);
1800 int i;
1801
1802 virtio_pci_stop_ioeventfd(proxy);
1803 virtio_bus_reset(bus);
1804 msix_unuse_all_vectors(&proxy->pci_dev);
1805
1806 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
1807 proxy->vqs[i].enabled = 0;
1808 proxy->vqs[i].num = 0;
1809 proxy->vqs[i].desc[0] = proxy->vqs[i].desc[1] = 0;
1810 proxy->vqs[i].avail[0] = proxy->vqs[i].avail[1] = 0;
1811 proxy->vqs[i].used[0] = proxy->vqs[i].used[1] = 0;
1812 }
1813
1814 if (pci_is_express(dev)) {
1815 pcie_cap_deverr_reset(dev);
1816 pcie_cap_lnkctl_reset(dev);
1817
1818 pci_set_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL, 0);
1819 }
1820}
1821
1822static Property virtio_pci_properties[] = {
1823 DEFINE_PROP_BIT("virtio-pci-bus-master-bug-migration", VirtIOPCIProxy, flags,
1824 VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, false),
1825 DEFINE_PROP_BIT("migrate-extra", VirtIOPCIProxy, flags,
1826 VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT, true),
1827 DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags,
1828 VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false),
1829 DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags,
1830 VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false),
1831 DEFINE_PROP_BIT("page-per-vq", VirtIOPCIProxy, flags,
1832 VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, false),
1833 DEFINE_PROP_BOOL("x-ignore-backend-features", VirtIOPCIProxy,
1834 ignore_backend_features, false),
1835 DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags,
1836 VIRTIO_PCI_FLAG_ATS_BIT, false),
1837 DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags,
1838 VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true),
1839 DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags,
1840 VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true),
1841 DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags,
1842 VIRTIO_PCI_FLAG_INIT_PM_BIT, true),
1843 DEFINE_PROP_END_OF_LIST(),
1844};
1845
1846static void virtio_pci_dc_realize(DeviceState *qdev, Error **errp)
1847{
1848 VirtioPCIClass *vpciklass = VIRTIO_PCI_GET_CLASS(qdev);
1849 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
1850 PCIDevice *pci_dev = &proxy->pci_dev;
1851
1852 if (!(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_PCIE) &&
1853 virtio_pci_modern(proxy)) {
1854 pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
1855 }
1856
1857 vpciklass->parent_dc_realize(qdev, errp);
1858}
1859
1860static void virtio_pci_class_init(ObjectClass *klass, void *data)
1861{
1862 DeviceClass *dc = DEVICE_CLASS(klass);
1863 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1864 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass);
1865
1866 dc->props = virtio_pci_properties;
1867 k->realize = virtio_pci_realize;
1868 k->exit = virtio_pci_exit;
1869 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1870 k->revision = VIRTIO_PCI_ABI_VERSION;
1871 k->class_id = PCI_CLASS_OTHERS;
1872 device_class_set_parent_realize(dc, virtio_pci_dc_realize,
1873 &vpciklass->parent_dc_realize);
1874 dc->reset = virtio_pci_reset;
1875}
1876
1877static const TypeInfo virtio_pci_info = {
1878 .name = TYPE_VIRTIO_PCI,
1879 .parent = TYPE_PCI_DEVICE,
1880 .instance_size = sizeof(VirtIOPCIProxy),
1881 .class_init = virtio_pci_class_init,
1882 .class_size = sizeof(VirtioPCIClass),
1883 .abstract = true,
1884};
1885
1886static Property virtio_pci_generic_properties[] = {
1887 DEFINE_PROP_ON_OFF_AUTO("disable-legacy", VirtIOPCIProxy, disable_legacy,
1888 ON_OFF_AUTO_AUTO),
1889 DEFINE_PROP_BOOL("disable-modern", VirtIOPCIProxy, disable_modern, false),
1890 DEFINE_PROP_END_OF_LIST(),
1891};
1892
1893static void virtio_pci_base_class_init(ObjectClass *klass, void *data)
1894{
1895 const VirtioPCIDeviceTypeInfo *t = data;
1896 if (t->class_init) {
1897 t->class_init(klass, NULL);
1898 }
1899}
1900
1901static void virtio_pci_generic_class_init(ObjectClass *klass, void *data)
1902{
1903 DeviceClass *dc = DEVICE_CLASS(klass);
1904
1905 dc->props = virtio_pci_generic_properties;
1906}
1907
1908
1909static void virtio_pci_generic_base_class_init(ObjectClass *klass, void *data)
1910{
1911 virtio_pci_base_class_init(klass, data);
1912 virtio_pci_generic_class_init(klass, NULL);
1913}
1914
1915static void virtio_pci_transitional_instance_init(Object *obj)
1916{
1917 VirtIOPCIProxy *proxy = VIRTIO_PCI(obj);
1918
1919 proxy->disable_legacy = ON_OFF_AUTO_OFF;
1920 proxy->disable_modern = false;
1921}
1922
1923static void virtio_pci_non_transitional_instance_init(Object *obj)
1924{
1925 VirtIOPCIProxy *proxy = VIRTIO_PCI(obj);
1926
1927 proxy->disable_legacy = ON_OFF_AUTO_ON;
1928 proxy->disable_modern = false;
1929}
1930
1931void virtio_pci_types_register(const VirtioPCIDeviceTypeInfo *t)
1932{
1933 TypeInfo base_type_info = {
1934 .name = t->base_name,
1935 .parent = t->parent ? t->parent : TYPE_VIRTIO_PCI,
1936 .instance_size = t->instance_size,
1937 .instance_init = t->instance_init,
1938 .class_size = t->class_size,
1939 .class_init = virtio_pci_base_class_init,
1940 .class_data = (void *)t,
1941 .abstract = true,
1942 };
1943 TypeInfo generic_type_info = {
1944 .name = t->generic_name,
1945 .parent = base_type_info.name,
1946 .class_init = virtio_pci_generic_class_init,
1947 .interfaces = (InterfaceInfo[]) {
1948 { INTERFACE_PCIE_DEVICE },
1949 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
1950 { }
1951 },
1952 };
1953
1954 if (!base_type_info.name) {
1955
1956 base_type_info.name = t->generic_name;
1957 base_type_info.class_init = virtio_pci_generic_base_class_init;
1958 base_type_info.interfaces = generic_type_info.interfaces;
1959 base_type_info.abstract = false;
1960 generic_type_info.name = NULL;
1961 assert(!t->non_transitional_name);
1962 assert(!t->transitional_name);
1963 }
1964
1965 type_register(&base_type_info);
1966 if (generic_type_info.name) {
1967 type_register(&generic_type_info);
1968 }
1969
1970 if (t->non_transitional_name) {
1971 const TypeInfo non_transitional_type_info = {
1972 .name = t->non_transitional_name,
1973 .parent = base_type_info.name,
1974 .instance_init = virtio_pci_non_transitional_instance_init,
1975 .interfaces = (InterfaceInfo[]) {
1976 { INTERFACE_PCIE_DEVICE },
1977 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
1978 { }
1979 },
1980 };
1981 type_register(&non_transitional_type_info);
1982 }
1983
1984 if (t->transitional_name) {
1985 const TypeInfo transitional_type_info = {
1986 .name = t->transitional_name,
1987 .parent = base_type_info.name,
1988 .instance_init = virtio_pci_transitional_instance_init,
1989 .interfaces = (InterfaceInfo[]) {
1990
1991
1992
1993
1994 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
1995 { }
1996 },
1997 };
1998 type_register(&transitional_type_info);
1999 }
2000}
2001
2002
2003
2004static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size,
2005 VirtIOPCIProxy *dev)
2006{
2007 DeviceState *qdev = DEVICE(dev);
2008 char virtio_bus_name[] = "virtio-bus";
2009
2010 qbus_create_inplace(bus, bus_size, TYPE_VIRTIO_PCI_BUS, qdev,
2011 virtio_bus_name);
2012}
2013
2014static void virtio_pci_bus_class_init(ObjectClass *klass, void *data)
2015{
2016 BusClass *bus_class = BUS_CLASS(klass);
2017 VirtioBusClass *k = VIRTIO_BUS_CLASS(klass);
2018 bus_class->max_dev = 1;
2019 k->notify = virtio_pci_notify;
2020 k->save_config = virtio_pci_save_config;
2021 k->load_config = virtio_pci_load_config;
2022 k->save_queue = virtio_pci_save_queue;
2023 k->load_queue = virtio_pci_load_queue;
2024 k->save_extra_state = virtio_pci_save_extra_state;
2025 k->load_extra_state = virtio_pci_load_extra_state;
2026 k->has_extra_state = virtio_pci_has_extra_state;
2027 k->query_guest_notifiers = virtio_pci_query_guest_notifiers;
2028 k->set_guest_notifiers = virtio_pci_set_guest_notifiers;
2029 k->set_host_notifier_mr = virtio_pci_set_host_notifier_mr;
2030 k->vmstate_change = virtio_pci_vmstate_change;
2031 k->pre_plugged = virtio_pci_pre_plugged;
2032 k->device_plugged = virtio_pci_device_plugged;
2033 k->device_unplugged = virtio_pci_device_unplugged;
2034 k->query_nvectors = virtio_pci_query_nvectors;
2035 k->ioeventfd_enabled = virtio_pci_ioeventfd_enabled;
2036 k->ioeventfd_assign = virtio_pci_ioeventfd_assign;
2037 k->get_dma_as = virtio_pci_get_dma_as;
2038}
2039
2040static const TypeInfo virtio_pci_bus_info = {
2041 .name = TYPE_VIRTIO_PCI_BUS,
2042 .parent = TYPE_VIRTIO_BUS,
2043 .instance_size = sizeof(VirtioPCIBusState),
2044 .class_init = virtio_pci_bus_class_init,
2045};
2046
2047static void virtio_pci_register_types(void)
2048{
2049
2050 type_register_static(&virtio_pci_bus_info);
2051 type_register_static(&virtio_pci_info);
2052}
2053
2054type_init(virtio_pci_register_types)
2055
2056
