LXR qemu/include/hw/riscv/sifive

   1/*
   2 * SiFive CLINT (Core Local Interruptor) interface
   3 *
   4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
   5 * Copyright (c) 2017 SiFive, Inc.
   6 *
   7 * This program is free software; you can redistribute it and/or modify it
   8 * under the terms and conditions of the GNU General Public License,
   9 * version 2 or later, as published by the Free Software Foundation.
  10 *
  11 * This program is distributed in the hope it will be useful, but WITHOUT
  12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14 * more details.
  15 *
  16 * You should have received a copy of the GNU General Public License along with
  17 * this program.  If not, see <http://www.gnu.org/licenses/>.
  18 */
  19
  20#ifndef HW_SIFIVE_CLINT_H
  21#define HW_SIFIVE_CLINT_H
  22
  23#define TYPE_SIFIVE_CLINT "riscv.sifive.clint"
  24
  25#define SIFIVE_CLINT(obj) \
  26    OBJECT_CHECK(SiFiveCLINTState, (obj), TYPE_SIFIVE_CLINT)
  27
  28typedef struct SiFiveCLINTState {
  29    /*< private >*/
  30    SysBusDevice parent_obj;
  31
  32    /*< public >*/
  33    MemoryRegion mmio;
  34    uint32_t num_harts;
  35    uint32_t sip_base;
  36    uint32_t timecmp_base;
  37    uint32_t time_base;
  38    uint32_t aperture_size;
  39} SiFiveCLINTState;
  40
  41DeviceState *sifive_clint_create(hwaddr addr, hwaddr size, uint32_t num_harts,
  42    uint32_t sip_base, uint32_t timecmp_base, uint32_t time_base);
  43
  44enum {
  45    SIFIVE_SIP_BASE     = 0x0,
  46    SIFIVE_TIMECMP_BASE = 0x4000,
  47    SIFIVE_TIME_BASE    = 0xBFF8
  48};
  49
  50enum {
  51    SIFIVE_CLINT_TIMEBASE_FREQ = 10000000
  52};
  53
  54#endif
  55