LXR qemu/hw/hppa/pci.c

   1/*
   2 * QEMU HP-PARISC PCI support functions.
   3 *
   4 */
   5
   6#include "qemu/osdep.h"
   7#include "qemu-common.h"
   8#include "hppa_sys.h"
   9#include "qemu/log.h"
  10#include "sysemu/sysemu.h"
  11#include "trace.h"
  12
  13
  14/* Fallback for unassigned PCI I/O operations.  Avoids MCHK.  */
  15
  16static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size)
  17{
  18    return 0;
  19}
  20
  21static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size)
  22{
  23}
  24
  25const MemoryRegionOps hppa_pci_ignore_ops = {
  26    .read = ignore_read,
  27    .write = ignore_write,
  28    .endianness = DEVICE_BIG_ENDIAN,
  29    .valid = {
  30        .min_access_size = 1,
  31        .max_access_size = 8,
  32    },
  33    .impl = {
  34        .min_access_size = 1,
  35        .max_access_size = 8,
  36    },
  37};
  38
  39
  40/* PCI config space reads/writes, to byte-word addressable memory.  */
  41static uint64_t bw_conf1_read(void *opaque, hwaddr addr,
  42                              unsigned size)
  43{
  44    PCIBus *b = opaque;
  45    return pci_data_read(b, addr, size);
  46}
  47
  48static void bw_conf1_write(void *opaque, hwaddr addr,
  49                           uint64_t val, unsigned size)
  50{
  51    PCIBus *b = opaque;
  52    pci_data_write(b, addr, val, size);
  53}
  54
  55const MemoryRegionOps hppa_pci_conf1_ops = {
  56    .read = bw_conf1_read,
  57    .write = bw_conf1_write,
  58    .endianness = DEVICE_BIG_ENDIAN,
  59    .impl = {
  60        .min_access_size = 1,
  61        .max_access_size = 4,
  62    },
  63};
  64
  65/* PCI/EISA Interrupt Acknowledge Cycle.  */
  66
  67static uint64_t iack_read(void *opaque, hwaddr addr, unsigned size)
  68{
  69    return pic_read_irq(isa_pic);
  70}
  71
  72static void special_write(void *opaque, hwaddr addr,
  73                          uint64_t val, unsigned size)
  74{
  75    trace_hppa_pci_iack_write();
  76}
  77
  78const MemoryRegionOps hppa_pci_iack_ops = {
  79    .read = iack_read,
  80    .write = special_write,
  81    .endianness = DEVICE_BIG_ENDIAN,
  82    .valid = {
  83        .min_access_size = 4,
  84        .max_access_size = 4,
  85    },
  86    .impl = {
  87        .min_access_size = 4,
  88        .max_access_size = 4,
  89    },
  90};
  91