qemu/hw/s390x/css.c
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   1/*
   2 * Channel subsystem base support.
   3 *
   4 * Copyright 2012 IBM Corp.
   5 * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com>
   6 *
   7 * This work is licensed under the terms of the GNU GPL, version 2 or (at
   8 * your option) any later version. See the COPYING file in the top-level
   9 * directory.
  10 */
  11
  12#include "qemu/osdep.h"
  13#include "qapi/error.h"
  14#include "qapi/visitor.h"
  15#include "hw/qdev.h"
  16#include "qemu/bitops.h"
  17#include "qemu/error-report.h"
  18#include "exec/address-spaces.h"
  19#include "cpu.h"
  20#include "hw/s390x/ioinst.h"
  21#include "hw/s390x/css.h"
  22#include "trace.h"
  23#include "hw/s390x/s390_flic.h"
  24#include "hw/s390x/s390-virtio-ccw.h"
  25
  26typedef struct CrwContainer {
  27    CRW crw;
  28    QTAILQ_ENTRY(CrwContainer) sibling;
  29} CrwContainer;
  30
  31static const VMStateDescription vmstate_crw = {
  32    .name = "s390_crw",
  33    .version_id = 1,
  34    .minimum_version_id = 1,
  35    .fields = (VMStateField[]) {
  36        VMSTATE_UINT16(flags, CRW),
  37        VMSTATE_UINT16(rsid, CRW),
  38        VMSTATE_END_OF_LIST()
  39    },
  40};
  41
  42static const VMStateDescription vmstate_crw_container = {
  43    .name = "s390_crw_container",
  44    .version_id = 1,
  45    .minimum_version_id = 1,
  46    .fields = (VMStateField[]) {
  47        VMSTATE_STRUCT(crw, CrwContainer, 0, vmstate_crw, CRW),
  48        VMSTATE_END_OF_LIST()
  49    },
  50};
  51
  52typedef struct ChpInfo {
  53    uint8_t in_use;
  54    uint8_t type;
  55    uint8_t is_virtual;
  56} ChpInfo;
  57
  58static const VMStateDescription vmstate_chp_info = {
  59    .name = "s390_chp_info",
  60    .version_id = 1,
  61    .minimum_version_id = 1,
  62    .fields = (VMStateField[]) {
  63        VMSTATE_UINT8(in_use, ChpInfo),
  64        VMSTATE_UINT8(type, ChpInfo),
  65        VMSTATE_UINT8(is_virtual, ChpInfo),
  66        VMSTATE_END_OF_LIST()
  67    }
  68};
  69
  70typedef struct SubchSet {
  71    SubchDev *sch[MAX_SCHID + 1];
  72    unsigned long schids_used[BITS_TO_LONGS(MAX_SCHID + 1)];
  73    unsigned long devnos_used[BITS_TO_LONGS(MAX_SCHID + 1)];
  74} SubchSet;
  75
  76static const VMStateDescription vmstate_scsw = {
  77    .name = "s390_scsw",
  78    .version_id = 1,
  79    .minimum_version_id = 1,
  80    .fields = (VMStateField[]) {
  81        VMSTATE_UINT16(flags, SCSW),
  82        VMSTATE_UINT16(ctrl, SCSW),
  83        VMSTATE_UINT32(cpa, SCSW),
  84        VMSTATE_UINT8(dstat, SCSW),
  85        VMSTATE_UINT8(cstat, SCSW),
  86        VMSTATE_UINT16(count, SCSW),
  87        VMSTATE_END_OF_LIST()
  88    }
  89};
  90
  91static const VMStateDescription vmstate_pmcw = {
  92    .name = "s390_pmcw",
  93    .version_id = 1,
  94    .minimum_version_id = 1,
  95    .fields = (VMStateField[]) {
  96        VMSTATE_UINT32(intparm, PMCW),
  97        VMSTATE_UINT16(flags, PMCW),
  98        VMSTATE_UINT16(devno, PMCW),
  99        VMSTATE_UINT8(lpm, PMCW),
 100        VMSTATE_UINT8(pnom, PMCW),
 101        VMSTATE_UINT8(lpum, PMCW),
 102        VMSTATE_UINT8(pim, PMCW),
 103        VMSTATE_UINT16(mbi, PMCW),
 104        VMSTATE_UINT8(pom, PMCW),
 105        VMSTATE_UINT8(pam, PMCW),
 106        VMSTATE_UINT8_ARRAY(chpid, PMCW, 8),
 107        VMSTATE_UINT32(chars, PMCW),
 108        VMSTATE_END_OF_LIST()
 109    }
 110};
 111
 112static const VMStateDescription vmstate_schib = {
 113    .name = "s390_schib",
 114    .version_id = 1,
 115    .minimum_version_id = 1,
 116    .fields = (VMStateField[]) {
 117        VMSTATE_STRUCT(pmcw, SCHIB, 0, vmstate_pmcw, PMCW),
 118        VMSTATE_STRUCT(scsw, SCHIB, 0, vmstate_scsw, SCSW),
 119        VMSTATE_UINT64(mba, SCHIB),
 120        VMSTATE_UINT8_ARRAY(mda, SCHIB, 4),
 121        VMSTATE_END_OF_LIST()
 122    }
 123};
 124
 125
 126static const VMStateDescription vmstate_ccw1 = {
 127    .name = "s390_ccw1",
 128    .version_id = 1,
 129    .minimum_version_id = 1,
 130    .fields = (VMStateField[]) {
 131        VMSTATE_UINT8(cmd_code, CCW1),
 132        VMSTATE_UINT8(flags, CCW1),
 133        VMSTATE_UINT16(count, CCW1),
 134        VMSTATE_UINT32(cda, CCW1),
 135        VMSTATE_END_OF_LIST()
 136    }
 137};
 138
 139static const VMStateDescription vmstate_ciw = {
 140    .name = "s390_ciw",
 141    .version_id = 1,
 142    .minimum_version_id = 1,
 143    .fields = (VMStateField[]) {
 144        VMSTATE_UINT8(type, CIW),
 145        VMSTATE_UINT8(command, CIW),
 146        VMSTATE_UINT16(count, CIW),
 147        VMSTATE_END_OF_LIST()
 148    }
 149};
 150
 151static const VMStateDescription vmstate_sense_id = {
 152    .name = "s390_sense_id",
 153    .version_id = 1,
 154    .minimum_version_id = 1,
 155    .fields = (VMStateField[]) {
 156        VMSTATE_UINT8(reserved, SenseId),
 157        VMSTATE_UINT16(cu_type, SenseId),
 158        VMSTATE_UINT8(cu_model, SenseId),
 159        VMSTATE_UINT16(dev_type, SenseId),
 160        VMSTATE_UINT8(dev_model, SenseId),
 161        VMSTATE_UINT8(unused, SenseId),
 162        VMSTATE_STRUCT_ARRAY(ciw, SenseId, MAX_CIWS, 0, vmstate_ciw, CIW),
 163        VMSTATE_END_OF_LIST()
 164    }
 165};
 166
 167static const VMStateDescription vmstate_orb = {
 168    .name = "s390_orb",
 169    .version_id = 1,
 170    .minimum_version_id = 1,
 171    .fields = (VMStateField[]) {
 172        VMSTATE_UINT32(intparm, ORB),
 173        VMSTATE_UINT16(ctrl0, ORB),
 174        VMSTATE_UINT8(lpm, ORB),
 175        VMSTATE_UINT8(ctrl1, ORB),
 176        VMSTATE_UINT32(cpa, ORB),
 177        VMSTATE_END_OF_LIST()
 178    }
 179};
 180
 181static bool vmstate_schdev_orb_needed(void *opaque)
 182{
 183    return css_migration_enabled();
 184}
 185
 186static const VMStateDescription vmstate_schdev_orb = {
 187    .name = "s390_subch_dev/orb",
 188    .version_id = 1,
 189    .minimum_version_id = 1,
 190    .needed = vmstate_schdev_orb_needed,
 191    .fields = (VMStateField[]) {
 192        VMSTATE_STRUCT(orb, SubchDev, 1, vmstate_orb, ORB),
 193        VMSTATE_END_OF_LIST()
 194    }
 195};
 196
 197static int subch_dev_post_load(void *opaque, int version_id);
 198static int subch_dev_pre_save(void *opaque);
 199
 200const char err_hint_devno[] = "Devno mismatch, tried to load wrong section!"
 201    " Likely reason: some sequences of plug and unplug  can break"
 202    " migration for machine versions prior to  2.7 (known design flaw).";
 203
 204const VMStateDescription vmstate_subch_dev = {
 205    .name = "s390_subch_dev",
 206    .version_id = 1,
 207    .minimum_version_id = 1,
 208    .post_load = subch_dev_post_load,
 209    .pre_save = subch_dev_pre_save,
 210    .fields = (VMStateField[]) {
 211        VMSTATE_UINT8_EQUAL(cssid, SubchDev, "Bug!"),
 212        VMSTATE_UINT8_EQUAL(ssid, SubchDev, "Bug!"),
 213        VMSTATE_UINT16(migrated_schid, SubchDev),
 214        VMSTATE_UINT16_EQUAL(devno, SubchDev, err_hint_devno),
 215        VMSTATE_BOOL(thinint_active, SubchDev),
 216        VMSTATE_STRUCT(curr_status, SubchDev, 0, vmstate_schib, SCHIB),
 217        VMSTATE_UINT8_ARRAY(sense_data, SubchDev, 32),
 218        VMSTATE_UINT64(channel_prog, SubchDev),
 219        VMSTATE_STRUCT(last_cmd, SubchDev, 0, vmstate_ccw1, CCW1),
 220        VMSTATE_BOOL(last_cmd_valid, SubchDev),
 221        VMSTATE_STRUCT(id, SubchDev, 0, vmstate_sense_id, SenseId),
 222        VMSTATE_BOOL(ccw_fmt_1, SubchDev),
 223        VMSTATE_UINT8(ccw_no_data_cnt, SubchDev),
 224        VMSTATE_END_OF_LIST()
 225    },
 226    .subsections = (const VMStateDescription * []) {
 227        &vmstate_schdev_orb,
 228        NULL
 229    }
 230};
 231
 232typedef struct IndAddrPtrTmp {
 233    IndAddr **parent;
 234    uint64_t addr;
 235    int32_t len;
 236} IndAddrPtrTmp;
 237
 238static int post_load_ind_addr(void *opaque, int version_id)
 239{
 240    IndAddrPtrTmp *ptmp = opaque;
 241    IndAddr **ind_addr = ptmp->parent;
 242
 243    if (ptmp->len != 0) {
 244        *ind_addr = get_indicator(ptmp->addr, ptmp->len);
 245    } else {
 246        *ind_addr = NULL;
 247    }
 248    return 0;
 249}
 250
 251static int pre_save_ind_addr(void *opaque)
 252{
 253    IndAddrPtrTmp *ptmp = opaque;
 254    IndAddr *ind_addr = *(ptmp->parent);
 255
 256    if (ind_addr != NULL) {
 257        ptmp->len = ind_addr->len;
 258        ptmp->addr = ind_addr->addr;
 259    } else {
 260        ptmp->len = 0;
 261        ptmp->addr = 0L;
 262    }
 263
 264    return 0;
 265}
 266
 267const VMStateDescription vmstate_ind_addr_tmp = {
 268    .name = "s390_ind_addr_tmp",
 269    .pre_save = pre_save_ind_addr,
 270    .post_load = post_load_ind_addr,
 271
 272    .fields = (VMStateField[]) {
 273        VMSTATE_INT32(len, IndAddrPtrTmp),
 274        VMSTATE_UINT64(addr, IndAddrPtrTmp),
 275        VMSTATE_END_OF_LIST()
 276    }
 277};
 278
 279const VMStateDescription vmstate_ind_addr = {
 280    .name = "s390_ind_addr_tmp",
 281    .fields = (VMStateField[]) {
 282        VMSTATE_WITH_TMP(IndAddr*, IndAddrPtrTmp, vmstate_ind_addr_tmp),
 283        VMSTATE_END_OF_LIST()
 284    }
 285};
 286
 287typedef struct CssImage {
 288    SubchSet *sch_set[MAX_SSID + 1];
 289    ChpInfo chpids[MAX_CHPID + 1];
 290} CssImage;
 291
 292static const VMStateDescription vmstate_css_img = {
 293    .name = "s390_css_img",
 294    .version_id = 1,
 295    .minimum_version_id = 1,
 296    .fields = (VMStateField[]) {
 297        /* Subchannel sets have no relevant state. */
 298        VMSTATE_STRUCT_ARRAY(chpids, CssImage, MAX_CHPID + 1, 0,
 299                             vmstate_chp_info, ChpInfo),
 300        VMSTATE_END_OF_LIST()
 301    }
 302
 303};
 304
 305typedef struct IoAdapter {
 306    uint32_t id;
 307    uint8_t type;
 308    uint8_t isc;
 309    uint8_t flags;
 310} IoAdapter;
 311
 312typedef struct ChannelSubSys {
 313    QTAILQ_HEAD(, CrwContainer) pending_crws;
 314    bool sei_pending;
 315    bool do_crw_mchk;
 316    bool crws_lost;
 317    uint8_t max_cssid;
 318    uint8_t max_ssid;
 319    bool chnmon_active;
 320    uint64_t chnmon_area;
 321    CssImage *css[MAX_CSSID + 1];
 322    uint8_t default_cssid;
 323    /* don't migrate, see css_register_io_adapters */
 324    IoAdapter *io_adapters[CSS_IO_ADAPTER_TYPE_NUMS][MAX_ISC + 1];
 325    /* don't migrate, see get_indicator and IndAddrPtrTmp */
 326    QTAILQ_HEAD(, IndAddr) indicator_addresses;
 327} ChannelSubSys;
 328
 329static const VMStateDescription vmstate_css = {
 330    .name = "s390_css",
 331    .version_id = 1,
 332    .minimum_version_id = 1,
 333    .fields = (VMStateField[]) {
 334        VMSTATE_QTAILQ_V(pending_crws, ChannelSubSys, 1, vmstate_crw_container,
 335                         CrwContainer, sibling),
 336        VMSTATE_BOOL(sei_pending, ChannelSubSys),
 337        VMSTATE_BOOL(do_crw_mchk, ChannelSubSys),
 338        VMSTATE_BOOL(crws_lost, ChannelSubSys),
 339        /* These were kind of migrated by virtio */
 340        VMSTATE_UINT8(max_cssid, ChannelSubSys),
 341        VMSTATE_UINT8(max_ssid, ChannelSubSys),
 342        VMSTATE_BOOL(chnmon_active, ChannelSubSys),
 343        VMSTATE_UINT64(chnmon_area, ChannelSubSys),
 344        VMSTATE_ARRAY_OF_POINTER_TO_STRUCT(css, ChannelSubSys, MAX_CSSID + 1,
 345                0, vmstate_css_img, CssImage),
 346        VMSTATE_UINT8(default_cssid, ChannelSubSys),
 347        VMSTATE_END_OF_LIST()
 348    }
 349};
 350
 351static ChannelSubSys channel_subsys = {
 352    .pending_crws = QTAILQ_HEAD_INITIALIZER(channel_subsys.pending_crws),
 353    .do_crw_mchk = true,
 354    .sei_pending = false,
 355    .do_crw_mchk = true,
 356    .crws_lost = false,
 357    .chnmon_active = false,
 358    .indicator_addresses =
 359        QTAILQ_HEAD_INITIALIZER(channel_subsys.indicator_addresses),
 360};
 361
 362static int subch_dev_pre_save(void *opaque)
 363{
 364    SubchDev *s = opaque;
 365
 366    /* Prepare remote_schid for save */
 367    s->migrated_schid = s->schid;
 368
 369    return 0;
 370}
 371
 372static int subch_dev_post_load(void *opaque, int version_id)
 373{
 374
 375    SubchDev *s = opaque;
 376
 377    /* Re-assign the subchannel to remote_schid if necessary */
 378    if (s->migrated_schid != s->schid) {
 379        if (css_find_subch(true, s->cssid, s->ssid, s->schid) == s) {
 380            /*
 381             * Cleanup the slot before moving to s->migrated_schid provided
 382             * it still belongs to us, i.e. it was not changed by previous
 383             * invocation of this function.
 384             */
 385            css_subch_assign(s->cssid, s->ssid, s->schid, s->devno, NULL);
 386        }
 387        /* It's OK to re-assign without a prior de-assign. */
 388        s->schid = s->migrated_schid;
 389        css_subch_assign(s->cssid, s->ssid, s->schid, s->devno, s);
 390    }
 391
 392    if (css_migration_enabled()) {
 393        /* No compat voodoo to do ;) */
 394        return 0;
 395    }
 396    /*
 397     * Hack alert. If we don't migrate the channel subsystem status
 398     * we still need to find out if the guest enabled mss/mcss-e.
 399     * If the subchannel is enabled, it certainly was able to access it,
 400     * so adjust the max_ssid/max_cssid values for relevant ssid/cssid
 401     * values. This is not watertight, but better than nothing.
 402     */
 403    if (s->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ENA) {
 404        if (s->ssid) {
 405            channel_subsys.max_ssid = MAX_SSID;
 406        }
 407        if (s->cssid != channel_subsys.default_cssid) {
 408            channel_subsys.max_cssid = MAX_CSSID;
 409        }
 410    }
 411    return 0;
 412}
 413
 414void css_register_vmstate(void)
 415{
 416    vmstate_register(NULL, 0, &vmstate_css, &channel_subsys);
 417}
 418
 419IndAddr *get_indicator(hwaddr ind_addr, int len)
 420{
 421    IndAddr *indicator;
 422
 423    QTAILQ_FOREACH(indicator, &channel_subsys.indicator_addresses, sibling) {
 424        if (indicator->addr == ind_addr) {
 425            indicator->refcnt++;
 426            return indicator;
 427        }
 428    }
 429    indicator = g_new0(IndAddr, 1);
 430    indicator->addr = ind_addr;
 431    indicator->len = len;
 432    indicator->refcnt = 1;
 433    QTAILQ_INSERT_TAIL(&channel_subsys.indicator_addresses,
 434                       indicator, sibling);
 435    return indicator;
 436}
 437
 438static int s390_io_adapter_map(AdapterInfo *adapter, uint64_t map_addr,
 439                               bool do_map)
 440{
 441    S390FLICState *fs = s390_get_flic();
 442    S390FLICStateClass *fsc = s390_get_flic_class(fs);
 443
 444    return fsc->io_adapter_map(fs, adapter->adapter_id, map_addr, do_map);
 445}
 446
 447void release_indicator(AdapterInfo *adapter, IndAddr *indicator)
 448{
 449    assert(indicator->refcnt > 0);
 450    indicator->refcnt--;
 451    if (indicator->refcnt > 0) {
 452        return;
 453    }
 454    QTAILQ_REMOVE(&channel_subsys.indicator_addresses, indicator, sibling);
 455    if (indicator->map) {
 456        s390_io_adapter_map(adapter, indicator->map, false);
 457    }
 458    g_free(indicator);
 459}
 460
 461int map_indicator(AdapterInfo *adapter, IndAddr *indicator)
 462{
 463    int ret;
 464
 465    if (indicator->map) {
 466        return 0; /* already mapped is not an error */
 467    }
 468    indicator->map = indicator->addr;
 469    ret = s390_io_adapter_map(adapter, indicator->map, true);
 470    if ((ret != 0) && (ret != -ENOSYS)) {
 471        goto out_err;
 472    }
 473    return 0;
 474
 475out_err:
 476    indicator->map = 0;
 477    return ret;
 478}
 479
 480int css_create_css_image(uint8_t cssid, bool default_image)
 481{
 482    trace_css_new_image(cssid, default_image ? "(default)" : "");
 483    /* 255 is reserved */
 484    if (cssid == 255) {
 485        return -EINVAL;
 486    }
 487    if (channel_subsys.css[cssid]) {
 488        return -EBUSY;
 489    }
 490    channel_subsys.css[cssid] = g_new0(CssImage, 1);
 491    if (default_image) {
 492        channel_subsys.default_cssid = cssid;
 493    }
 494    return 0;
 495}
 496
 497uint32_t css_get_adapter_id(CssIoAdapterType type, uint8_t isc)
 498{
 499    if (type >= CSS_IO_ADAPTER_TYPE_NUMS || isc > MAX_ISC ||
 500        !channel_subsys.io_adapters[type][isc]) {
 501        return -1;
 502    }
 503
 504    return channel_subsys.io_adapters[type][isc]->id;
 505}
 506
 507/**
 508 * css_register_io_adapters: Register I/O adapters per ISC during init
 509 *
 510 * @swap: an indication if byte swap is needed.
 511 * @maskable: an indication if the adapter is subject to the mask operation.
 512 * @flags: further characteristics of the adapter.
 513 *         e.g. suppressible, an indication if the adapter is subject to AIS.
 514 * @errp: location to store error information.
 515 */
 516void css_register_io_adapters(CssIoAdapterType type, bool swap, bool maskable,
 517                              uint8_t flags, Error **errp)
 518{
 519    uint32_t id;
 520    int ret, isc;
 521    IoAdapter *adapter;
 522    S390FLICState *fs = s390_get_flic();
 523    S390FLICStateClass *fsc = s390_get_flic_class(fs);
 524
 525    /*
 526     * Disallow multiple registrations for the same device type.
 527     * Report an error if registering for an already registered type.
 528     */
 529    if (channel_subsys.io_adapters[type][0]) {
 530        error_setg(errp, "Adapters for type %d already registered", type);
 531    }
 532
 533    for (isc = 0; isc <= MAX_ISC; isc++) {
 534        id = (type << 3) | isc;
 535        ret = fsc->register_io_adapter(fs, id, isc, swap, maskable, flags);
 536        if (ret == 0) {
 537            adapter = g_new0(IoAdapter, 1);
 538            adapter->id = id;
 539            adapter->isc = isc;
 540            adapter->type = type;
 541            adapter->flags = flags;
 542            channel_subsys.io_adapters[type][isc] = adapter;
 543        } else {
 544            error_setg_errno(errp, -ret, "Unexpected error %d when "
 545                             "registering adapter %d", ret, id);
 546            break;
 547        }
 548    }
 549
 550    /*
 551     * No need to free registered adapters in kvm: kvm will clean up
 552     * when the machine goes away.
 553     */
 554    if (ret) {
 555        for (isc--; isc >= 0; isc--) {
 556            g_free(channel_subsys.io_adapters[type][isc]);
 557            channel_subsys.io_adapters[type][isc] = NULL;
 558        }
 559    }
 560
 561}
 562
 563static void css_clear_io_interrupt(uint16_t subchannel_id,
 564                                   uint16_t subchannel_nr)
 565{
 566    Error *err = NULL;
 567    static bool no_clear_irq;
 568    S390FLICState *fs = s390_get_flic();
 569    S390FLICStateClass *fsc = s390_get_flic_class(fs);
 570    int r;
 571
 572    if (unlikely(no_clear_irq)) {
 573        return;
 574    }
 575    r = fsc->clear_io_irq(fs, subchannel_id, subchannel_nr);
 576    switch (r) {
 577    case 0:
 578        break;
 579    case -ENOSYS:
 580        no_clear_irq = true;
 581        /*
 582        * Ignore unavailability, as the user can't do anything
 583        * about it anyway.
 584        */
 585        break;
 586    default:
 587        error_setg_errno(&err, -r, "unexpected error condition");
 588        error_propagate(&error_abort, err);
 589    }
 590}
 591
 592static inline uint16_t css_do_build_subchannel_id(uint8_t cssid, uint8_t ssid)
 593{
 594    if (channel_subsys.max_cssid > 0) {
 595        return (cssid << 8) | (1 << 3) | (ssid << 1) | 1;
 596    }
 597    return (ssid << 1) | 1;
 598}
 599
 600uint16_t css_build_subchannel_id(SubchDev *sch)
 601{
 602    return css_do_build_subchannel_id(sch->cssid, sch->ssid);
 603}
 604
 605void css_inject_io_interrupt(SubchDev *sch)
 606{
 607    uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11;
 608
 609    trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid,
 610                           sch->curr_status.pmcw.intparm, isc, "");
 611    s390_io_interrupt(css_build_subchannel_id(sch),
 612                      sch->schid,
 613                      sch->curr_status.pmcw.intparm,
 614                      isc << 27);
 615}
 616
 617void css_conditional_io_interrupt(SubchDev *sch)
 618{
 619    /*
 620     * If the subchannel is not enabled, it is not made status pending
 621     * (see PoP p. 16-17, "Status Control").
 622     */
 623    if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ENA)) {
 624        return;
 625    }
 626
 627    /*
 628     * If the subchannel is not currently status pending, make it pending
 629     * with alert status.
 630     */
 631    if (!(sch->curr_status.scsw.ctrl & SCSW_STCTL_STATUS_PEND)) {
 632        uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11;
 633
 634        trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid,
 635                               sch->curr_status.pmcw.intparm, isc,
 636                               "(unsolicited)");
 637        sch->curr_status.scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
 638        sch->curr_status.scsw.ctrl |=
 639            SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
 640        /* Inject an I/O interrupt. */
 641        s390_io_interrupt(css_build_subchannel_id(sch),
 642                          sch->schid,
 643                          sch->curr_status.pmcw.intparm,
 644                          isc << 27);
 645    }
 646}
 647
 648int css_do_sic(CPUS390XState *env, uint8_t isc, uint16_t mode)
 649{
 650    S390FLICState *fs = s390_get_flic();
 651    S390FLICStateClass *fsc = s390_get_flic_class(fs);
 652    int r;
 653
 654    if (env->psw.mask & PSW_MASK_PSTATE) {
 655        r = -PGM_PRIVILEGED;
 656        goto out;
 657    }
 658
 659    trace_css_do_sic(mode, isc);
 660    switch (mode) {
 661    case SIC_IRQ_MODE_ALL:
 662    case SIC_IRQ_MODE_SINGLE:
 663        break;
 664    default:
 665        r = -PGM_OPERAND;
 666        goto out;
 667    }
 668
 669    r = fsc->modify_ais_mode(fs, isc, mode) ? -PGM_OPERATION : 0;
 670out:
 671    return r;
 672}
 673
 674void css_adapter_interrupt(CssIoAdapterType type, uint8_t isc)
 675{
 676    S390FLICState *fs = s390_get_flic();
 677    S390FLICStateClass *fsc = s390_get_flic_class(fs);
 678    uint32_t io_int_word = (isc << 27) | IO_INT_WORD_AI;
 679    IoAdapter *adapter = channel_subsys.io_adapters[type][isc];
 680
 681    if (!adapter) {
 682        return;
 683    }
 684
 685    trace_css_adapter_interrupt(isc);
 686    if (fs->ais_supported) {
 687        if (fsc->inject_airq(fs, type, isc, adapter->flags)) {
 688            error_report("Failed to inject airq with AIS supported");
 689            exit(1);
 690        }
 691    } else {
 692        s390_io_interrupt(0, 0, 0, io_int_word);
 693    }
 694}
 695
 696static void sch_handle_clear_func(SubchDev *sch)
 697{
 698    SCHIB *schib = &sch->curr_status;
 699    int path;
 700
 701    /* Path management: In our simple css, we always choose the only path. */
 702    path = 0x80;
 703
 704    /* Reset values prior to 'issuing the clear signal'. */
 705    schib->pmcw.lpum = 0;
 706    schib->pmcw.pom = 0xff;
 707    schib->scsw.flags &= ~SCSW_FLAGS_MASK_PNO;
 708
 709    /* We always 'attempt to issue the clear signal', and we always succeed. */
 710    sch->channel_prog = 0x0;
 711    sch->last_cmd_valid = false;
 712    schib->scsw.ctrl &= ~SCSW_ACTL_CLEAR_PEND;
 713    schib->scsw.ctrl |= SCSW_STCTL_STATUS_PEND;
 714
 715    schib->scsw.dstat = 0;
 716    schib->scsw.cstat = 0;
 717    schib->pmcw.lpum = path;
 718
 719}
 720
 721static void sch_handle_halt_func(SubchDev *sch)
 722{
 723    SCHIB *schib = &sch->curr_status;
 724    hwaddr curr_ccw = sch->channel_prog;
 725    int path;
 726
 727    /* Path management: In our simple css, we always choose the only path. */
 728    path = 0x80;
 729
 730    /* We always 'attempt to issue the halt signal', and we always succeed. */
 731    sch->channel_prog = 0x0;
 732    sch->last_cmd_valid = false;
 733    schib->scsw.ctrl &= ~SCSW_ACTL_HALT_PEND;
 734    schib->scsw.ctrl |= SCSW_STCTL_STATUS_PEND;
 735
 736    if ((schib->scsw.ctrl & (SCSW_ACTL_SUBCH_ACTIVE |
 737                             SCSW_ACTL_DEVICE_ACTIVE)) ||
 738        !((schib->scsw.ctrl & SCSW_ACTL_START_PEND) ||
 739          (schib->scsw.ctrl & SCSW_ACTL_SUSP))) {
 740        schib->scsw.dstat = SCSW_DSTAT_DEVICE_END;
 741    }
 742    if ((schib->scsw.ctrl & (SCSW_ACTL_SUBCH_ACTIVE |
 743                             SCSW_ACTL_DEVICE_ACTIVE)) ||
 744        (schib->scsw.ctrl & SCSW_ACTL_SUSP)) {
 745        schib->scsw.cpa = curr_ccw + 8;
 746    }
 747    schib->scsw.cstat = 0;
 748    schib->pmcw.lpum = path;
 749
 750}
 751
 752/*
 753 * As the SenseId struct cannot be packed (would cause unaligned accesses), we
 754 * have to copy the individual fields to an unstructured area using the correct
 755 * layout (see SA22-7204-01 "Common I/O-Device Commands").
 756 */
 757static void copy_sense_id_to_guest(uint8_t *dest, SenseId *src)
 758{
 759    int i;
 760
 761    dest[0] = src->reserved;
 762    stw_be_p(dest + 1, src->cu_type);
 763    dest[3] = src->cu_model;
 764    stw_be_p(dest + 4, src->dev_type);
 765    dest[6] = src->dev_model;
 766    dest[7] = src->unused;
 767    for (i = 0; i < ARRAY_SIZE(src->ciw); i++) {
 768        dest[8 + i * 4] = src->ciw[i].type;
 769        dest[9 + i * 4] = src->ciw[i].command;
 770        stw_be_p(dest + 10 + i * 4, src->ciw[i].count);
 771    }
 772}
 773
 774static CCW1 copy_ccw_from_guest(hwaddr addr, bool fmt1)
 775{
 776    CCW0 tmp0;
 777    CCW1 tmp1;
 778    CCW1 ret;
 779
 780    if (fmt1) {
 781        cpu_physical_memory_read(addr, &tmp1, sizeof(tmp1));
 782        ret.cmd_code = tmp1.cmd_code;
 783        ret.flags = tmp1.flags;
 784        ret.count = be16_to_cpu(tmp1.count);
 785        ret.cda = be32_to_cpu(tmp1.cda);
 786    } else {
 787        cpu_physical_memory_read(addr, &tmp0, sizeof(tmp0));
 788        if ((tmp0.cmd_code & 0x0f) == CCW_CMD_TIC) {
 789            ret.cmd_code = CCW_CMD_TIC;
 790            ret.flags = 0;
 791            ret.count = 0;
 792        } else {
 793            ret.cmd_code = tmp0.cmd_code;
 794            ret.flags = tmp0.flags;
 795            ret.count = be16_to_cpu(tmp0.count);
 796        }
 797        ret.cda = be16_to_cpu(tmp0.cda1) | (tmp0.cda0 << 16);
 798    }
 799    return ret;
 800}
 801/**
 802 * If out of bounds marks the stream broken. If broken returns -EINVAL,
 803 * otherwise the requested length (may be zero)
 804 */
 805static inline int cds_check_len(CcwDataStream *cds, int len)
 806{
 807    if (cds->at_byte + len > cds->count) {
 808        cds->flags |= CDS_F_STREAM_BROKEN;
 809    }
 810    return cds->flags & CDS_F_STREAM_BROKEN ? -EINVAL : len;
 811}
 812
 813static inline bool cds_ccw_addrs_ok(hwaddr addr, int len, bool ccw_fmt1)
 814{
 815    return (addr + len) < (ccw_fmt1 ? (1UL << 31) : (1UL << 24));
 816}
 817
 818static int ccw_dstream_rw_noflags(CcwDataStream *cds, void *buff, int len,
 819                                  CcwDataStreamOp op)
 820{
 821    int ret;
 822
 823    ret = cds_check_len(cds, len);
 824    if (ret <= 0) {
 825        return ret;
 826    }
 827    if (!cds_ccw_addrs_ok(cds->cda, len, cds->flags & CDS_F_FMT)) {
 828        return -EINVAL; /* channel program check */
 829    }
 830    if (op == CDS_OP_A) {
 831        goto incr;
 832    }
 833    ret = address_space_rw(&address_space_memory, cds->cda,
 834                           MEMTXATTRS_UNSPECIFIED, buff, len, op);
 835    if (ret != MEMTX_OK) {
 836        cds->flags |= CDS_F_STREAM_BROKEN;
 837        return -EINVAL;
 838    }
 839incr:
 840    cds->at_byte += len;
 841    cds->cda += len;
 842    return 0;
 843}
 844
 845/* returns values between 1 and bsz, where bsz is a power of 2 */
 846static inline uint16_t ida_continuous_left(hwaddr cda, uint64_t bsz)
 847{
 848    return bsz - (cda & (bsz - 1));
 849}
 850
 851static inline uint64_t ccw_ida_block_size(uint8_t flags)
 852{
 853    if ((flags & CDS_F_C64) && !(flags & CDS_F_I2K)) {
 854        return 1ULL << 12;
 855    }
 856    return 1ULL << 11;
 857}
 858
 859static inline int ida_read_next_idaw(CcwDataStream *cds)
 860{
 861    union {uint64_t fmt2; uint32_t fmt1; } idaw;
 862    int ret;
 863    hwaddr idaw_addr;
 864    bool idaw_fmt2 = cds->flags & CDS_F_C64;
 865    bool ccw_fmt1 = cds->flags & CDS_F_FMT;
 866
 867    if (idaw_fmt2) {
 868        idaw_addr = cds->cda_orig + sizeof(idaw.fmt2) * cds->at_idaw;
 869        if (idaw_addr & 0x07 || !cds_ccw_addrs_ok(idaw_addr, 0, ccw_fmt1)) {
 870            return -EINVAL; /* channel program check */
 871        }
 872        ret = address_space_rw(&address_space_memory, idaw_addr,
 873                               MEMTXATTRS_UNSPECIFIED, (void *) &idaw.fmt2,
 874                               sizeof(idaw.fmt2), false);
 875        cds->cda = be64_to_cpu(idaw.fmt2);
 876    } else {
 877        idaw_addr = cds->cda_orig + sizeof(idaw.fmt1) * cds->at_idaw;
 878        if (idaw_addr & 0x03 || !cds_ccw_addrs_ok(idaw_addr, 0, ccw_fmt1)) {
 879            return -EINVAL; /* channel program check */
 880        }
 881        ret = address_space_rw(&address_space_memory, idaw_addr,
 882                               MEMTXATTRS_UNSPECIFIED, (void *) &idaw.fmt1,
 883                               sizeof(idaw.fmt1), false);
 884        cds->cda = be64_to_cpu(idaw.fmt1);
 885        if (cds->cda & 0x80000000) {
 886            return -EINVAL; /* channel program check */
 887        }
 888    }
 889    ++(cds->at_idaw);
 890    if (ret != MEMTX_OK) {
 891        /* assume inaccessible address */
 892        return -EINVAL; /* channel program check */
 893    }
 894    return 0;
 895}
 896
 897static int ccw_dstream_rw_ida(CcwDataStream *cds, void *buff, int len,
 898                              CcwDataStreamOp op)
 899{
 900    uint64_t bsz = ccw_ida_block_size(cds->flags);
 901    int ret = 0;
 902    uint16_t cont_left, iter_len;
 903
 904    ret = cds_check_len(cds, len);
 905    if (ret <= 0) {
 906        return ret;
 907    }
 908    if (!cds->at_idaw) {
 909        /* read first idaw */
 910        ret = ida_read_next_idaw(cds);
 911        if (ret) {
 912            goto err;
 913        }
 914        cont_left = ida_continuous_left(cds->cda, bsz);
 915    } else {
 916        cont_left = ida_continuous_left(cds->cda, bsz);
 917        if (cont_left == bsz) {
 918            ret = ida_read_next_idaw(cds);
 919            if (ret) {
 920                goto err;
 921            }
 922            if (cds->cda & (bsz - 1)) {
 923                ret = -EINVAL; /* channel program check */
 924                goto err;
 925            }
 926        }
 927    }
 928    do {
 929        iter_len = MIN(len, cont_left);
 930        if (op != CDS_OP_A) {
 931            ret = address_space_rw(&address_space_memory, cds->cda,
 932                                   MEMTXATTRS_UNSPECIFIED, buff, iter_len, op);
 933            if (ret != MEMTX_OK) {
 934                /* assume inaccessible address */
 935                ret = -EINVAL; /* channel program check */
 936                goto err;
 937            }
 938        }
 939        cds->at_byte += iter_len;
 940        cds->cda += iter_len;
 941        len -= iter_len;
 942        if (!len) {
 943            break;
 944        }
 945        ret = ida_read_next_idaw(cds);
 946        if (ret) {
 947            goto err;
 948        }
 949        cont_left = bsz;
 950    } while (true);
 951    return ret;
 952err:
 953    cds->flags |= CDS_F_STREAM_BROKEN;
 954    return ret;
 955}
 956
 957void ccw_dstream_init(CcwDataStream *cds, CCW1 const *ccw, ORB const *orb)
 958{
 959    /*
 960     * We don't support MIDA (an optional facility) yet and we
 961     * catch this earlier. Just for expressing the precondition.
 962     */
 963    g_assert(!(orb->ctrl1 & ORB_CTRL1_MASK_MIDAW));
 964    cds->flags = (orb->ctrl0 & ORB_CTRL0_MASK_I2K ? CDS_F_I2K : 0) |
 965                 (orb->ctrl0 & ORB_CTRL0_MASK_C64 ? CDS_F_C64 : 0) |
 966                 (orb->ctrl0 & ORB_CTRL0_MASK_FMT ? CDS_F_FMT : 0) |
 967                 (ccw->flags & CCW_FLAG_IDA ? CDS_F_IDA : 0);
 968
 969    cds->count = ccw->count;
 970    cds->cda_orig = ccw->cda;
 971    ccw_dstream_rewind(cds);
 972    if (!(cds->flags & CDS_F_IDA)) {
 973        cds->op_handler = ccw_dstream_rw_noflags;
 974    } else {
 975        cds->op_handler = ccw_dstream_rw_ida;
 976    }
 977}
 978
 979static int css_interpret_ccw(SubchDev *sch, hwaddr ccw_addr,
 980                             bool suspend_allowed)
 981{
 982    int ret;
 983    bool check_len;
 984    int len;
 985    CCW1 ccw;
 986
 987    if (!ccw_addr) {
 988        return -EINVAL; /* channel-program check */
 989    }
 990    /* Check doubleword aligned and 31 or 24 (fmt 0) bit addressable. */
 991    if (ccw_addr & (sch->ccw_fmt_1 ? 0x80000007 : 0xff000007)) {
 992        return -EINVAL;
 993    }
 994
 995    /* Translate everything to format-1 ccws - the information is the same. */
 996    ccw = copy_ccw_from_guest(ccw_addr, sch->ccw_fmt_1);
 997
 998    /* Check for invalid command codes. */
 999    if ((ccw.cmd_code & 0x0f) == 0) {
1000        return -EINVAL;
1001    }
1002    if (((ccw.cmd_code & 0x0f) == CCW_CMD_TIC) &&
1003        ((ccw.cmd_code & 0xf0) != 0)) {
1004        return -EINVAL;
1005    }
1006    if (!sch->ccw_fmt_1 && (ccw.count == 0) &&
1007        (ccw.cmd_code != CCW_CMD_TIC)) {
1008        return -EINVAL;
1009    }
1010
1011    /* We don't support MIDA. */
1012    if (ccw.flags & CCW_FLAG_MIDA) {
1013        return -EINVAL;
1014    }
1015
1016    if (ccw.flags & CCW_FLAG_SUSPEND) {
1017        return suspend_allowed ? -EINPROGRESS : -EINVAL;
1018    }
1019
1020    check_len = !((ccw.flags & CCW_FLAG_SLI) && !(ccw.flags & CCW_FLAG_DC));
1021
1022    if (!ccw.cda) {
1023        if (sch->ccw_no_data_cnt == 255) {
1024            return -EINVAL;
1025        }
1026        sch->ccw_no_data_cnt++;
1027    }
1028
1029    /* Look at the command. */
1030    ccw_dstream_init(&sch->cds, &ccw, &(sch->orb));
1031    switch (ccw.cmd_code) {
1032    case CCW_CMD_NOOP:
1033        /* Nothing to do. */
1034        ret = 0;
1035        break;
1036    case CCW_CMD_BASIC_SENSE:
1037        if (check_len) {
1038            if (ccw.count != sizeof(sch->sense_data)) {
1039                ret = -EINVAL;
1040                break;
1041            }
1042        }
1043        len = MIN(ccw.count, sizeof(sch->sense_data));
1044        ccw_dstream_write_buf(&sch->cds, sch->sense_data, len);
1045        sch->curr_status.scsw.count = ccw_dstream_residual_count(&sch->cds);
1046        memset(sch->sense_data, 0, sizeof(sch->sense_data));
1047        ret = 0;
1048        break;
1049    case CCW_CMD_SENSE_ID:
1050    {
1051        /* According to SA22-7204-01, Sense-ID can store up to 256 bytes */
1052        uint8_t sense_id[256];
1053
1054        copy_sense_id_to_guest(sense_id, &sch->id);
1055        /* Sense ID information is device specific. */
1056        if (check_len) {
1057            if (ccw.count != sizeof(sense_id)) {
1058                ret = -EINVAL;
1059                break;
1060            }
1061        }
1062        len = MIN(ccw.count, sizeof(sense_id));
1063        /*
1064         * Only indicate 0xff in the first sense byte if we actually
1065         * have enough place to store at least bytes 0-3.
1066         */
1067        if (len >= 4) {
1068            sense_id[0] = 0xff;
1069        } else {
1070            sense_id[0] = 0;
1071        }
1072        ccw_dstream_write_buf(&sch->cds, sense_id, len);
1073        sch->curr_status.scsw.count = ccw_dstream_residual_count(&sch->cds);
1074        ret = 0;
1075        break;
1076    }
1077    case CCW_CMD_TIC:
1078        if (sch->last_cmd_valid && (sch->last_cmd.cmd_code == CCW_CMD_TIC)) {
1079            ret = -EINVAL;
1080            break;
1081        }
1082        if (ccw.flags || ccw.count) {
1083            /* We have already sanitized these if converted from fmt 0. */
1084            ret = -EINVAL;
1085            break;
1086        }
1087        sch->channel_prog = ccw.cda;
1088        ret = -EAGAIN;
1089        break;
1090    default:
1091        if (sch->ccw_cb) {
1092            /* Handle device specific commands. */
1093            ret = sch->ccw_cb(sch, ccw);
1094        } else {
1095            ret = -ENOSYS;
1096        }
1097        break;
1098    }
1099    sch->last_cmd = ccw;
1100    sch->last_cmd_valid = true;
1101    if (ret == 0) {
1102        if (ccw.flags & CCW_FLAG_CC) {
1103            sch->channel_prog += 8;
1104            ret = -EAGAIN;
1105        }
1106    }
1107
1108    return ret;
1109}
1110
1111static void sch_handle_start_func_virtual(SubchDev *sch)
1112{
1113    SCHIB *schib = &sch->curr_status;
1114    int path;
1115    int ret;
1116    bool suspend_allowed;
1117
1118    /* Path management: In our simple css, we always choose the only path. */
1119    path = 0x80;
1120
1121    if (!(schib->scsw.ctrl & SCSW_ACTL_SUSP)) {
1122        /* Start Function triggered via ssch, i.e. we have an ORB */
1123        ORB *orb = &sch->orb;
1124        schib->scsw.cstat = 0;
1125        schib->scsw.dstat = 0;
1126        /* Look at the orb and try to execute the channel program. */
1127        schib->pmcw.intparm = orb->intparm;
1128        if (!(orb->lpm & path)) {
1129            /* Generate a deferred cc 3 condition. */
1130            schib->scsw.flags |= SCSW_FLAGS_MASK_CC;
1131            schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
1132            schib->scsw.ctrl |= (SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND);
1133            return;
1134        }
1135        sch->ccw_fmt_1 = !!(orb->ctrl0 & ORB_CTRL0_MASK_FMT);
1136        schib->scsw.flags |= (sch->ccw_fmt_1) ? SCSW_FLAGS_MASK_FMT : 0;
1137        sch->ccw_no_data_cnt = 0;
1138        suspend_allowed = !!(orb->ctrl0 & ORB_CTRL0_MASK_SPND);
1139    } else {
1140        /* Start Function resumed via rsch */
1141        schib->scsw.ctrl &= ~(SCSW_ACTL_SUSP | SCSW_ACTL_RESUME_PEND);
1142        /* The channel program had been suspended before. */
1143        suspend_allowed = true;
1144    }
1145    sch->last_cmd_valid = false;
1146    do {
1147        ret = css_interpret_ccw(sch, sch->channel_prog, suspend_allowed);
1148        switch (ret) {
1149        case -EAGAIN:
1150            /* ccw chain, continue processing */
1151            break;
1152        case 0:
1153            /* success */
1154            schib->scsw.ctrl &= ~SCSW_ACTL_START_PEND;
1155            schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
1156            schib->scsw.ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
1157                    SCSW_STCTL_STATUS_PEND;
1158            schib->scsw.dstat = SCSW_DSTAT_CHANNEL_END | SCSW_DSTAT_DEVICE_END;
1159            schib->scsw.cpa = sch->channel_prog + 8;
1160            break;
1161        case -EIO:
1162            /* I/O errors, status depends on specific devices */
1163            break;
1164        case -ENOSYS:
1165            /* unsupported command, generate unit check (command reject) */
1166            schib->scsw.ctrl &= ~SCSW_ACTL_START_PEND;
1167            schib->scsw.dstat = SCSW_DSTAT_UNIT_CHECK;
1168            /* Set sense bit 0 in ecw0. */
1169            sch->sense_data[0] = 0x80;
1170            schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
1171            schib->scsw.ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
1172                    SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
1173            schib->scsw.cpa = sch->channel_prog + 8;
1174            break;
1175        case -EINPROGRESS:
1176            /* channel program has been suspended */
1177            schib->scsw.ctrl &= ~SCSW_ACTL_START_PEND;
1178            schib->scsw.ctrl |= SCSW_ACTL_SUSP;
1179            break;
1180        default:
1181            /* error, generate channel program check */
1182            schib->scsw.ctrl &= ~SCSW_ACTL_START_PEND;
1183            schib->scsw.cstat = SCSW_CSTAT_PROG_CHECK;
1184            schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
1185            schib->scsw.ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
1186                    SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
1187            schib->scsw.cpa = sch->channel_prog + 8;
1188            break;
1189        }
1190    } while (ret == -EAGAIN);
1191
1192}
1193
1194static IOInstEnding sch_handle_start_func_passthrough(SubchDev *sch)
1195{
1196    SCHIB *schib = &sch->curr_status;
1197    ORB *orb = &sch->orb;
1198    if (!(schib->scsw.ctrl & SCSW_ACTL_SUSP)) {
1199        assert(orb != NULL);
1200        schib->pmcw.intparm = orb->intparm;
1201    }
1202    return s390_ccw_cmd_request(sch);
1203}
1204
1205/*
1206 * On real machines, this would run asynchronously to the main vcpus.
1207 * We might want to make some parts of the ssch handling (interpreting
1208 * read/writes) asynchronous later on if we start supporting more than
1209 * our current very simple devices.
1210 */
1211IOInstEnding do_subchannel_work_virtual(SubchDev *sch)
1212{
1213    SCHIB *schib = &sch->curr_status;
1214
1215    if (schib->scsw.ctrl & SCSW_FCTL_CLEAR_FUNC) {
1216        sch_handle_clear_func(sch);
1217    } else if (schib->scsw.ctrl & SCSW_FCTL_HALT_FUNC) {
1218        sch_handle_halt_func(sch);
1219    } else if (schib->scsw.ctrl & SCSW_FCTL_START_FUNC) {
1220        /* Triggered by both ssch and rsch. */
1221        sch_handle_start_func_virtual(sch);
1222    }
1223    css_inject_io_interrupt(sch);
1224    /* inst must succeed if this func is called */
1225    return IOINST_CC_EXPECTED;
1226}
1227
1228IOInstEnding do_subchannel_work_passthrough(SubchDev *sch)
1229{
1230    SCHIB *schib = &sch->curr_status;
1231
1232    if (schib->scsw.ctrl & SCSW_FCTL_CLEAR_FUNC) {
1233        /* TODO: Clear handling */
1234        sch_handle_clear_func(sch);
1235    } else if (schib->scsw.ctrl & SCSW_FCTL_HALT_FUNC) {
1236        /* TODO: Halt handling */
1237        sch_handle_halt_func(sch);
1238    } else if (schib->scsw.ctrl & SCSW_FCTL_START_FUNC) {
1239        return sch_handle_start_func_passthrough(sch);
1240    }
1241    return IOINST_CC_EXPECTED;
1242}
1243
1244static IOInstEnding do_subchannel_work(SubchDev *sch)
1245{
1246    if (!sch->do_subchannel_work) {
1247        return IOINST_CC_STATUS_PRESENT;
1248    }
1249    g_assert(sch->curr_status.scsw.ctrl & SCSW_CTRL_MASK_FCTL);
1250    return sch->do_subchannel_work(sch);
1251}
1252
1253static void copy_pmcw_to_guest(PMCW *dest, const PMCW *src)
1254{
1255    int i;
1256
1257    dest->intparm = cpu_to_be32(src->intparm);
1258    dest->flags = cpu_to_be16(src->flags);
1259    dest->devno = cpu_to_be16(src->devno);
1260    dest->lpm = src->lpm;
1261    dest->pnom = src->pnom;
1262    dest->lpum = src->lpum;
1263    dest->pim = src->pim;
1264    dest->mbi = cpu_to_be16(src->mbi);
1265    dest->pom = src->pom;
1266    dest->pam = src->pam;
1267    for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) {
1268        dest->chpid[i] = src->chpid[i];
1269    }
1270    dest->chars = cpu_to_be32(src->chars);
1271}
1272
1273void copy_scsw_to_guest(SCSW *dest, const SCSW *src)
1274{
1275    dest->flags = cpu_to_be16(src->flags);
1276    dest->ctrl = cpu_to_be16(src->ctrl);
1277    dest->cpa = cpu_to_be32(src->cpa);
1278    dest->dstat = src->dstat;
1279    dest->cstat = src->cstat;
1280    dest->count = cpu_to_be16(src->count);
1281}
1282
1283static void copy_schib_to_guest(SCHIB *dest, const SCHIB *src)
1284{
1285    int i;
1286    /*
1287     * We copy the PMCW and SCSW in and out of local variables to
1288     * avoid taking the address of members of a packed struct.
1289     */
1290    PMCW src_pmcw, dest_pmcw;
1291    SCSW src_scsw, dest_scsw;
1292
1293    src_pmcw = src->pmcw;
1294    copy_pmcw_to_guest(&dest_pmcw, &src_pmcw);
1295    dest->pmcw = dest_pmcw;
1296    src_scsw = src->scsw;
1297    copy_scsw_to_guest(&dest_scsw, &src_scsw);
1298    dest->scsw = dest_scsw;
1299    dest->mba = cpu_to_be64(src->mba);
1300    for (i = 0; i < ARRAY_SIZE(dest->mda); i++) {
1301        dest->mda[i] = src->mda[i];
1302    }
1303}
1304
1305int css_do_stsch(SubchDev *sch, SCHIB *schib)
1306{
1307    /* Use current status. */
1308    copy_schib_to_guest(schib, &sch->curr_status);
1309    return 0;
1310}
1311
1312static void copy_pmcw_from_guest(PMCW *dest, const PMCW *src)
1313{
1314    int i;
1315
1316    dest->intparm = be32_to_cpu(src->intparm);
1317    dest->flags = be16_to_cpu(src->flags);
1318    dest->devno = be16_to_cpu(src->devno);
1319    dest->lpm = src->lpm;
1320    dest->pnom = src->pnom;
1321    dest->lpum = src->lpum;
1322    dest->pim = src->pim;
1323    dest->mbi = be16_to_cpu(src->mbi);
1324    dest->pom = src->pom;
1325    dest->pam = src->pam;
1326    for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) {
1327        dest->chpid[i] = src->chpid[i];
1328    }
1329    dest->chars = be32_to_cpu(src->chars);
1330}
1331
1332static void copy_scsw_from_guest(SCSW *dest, const SCSW *src)
1333{
1334    dest->flags = be16_to_cpu(src->flags);
1335    dest->ctrl = be16_to_cpu(src->ctrl);
1336    dest->cpa = be32_to_cpu(src->cpa);
1337    dest->dstat = src->dstat;
1338    dest->cstat = src->cstat;
1339    dest->count = be16_to_cpu(src->count);
1340}
1341
1342static void copy_schib_from_guest(SCHIB *dest, const SCHIB *src)
1343{
1344    int i;
1345    /*
1346     * We copy the PMCW and SCSW in and out of local variables to
1347     * avoid taking the address of members of a packed struct.
1348     */
1349    PMCW src_pmcw, dest_pmcw;
1350    SCSW src_scsw, dest_scsw;
1351
1352    src_pmcw = src->pmcw;
1353    copy_pmcw_from_guest(&dest_pmcw, &src_pmcw);
1354    dest->pmcw = dest_pmcw;
1355    src_scsw = src->scsw;
1356    copy_scsw_from_guest(&dest_scsw, &src_scsw);
1357    dest->scsw = dest_scsw;
1358    dest->mba = be64_to_cpu(src->mba);
1359    for (i = 0; i < ARRAY_SIZE(dest->mda); i++) {
1360        dest->mda[i] = src->mda[i];
1361    }
1362}
1363
1364IOInstEnding css_do_msch(SubchDev *sch, const SCHIB *orig_schib)
1365{
1366    SCHIB *schib = &sch->curr_status;
1367    uint16_t oldflags;
1368    SCHIB schib_copy;
1369
1370    if (!(schib->pmcw.flags & PMCW_FLAGS_MASK_DNV)) {
1371        return IOINST_CC_EXPECTED;
1372    }
1373
1374    if (schib->scsw.ctrl & SCSW_STCTL_STATUS_PEND) {
1375        return IOINST_CC_STATUS_PRESENT;
1376    }
1377
1378    if (schib->scsw.ctrl &
1379        (SCSW_FCTL_START_FUNC|SCSW_FCTL_HALT_FUNC|SCSW_FCTL_CLEAR_FUNC)) {
1380        return IOINST_CC_BUSY;
1381    }
1382
1383    copy_schib_from_guest(&schib_copy, orig_schib);
1384    /* Only update the program-modifiable fields. */
1385    schib->pmcw.intparm = schib_copy.pmcw.intparm;
1386    oldflags = schib->pmcw.flags;
1387    schib->pmcw.flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
1388                  PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
1389                  PMCW_FLAGS_MASK_MP);
1390    schib->pmcw.flags |= schib_copy.pmcw.flags &
1391            (PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
1392             PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
1393             PMCW_FLAGS_MASK_MP);
1394    schib->pmcw.lpm = schib_copy.pmcw.lpm;
1395    schib->pmcw.mbi = schib_copy.pmcw.mbi;
1396    schib->pmcw.pom = schib_copy.pmcw.pom;
1397    schib->pmcw.chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE);
1398    schib->pmcw.chars |= schib_copy.pmcw.chars &
1399            (PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE);
1400    schib->mba = schib_copy.mba;
1401
1402    /* Has the channel been disabled? */
1403    if (sch->disable_cb && (oldflags & PMCW_FLAGS_MASK_ENA) != 0
1404        && (schib->pmcw.flags & PMCW_FLAGS_MASK_ENA) == 0) {
1405        sch->disable_cb(sch);
1406    }
1407    return IOINST_CC_EXPECTED;
1408}
1409
1410IOInstEnding css_do_xsch(SubchDev *sch)
1411{
1412    SCHIB *schib = &sch->curr_status;
1413
1414    if (~(schib->pmcw.flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1415        return IOINST_CC_NOT_OPERATIONAL;
1416    }
1417
1418    if (schib->scsw.ctrl & SCSW_CTRL_MASK_STCTL) {
1419        return IOINST_CC_STATUS_PRESENT;
1420    }
1421
1422    if (!(schib->scsw.ctrl & SCSW_CTRL_MASK_FCTL) ||
1423        ((schib->scsw.ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) ||
1424        (!(schib->scsw.ctrl &
1425           (SCSW_ACTL_RESUME_PEND | SCSW_ACTL_START_PEND | SCSW_ACTL_SUSP))) ||
1426        (schib->scsw.ctrl & SCSW_ACTL_SUBCH_ACTIVE)) {
1427        return IOINST_CC_BUSY;
1428    }
1429
1430    /* Cancel the current operation. */
1431    schib->scsw.ctrl &= ~(SCSW_FCTL_START_FUNC |
1432                 SCSW_ACTL_RESUME_PEND |
1433                 SCSW_ACTL_START_PEND |
1434                 SCSW_ACTL_SUSP);
1435    sch->channel_prog = 0x0;
1436    sch->last_cmd_valid = false;
1437    schib->scsw.dstat = 0;
1438    schib->scsw.cstat = 0;
1439    return IOINST_CC_EXPECTED;
1440}
1441
1442IOInstEnding css_do_csch(SubchDev *sch)
1443{
1444    SCHIB *schib = &sch->curr_status;
1445
1446    if (~(schib->pmcw.flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1447        return IOINST_CC_NOT_OPERATIONAL;
1448    }
1449
1450    /* Trigger the clear function. */
1451    schib->scsw.ctrl &= ~(SCSW_CTRL_MASK_FCTL | SCSW_CTRL_MASK_ACTL);
1452    schib->scsw.ctrl |= SCSW_FCTL_CLEAR_FUNC | SCSW_ACTL_CLEAR_PEND;
1453
1454    return do_subchannel_work(sch);
1455}
1456
1457IOInstEnding css_do_hsch(SubchDev *sch)
1458{
1459    SCHIB *schib = &sch->curr_status;
1460
1461    if (~(schib->pmcw.flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1462        return IOINST_CC_NOT_OPERATIONAL;
1463    }
1464
1465    if (((schib->scsw.ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_STATUS_PEND) ||
1466        (schib->scsw.ctrl & (SCSW_STCTL_PRIMARY |
1467                    SCSW_STCTL_SECONDARY |
1468                    SCSW_STCTL_ALERT))) {
1469        return IOINST_CC_STATUS_PRESENT;
1470    }
1471
1472    if (schib->scsw.ctrl & (SCSW_FCTL_HALT_FUNC | SCSW_FCTL_CLEAR_FUNC)) {
1473        return IOINST_CC_BUSY;
1474    }
1475
1476    /* Trigger the halt function. */
1477    schib->scsw.ctrl |= SCSW_FCTL_HALT_FUNC;
1478    schib->scsw.ctrl &= ~SCSW_FCTL_START_FUNC;
1479    if (((schib->scsw.ctrl & SCSW_CTRL_MASK_ACTL) ==
1480         (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) &&
1481        ((schib->scsw.ctrl & SCSW_CTRL_MASK_STCTL) ==
1482         SCSW_STCTL_INTERMEDIATE)) {
1483        schib->scsw.ctrl &= ~SCSW_STCTL_STATUS_PEND;
1484    }
1485    schib->scsw.ctrl |= SCSW_ACTL_HALT_PEND;
1486
1487    return do_subchannel_work(sch);
1488}
1489
1490static void css_update_chnmon(SubchDev *sch)
1491{
1492    if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_MME)) {
1493        /* Not active. */
1494        return;
1495    }
1496    /* The counter is conveniently located at the beginning of the struct. */
1497    if (sch->curr_status.pmcw.chars & PMCW_CHARS_MASK_MBFC) {
1498        /* Format 1, per-subchannel area. */
1499        uint32_t count;
1500
1501        count = address_space_ldl(&address_space_memory,
1502                                  sch->curr_status.mba,
1503                                  MEMTXATTRS_UNSPECIFIED,
1504                                  NULL);
1505        count++;
1506        address_space_stl(&address_space_memory, sch->curr_status.mba, count,
1507                          MEMTXATTRS_UNSPECIFIED, NULL);
1508    } else {
1509        /* Format 0, global area. */
1510        uint32_t offset;
1511        uint16_t count;
1512
1513        offset = sch->curr_status.pmcw.mbi << 5;
1514        count = address_space_lduw(&address_space_memory,
1515                                   channel_subsys.chnmon_area + offset,
1516                                   MEMTXATTRS_UNSPECIFIED,
1517                                   NULL);
1518        count++;
1519        address_space_stw(&address_space_memory,
1520                          channel_subsys.chnmon_area + offset, count,
1521                          MEMTXATTRS_UNSPECIFIED, NULL);
1522    }
1523}
1524
1525IOInstEnding css_do_ssch(SubchDev *sch, ORB *orb)
1526{
1527    SCHIB *schib = &sch->curr_status;
1528
1529    if (~(schib->pmcw.flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1530        return IOINST_CC_NOT_OPERATIONAL;
1531    }
1532
1533    if (schib->scsw.ctrl & SCSW_STCTL_STATUS_PEND) {
1534        return IOINST_CC_STATUS_PRESENT;
1535    }
1536
1537    if (schib->scsw.ctrl & (SCSW_FCTL_START_FUNC |
1538                   SCSW_FCTL_HALT_FUNC |
1539                   SCSW_FCTL_CLEAR_FUNC)) {
1540        return IOINST_CC_BUSY;
1541    }
1542
1543    /* If monitoring is active, update counter. */
1544    if (channel_subsys.chnmon_active) {
1545        css_update_chnmon(sch);
1546    }
1547    sch->orb = *orb;
1548    sch->channel_prog = orb->cpa;
1549    /* Trigger the start function. */
1550    schib->scsw.ctrl |= (SCSW_FCTL_START_FUNC | SCSW_ACTL_START_PEND);
1551    schib->scsw.flags &= ~SCSW_FLAGS_MASK_PNO;
1552
1553    return do_subchannel_work(sch);
1554}
1555
1556static void copy_irb_to_guest(IRB *dest, const IRB *src, const PMCW *pmcw,
1557                              int *irb_len)
1558{
1559    int i;
1560    uint16_t stctl = src->scsw.ctrl & SCSW_CTRL_MASK_STCTL;
1561    uint16_t actl = src->scsw.ctrl & SCSW_CTRL_MASK_ACTL;
1562
1563    copy_scsw_to_guest(&dest->scsw, &src->scsw);
1564
1565    for (i = 0; i < ARRAY_SIZE(dest->esw); i++) {
1566        dest->esw[i] = cpu_to_be32(src->esw[i]);
1567    }
1568    for (i = 0; i < ARRAY_SIZE(dest->ecw); i++) {
1569        dest->ecw[i] = cpu_to_be32(src->ecw[i]);
1570    }
1571    *irb_len = sizeof(*dest) - sizeof(dest->emw);
1572
1573    /* extended measurements enabled? */
1574    if ((src->scsw.flags & SCSW_FLAGS_MASK_ESWF) ||
1575        !(pmcw->flags & PMCW_FLAGS_MASK_TF) ||
1576        !(pmcw->chars & PMCW_CHARS_MASK_XMWME)) {
1577        return;
1578    }
1579    /* extended measurements pending? */
1580    if (!(stctl & SCSW_STCTL_STATUS_PEND)) {
1581        return;
1582    }
1583    if ((stctl & SCSW_STCTL_PRIMARY) ||
1584        (stctl == SCSW_STCTL_SECONDARY) ||
1585        ((stctl & SCSW_STCTL_INTERMEDIATE) && (actl & SCSW_ACTL_SUSP))) {
1586        for (i = 0; i < ARRAY_SIZE(dest->emw); i++) {
1587            dest->emw[i] = cpu_to_be32(src->emw[i]);
1588        }
1589    }
1590    *irb_len = sizeof(*dest);
1591}
1592
1593int css_do_tsch_get_irb(SubchDev *sch, IRB *target_irb, int *irb_len)
1594{
1595    SCHIB *schib = &sch->curr_status;
1596    PMCW p;
1597    uint16_t stctl;
1598    IRB irb;
1599
1600    if (~(schib->pmcw.flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1601        return 3;
1602    }
1603
1604    stctl = schib->scsw.ctrl & SCSW_CTRL_MASK_STCTL;
1605
1606    /* Prepare the irb for the guest. */
1607    memset(&irb, 0, sizeof(IRB));
1608
1609    /* Copy scsw from current status. */
1610    irb.scsw = schib->scsw;
1611    if (stctl & SCSW_STCTL_STATUS_PEND) {
1612        if (schib->scsw.cstat & (SCSW_CSTAT_DATA_CHECK |
1613                        SCSW_CSTAT_CHN_CTRL_CHK |
1614                        SCSW_CSTAT_INTF_CTRL_CHK)) {
1615            irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF;
1616            irb.esw[0] = 0x04804000;
1617        } else {
1618            irb.esw[0] = 0x00800000;
1619        }
1620        /* If a unit check is pending, copy sense data. */
1621        if ((schib->scsw.dstat & SCSW_DSTAT_UNIT_CHECK) &&
1622            (schib->pmcw.chars & PMCW_CHARS_MASK_CSENSE)) {
1623            int i;
1624
1625            irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF | SCSW_FLAGS_MASK_ECTL;
1626            /* Attention: sense_data is already BE! */
1627            memcpy(irb.ecw, sch->sense_data, sizeof(sch->sense_data));
1628            for (i = 0; i < ARRAY_SIZE(irb.ecw); i++) {
1629                irb.ecw[i] = be32_to_cpu(irb.ecw[i]);
1630            }
1631            irb.esw[1] = 0x01000000 | (sizeof(sch->sense_data) << 8);
1632        }
1633    }
1634    /* Store the irb to the guest. */
1635    p = schib->pmcw;
1636    copy_irb_to_guest(target_irb, &irb, &p, irb_len);
1637
1638    return ((stctl & SCSW_STCTL_STATUS_PEND) == 0);
1639}
1640
1641void css_do_tsch_update_subch(SubchDev *sch)
1642{
1643    SCHIB *schib = &sch->curr_status;
1644    uint16_t stctl;
1645    uint16_t fctl;
1646    uint16_t actl;
1647
1648    stctl = schib->scsw.ctrl & SCSW_CTRL_MASK_STCTL;
1649    fctl = schib->scsw.ctrl & SCSW_CTRL_MASK_FCTL;
1650    actl = schib->scsw.ctrl & SCSW_CTRL_MASK_ACTL;
1651
1652    /* Clear conditions on subchannel, if applicable. */
1653    if (stctl & SCSW_STCTL_STATUS_PEND) {
1654        schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
1655        if ((stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) ||
1656            ((fctl & SCSW_FCTL_HALT_FUNC) &&
1657             (actl & SCSW_ACTL_SUSP))) {
1658            schib->scsw.ctrl &= ~SCSW_CTRL_MASK_FCTL;
1659        }
1660        if (stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) {
1661            schib->scsw.flags &= ~SCSW_FLAGS_MASK_PNO;
1662            schib->scsw.ctrl &= ~(SCSW_ACTL_RESUME_PEND |
1663                         SCSW_ACTL_START_PEND |
1664                         SCSW_ACTL_HALT_PEND |
1665                         SCSW_ACTL_CLEAR_PEND |
1666                         SCSW_ACTL_SUSP);
1667        } else {
1668            if ((actl & SCSW_ACTL_SUSP) &&
1669                (fctl & SCSW_FCTL_START_FUNC)) {
1670                schib->scsw.flags &= ~SCSW_FLAGS_MASK_PNO;
1671                if (fctl & SCSW_FCTL_HALT_FUNC) {
1672                    schib->scsw.ctrl &= ~(SCSW_ACTL_RESUME_PEND |
1673                                 SCSW_ACTL_START_PEND |
1674                                 SCSW_ACTL_HALT_PEND |
1675                                 SCSW_ACTL_CLEAR_PEND |
1676                                 SCSW_ACTL_SUSP);
1677                } else {
1678                    schib->scsw.ctrl &= ~SCSW_ACTL_RESUME_PEND;
1679                }
1680            }
1681        }
1682        /* Clear pending sense data. */
1683        if (schib->pmcw.chars & PMCW_CHARS_MASK_CSENSE) {
1684            memset(sch->sense_data, 0 , sizeof(sch->sense_data));
1685        }
1686    }
1687}
1688
1689static void copy_crw_to_guest(CRW *dest, const CRW *src)
1690{
1691    dest->flags = cpu_to_be16(src->flags);
1692    dest->rsid = cpu_to_be16(src->rsid);
1693}
1694
1695int css_do_stcrw(CRW *crw)
1696{
1697    CrwContainer *crw_cont;
1698    int ret;
1699
1700    crw_cont = QTAILQ_FIRST(&channel_subsys.pending_crws);
1701    if (crw_cont) {
1702        QTAILQ_REMOVE(&channel_subsys.pending_crws, crw_cont, sibling);
1703        copy_crw_to_guest(crw, &crw_cont->crw);
1704        g_free(crw_cont);
1705        ret = 0;
1706    } else {
1707        /* List was empty, turn crw machine checks on again. */
1708        memset(crw, 0, sizeof(*crw));
1709        channel_subsys.do_crw_mchk = true;
1710        ret = 1;
1711    }
1712
1713    return ret;
1714}
1715
1716static void copy_crw_from_guest(CRW *dest, const CRW *src)
1717{
1718    dest->flags = be16_to_cpu(src->flags);
1719    dest->rsid = be16_to_cpu(src->rsid);
1720}
1721
1722void css_undo_stcrw(CRW *crw)
1723{
1724    CrwContainer *crw_cont;
1725
1726    crw_cont = g_try_new0(CrwContainer, 1);
1727    if (!crw_cont) {
1728        channel_subsys.crws_lost = true;
1729        return;
1730    }
1731    copy_crw_from_guest(&crw_cont->crw, crw);
1732
1733    QTAILQ_INSERT_HEAD(&channel_subsys.pending_crws, crw_cont, sibling);
1734}
1735
1736int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, uint8_t l_chpid,
1737                         int rfmt, void *buf)
1738{
1739    int i, desc_size;
1740    uint32_t words[8];
1741    uint32_t chpid_type_word;
1742    CssImage *css;
1743
1744    if (!m && !cssid) {
1745        css = channel_subsys.css[channel_subsys.default_cssid];
1746    } else {
1747        css = channel_subsys.css[cssid];
1748    }
1749    if (!css) {
1750        return 0;
1751    }
1752    desc_size = 0;
1753    for (i = f_chpid; i <= l_chpid; i++) {
1754        if (css->chpids[i].in_use) {
1755            chpid_type_word = 0x80000000 | (css->chpids[i].type << 8) | i;
1756            if (rfmt == 0) {
1757                words[0] = cpu_to_be32(chpid_type_word);
1758                words[1] = 0;
1759                memcpy(buf + desc_size, words, 8);
1760                desc_size += 8;
1761            } else if (rfmt == 1) {
1762                words[0] = cpu_to_be32(chpid_type_word);
1763                words[1] = 0;
1764                words[2] = 0;
1765                words[3] = 0;
1766                words[4] = 0;
1767                words[5] = 0;
1768                words[6] = 0;
1769                words[7] = 0;
1770                memcpy(buf + desc_size, words, 32);
1771                desc_size += 32;
1772            }
1773        }
1774    }
1775    return desc_size;
1776}
1777
1778void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo)
1779{
1780    /* dct is currently ignored (not really meaningful for our devices) */
1781    /* TODO: Don't ignore mbk. */
1782    if (update && !channel_subsys.chnmon_active) {
1783        /* Enable measuring. */
1784        channel_subsys.chnmon_area = mbo;
1785        channel_subsys.chnmon_active = true;
1786    }
1787    if (!update && channel_subsys.chnmon_active) {
1788        /* Disable measuring. */
1789        channel_subsys.chnmon_area = 0;
1790        channel_subsys.chnmon_active = false;
1791    }
1792}
1793
1794IOInstEnding css_do_rsch(SubchDev *sch)
1795{
1796    SCHIB *schib = &sch->curr_status;
1797
1798    if (~(schib->pmcw.flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1799        return IOINST_CC_NOT_OPERATIONAL;
1800    }
1801
1802    if (schib->scsw.ctrl & SCSW_STCTL_STATUS_PEND) {
1803        return IOINST_CC_STATUS_PRESENT;
1804    }
1805
1806    if (((schib->scsw.ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) ||
1807        (schib->scsw.ctrl & SCSW_ACTL_RESUME_PEND) ||
1808        (!(schib->scsw.ctrl & SCSW_ACTL_SUSP))) {
1809        return IOINST_CC_BUSY;
1810    }
1811
1812    /* If monitoring is active, update counter. */
1813    if (channel_subsys.chnmon_active) {
1814        css_update_chnmon(sch);
1815    }
1816
1817    schib->scsw.ctrl |= SCSW_ACTL_RESUME_PEND;
1818    return do_subchannel_work(sch);
1819}
1820
1821int css_do_rchp(uint8_t cssid, uint8_t chpid)
1822{
1823    uint8_t real_cssid;
1824
1825    if (cssid > channel_subsys.max_cssid) {
1826        return -EINVAL;
1827    }
1828    if (channel_subsys.max_cssid == 0) {
1829        real_cssid = channel_subsys.default_cssid;
1830    } else {
1831        real_cssid = cssid;
1832    }
1833    if (!channel_subsys.css[real_cssid]) {
1834        return -EINVAL;
1835    }
1836
1837    if (!channel_subsys.css[real_cssid]->chpids[chpid].in_use) {
1838        return -ENODEV;
1839    }
1840
1841    if (!channel_subsys.css[real_cssid]->chpids[chpid].is_virtual) {
1842        fprintf(stderr,
1843                "rchp unsupported for non-virtual chpid %x.%02x!\n",
1844                real_cssid, chpid);
1845        return -ENODEV;
1846    }
1847
1848    /* We don't really use a channel path, so we're done here. */
1849    css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT, 1,
1850                  channel_subsys.max_cssid > 0 ? 1 : 0, chpid);
1851    if (channel_subsys.max_cssid > 0) {
1852        css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT, 1, 0, real_cssid << 8);
1853    }
1854    return 0;
1855}
1856
1857bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid)
1858{
1859    SubchSet *set;
1860    uint8_t real_cssid;
1861
1862    real_cssid = (!m && (cssid == 0)) ? channel_subsys.default_cssid : cssid;
1863    if (ssid > MAX_SSID ||
1864        !channel_subsys.css[real_cssid] ||
1865        !channel_subsys.css[real_cssid]->sch_set[ssid]) {
1866        return true;
1867    }
1868    set = channel_subsys.css[real_cssid]->sch_set[ssid];
1869    return schid > find_last_bit(set->schids_used,
1870                                 (MAX_SCHID + 1) / sizeof(unsigned long));
1871}
1872
1873unsigned int css_find_free_chpid(uint8_t cssid)
1874{
1875    CssImage *css = channel_subsys.css[cssid];
1876    unsigned int chpid;
1877
1878    if (!css) {
1879        return MAX_CHPID + 1;
1880    }
1881
1882    for (chpid = 0; chpid <= MAX_CHPID; chpid++) {
1883        /* skip reserved chpid */
1884        if (chpid == VIRTIO_CCW_CHPID) {
1885            continue;
1886        }
1887        if (!css->chpids[chpid].in_use) {
1888            return chpid;
1889        }
1890    }
1891    return MAX_CHPID + 1;
1892}
1893
1894static int css_add_chpid(uint8_t cssid, uint8_t chpid, uint8_t type,
1895                         bool is_virt)
1896{
1897    CssImage *css;
1898
1899    trace_css_chpid_add(cssid, chpid, type);
1900    css = channel_subsys.css[cssid];
1901    if (!css) {
1902        return -EINVAL;
1903    }
1904    if (css->chpids[chpid].in_use) {
1905        return -EEXIST;
1906    }
1907    css->chpids[chpid].in_use = 1;
1908    css->chpids[chpid].type = type;
1909    css->chpids[chpid].is_virtual = is_virt;
1910
1911    css_generate_chp_crws(cssid, chpid);
1912
1913    return 0;
1914}
1915
1916void css_sch_build_virtual_schib(SubchDev *sch, uint8_t chpid, uint8_t type)
1917{
1918    SCHIB *schib = &sch->curr_status;
1919    int i;
1920    CssImage *css = channel_subsys.css[sch->cssid];
1921
1922    assert(css != NULL);
1923    memset(&schib->pmcw, 0, sizeof(PMCW));
1924    schib->pmcw.flags |= PMCW_FLAGS_MASK_DNV;
1925    schib->pmcw.devno = sch->devno;
1926    /* single path */
1927    schib->pmcw.pim = 0x80;
1928    schib->pmcw.pom = 0xff;
1929    schib->pmcw.pam = 0x80;
1930    schib->pmcw.chpid[0] = chpid;
1931    if (!css->chpids[chpid].in_use) {
1932        css_add_chpid(sch->cssid, chpid, type, true);
1933    }
1934
1935    memset(&schib->scsw, 0, sizeof(SCSW));
1936    schib->mba = 0;
1937    for (i = 0; i < ARRAY_SIZE(schib->mda); i++) {
1938        schib->mda[i] = 0;
1939    }
1940}
1941
1942SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid, uint16_t schid)
1943{
1944    uint8_t real_cssid;
1945
1946    real_cssid = (!m && (cssid == 0)) ? channel_subsys.default_cssid : cssid;
1947
1948    if (!channel_subsys.css[real_cssid]) {
1949        return NULL;
1950    }
1951
1952    if (!channel_subsys.css[real_cssid]->sch_set[ssid]) {
1953        return NULL;
1954    }
1955
1956    return channel_subsys.css[real_cssid]->sch_set[ssid]->sch[schid];
1957}
1958
1959/**
1960 * Return free device number in subchannel set.
1961 *
1962 * Return index of the first free device number in the subchannel set
1963 * identified by @p cssid and @p ssid, beginning the search at @p
1964 * start and wrapping around at MAX_DEVNO. Return a value exceeding
1965 * MAX_SCHID if there are no free device numbers in the subchannel
1966 * set.
1967 */
1968static uint32_t css_find_free_devno(uint8_t cssid, uint8_t ssid,
1969                                    uint16_t start)
1970{
1971    uint32_t round;
1972
1973    for (round = 0; round <= MAX_DEVNO; round++) {
1974        uint16_t devno = (start + round) % MAX_DEVNO;
1975
1976        if (!css_devno_used(cssid, ssid, devno)) {
1977            return devno;
1978        }
1979    }
1980    return MAX_DEVNO + 1;
1981}
1982
1983/**
1984 * Return first free subchannel (id) in subchannel set.
1985 *
1986 * Return index of the first free subchannel in the subchannel set
1987 * identified by @p cssid and @p ssid, if there is any. Return a value
1988 * exceeding MAX_SCHID if there are no free subchannels in the
1989 * subchannel set.
1990 */
1991static uint32_t css_find_free_subch(uint8_t cssid, uint8_t ssid)
1992{
1993    uint32_t schid;
1994
1995    for (schid = 0; schid <= MAX_SCHID; schid++) {
1996        if (!css_find_subch(1, cssid, ssid, schid)) {
1997            return schid;
1998        }
1999    }
2000    return MAX_SCHID + 1;
2001}
2002
2003/**
2004 * Return first free subchannel (id) in subchannel set for a device number
2005 *
2006 * Verify the device number @p devno is not used yet in the subchannel
2007 * set identified by @p cssid and @p ssid. Set @p schid to the index
2008 * of the first free subchannel in the subchannel set, if there is
2009 * any. Return true if everything succeeded and false otherwise.
2010 */
2011static bool css_find_free_subch_for_devno(uint8_t cssid, uint8_t ssid,
2012                                          uint16_t devno, uint16_t *schid,
2013                                          Error **errp)
2014{
2015    uint32_t free_schid;
2016
2017    assert(schid);
2018    if (css_devno_used(cssid, ssid, devno)) {
2019        error_setg(errp, "Device %x.%x.%04x already exists",
2020                   cssid, ssid, devno);
2021        return false;
2022    }
2023    free_schid = css_find_free_subch(cssid, ssid);
2024    if (free_schid > MAX_SCHID) {
2025        error_setg(errp, "No free subchannel found for %x.%x.%04x",
2026                   cssid, ssid, devno);
2027        return false;
2028    }
2029    *schid = free_schid;
2030    return true;
2031}
2032
2033/**
2034 * Return first free subchannel (id) and device number
2035 *
2036 * Locate the first free subchannel and first free device number in
2037 * any of the subchannel sets of the channel subsystem identified by
2038 * @p cssid. Return false if no free subchannel / device number could
2039 * be found. Otherwise set @p ssid, @p devno and @p schid to identify
2040 * the available subchannel and device number and return true.
2041 *
2042 * May modify @p ssid, @p devno and / or @p schid even if no free
2043 * subchannel / device number could be found.
2044 */
2045static bool css_find_free_subch_and_devno(uint8_t cssid, uint8_t *ssid,
2046                                          uint16_t *devno, uint16_t *schid,
2047                                          Error **errp)
2048{
2049    uint32_t free_schid, free_devno;
2050
2051    assert(ssid && devno && schid);
2052    for (*ssid = 0; *ssid <= MAX_SSID; (*ssid)++) {
2053        free_schid = css_find_free_subch(cssid, *ssid);
2054        if (free_schid > MAX_SCHID) {
2055            continue;
2056        }
2057        free_devno = css_find_free_devno(cssid, *ssid, free_schid);
2058        if (free_devno > MAX_DEVNO) {
2059            continue;
2060        }
2061        *schid = free_schid;
2062        *devno = free_devno;
2063        return true;
2064    }
2065    error_setg(errp, "Virtual channel subsystem is full!");
2066    return false;
2067}
2068
2069bool css_subch_visible(SubchDev *sch)
2070{
2071    if (sch->ssid > channel_subsys.max_ssid) {
2072        return false;
2073    }
2074
2075    if (sch->cssid != channel_subsys.default_cssid) {
2076        return (channel_subsys.max_cssid > 0);
2077    }
2078
2079    return true;
2080}
2081
2082bool css_present(uint8_t cssid)
2083{
2084    return (channel_subsys.css[cssid] != NULL);
2085}
2086
2087bool css_devno_used(uint8_t cssid, uint8_t ssid, uint16_t devno)
2088{
2089    if (!channel_subsys.css[cssid]) {
2090        return false;
2091    }
2092    if (!channel_subsys.css[cssid]->sch_set[ssid]) {
2093        return false;
2094    }
2095
2096    return !!test_bit(devno,
2097                      channel_subsys.css[cssid]->sch_set[ssid]->devnos_used);
2098}
2099
2100void css_subch_assign(uint8_t cssid, uint8_t ssid, uint16_t schid,
2101                      uint16_t devno, SubchDev *sch)
2102{
2103    CssImage *css;
2104    SubchSet *s_set;
2105
2106    trace_css_assign_subch(sch ? "assign" : "deassign", cssid, ssid, schid,
2107                           devno);
2108    if (!channel_subsys.css[cssid]) {
2109        fprintf(stderr,
2110                "Suspicious call to %s (%x.%x.%04x) for non-existing css!\n",
2111                __func__, cssid, ssid, schid);
2112        return;
2113    }
2114    css = channel_subsys.css[cssid];
2115
2116    if (!css->sch_set[ssid]) {
2117        css->sch_set[ssid] = g_new0(SubchSet, 1);
2118    }
2119    s_set = css->sch_set[ssid];
2120
2121    s_set->sch[schid] = sch;
2122    if (sch) {
2123        set_bit(schid, s_set->schids_used);
2124        set_bit(devno, s_set->devnos_used);
2125    } else {
2126        clear_bit(schid, s_set->schids_used);
2127        clear_bit(devno, s_set->devnos_used);
2128    }
2129}
2130
2131void css_queue_crw(uint8_t rsc, uint8_t erc, int solicited,
2132                   int chain, uint16_t rsid)
2133{
2134    CrwContainer *crw_cont;
2135
2136    trace_css_crw(rsc, erc, rsid, chain ? "(chained)" : "");
2137    /* TODO: Maybe use a static crw pool? */
2138    crw_cont = g_try_new0(CrwContainer, 1);
2139    if (!crw_cont) {
2140        channel_subsys.crws_lost = true;
2141        return;
2142    }
2143    crw_cont->crw.flags = (rsc << 8) | erc;
2144    if (solicited) {
2145        crw_cont->crw.flags |= CRW_FLAGS_MASK_S;
2146    }
2147    if (chain) {
2148        crw_cont->crw.flags |= CRW_FLAGS_MASK_C;
2149    }
2150    crw_cont->crw.rsid = rsid;
2151    if (channel_subsys.crws_lost) {
2152        crw_cont->crw.flags |= CRW_FLAGS_MASK_R;
2153        channel_subsys.crws_lost = false;
2154    }
2155
2156    QTAILQ_INSERT_TAIL(&channel_subsys.pending_crws, crw_cont, sibling);
2157
2158    if (channel_subsys.do_crw_mchk) {
2159        channel_subsys.do_crw_mchk = false;
2160        /* Inject crw pending machine check. */
2161        s390_crw_mchk();
2162    }
2163}
2164
2165void css_generate_sch_crws(uint8_t cssid, uint8_t ssid, uint16_t schid,
2166                           int hotplugged, int add)
2167{
2168    uint8_t guest_cssid;
2169    bool chain_crw;
2170
2171    if (add && !hotplugged) {
2172        return;
2173    }
2174    if (channel_subsys.max_cssid == 0) {
2175        /* Default cssid shows up as 0. */
2176        guest_cssid = (cssid == channel_subsys.default_cssid) ? 0 : cssid;
2177    } else {
2178        /* Show real cssid to the guest. */
2179        guest_cssid = cssid;
2180    }
2181    /*
2182     * Only notify for higher subchannel sets/channel subsystems if the
2183     * guest has enabled it.
2184     */
2185    if ((ssid > channel_subsys.max_ssid) ||
2186        (guest_cssid > channel_subsys.max_cssid) ||
2187        ((channel_subsys.max_cssid == 0) &&
2188         (cssid != channel_subsys.default_cssid))) {
2189        return;
2190    }
2191    chain_crw = (channel_subsys.max_ssid > 0) ||
2192            (channel_subsys.max_cssid > 0);
2193    css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, 0, chain_crw ? 1 : 0, schid);
2194    if (chain_crw) {
2195        css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, 0, 0,
2196                      (guest_cssid << 8) | (ssid << 4));
2197    }
2198    /* RW_ERC_IPI --> clear pending interrupts */
2199    css_clear_io_interrupt(css_do_build_subchannel_id(cssid, ssid), schid);
2200}
2201
2202void css_generate_chp_crws(uint8_t cssid, uint8_t chpid)
2203{
2204    /* TODO */
2205}
2206
2207void css_generate_css_crws(uint8_t cssid)
2208{
2209    if (!channel_subsys.sei_pending) {
2210        css_queue_crw(CRW_RSC_CSS, CRW_ERC_EVENT, 0, 0, cssid);
2211    }
2212    channel_subsys.sei_pending = true;
2213}
2214
2215void css_clear_sei_pending(void)
2216{
2217    channel_subsys.sei_pending = false;
2218}
2219
2220int css_enable_mcsse(void)
2221{
2222    trace_css_enable_facility("mcsse");
2223    channel_subsys.max_cssid = MAX_CSSID;
2224    return 0;
2225}
2226
2227int css_enable_mss(void)
2228{
2229    trace_css_enable_facility("mss");
2230    channel_subsys.max_ssid = MAX_SSID;
2231    return 0;
2232}
2233
2234void css_reset_sch(SubchDev *sch)
2235{
2236    SCHIB *schib = &sch->curr_status;
2237
2238    if ((schib->pmcw.flags & PMCW_FLAGS_MASK_ENA) != 0 && sch->disable_cb) {
2239        sch->disable_cb(sch);
2240    }
2241
2242    schib->pmcw.intparm = 0;
2243    schib->pmcw.flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
2244                  PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
2245                  PMCW_FLAGS_MASK_MP | PMCW_FLAGS_MASK_TF);
2246    schib->pmcw.flags |= PMCW_FLAGS_MASK_DNV;
2247    schib->pmcw.devno = sch->devno;
2248    schib->pmcw.pim = 0x80;
2249    schib->pmcw.lpm = schib->pmcw.pim;
2250    schib->pmcw.pnom = 0;
2251    schib->pmcw.lpum = 0;
2252    schib->pmcw.mbi = 0;
2253    schib->pmcw.pom = 0xff;
2254    schib->pmcw.pam = 0x80;
2255    schib->pmcw.chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_XMWME |
2256                  PMCW_CHARS_MASK_CSENSE);
2257
2258    memset(&schib->scsw, 0, sizeof(schib->scsw));
2259    schib->mba = 0;
2260
2261    sch->channel_prog = 0x0;
2262    sch->last_cmd_valid = false;
2263    sch->thinint_active = false;
2264}
2265
2266void css_reset(void)
2267{
2268    CrwContainer *crw_cont;
2269
2270    /* Clean up monitoring. */
2271    channel_subsys.chnmon_active = false;
2272    channel_subsys.chnmon_area = 0;
2273
2274    /* Clear pending CRWs. */
2275    while ((crw_cont = QTAILQ_FIRST(&channel_subsys.pending_crws))) {
2276        QTAILQ_REMOVE(&channel_subsys.pending_crws, crw_cont, sibling);
2277        g_free(crw_cont);
2278    }
2279    channel_subsys.sei_pending = false;
2280    channel_subsys.do_crw_mchk = true;
2281    channel_subsys.crws_lost = false;
2282
2283    /* Reset maximum ids. */
2284    channel_subsys.max_cssid = 0;
2285    channel_subsys.max_ssid = 0;
2286}
2287
2288static void get_css_devid(Object *obj, Visitor *v, const char *name,
2289                          void *opaque, Error **errp)
2290{
2291    DeviceState *dev = DEVICE(obj);
2292    Property *prop = opaque;
2293    CssDevId *dev_id = qdev_get_prop_ptr(dev, prop);
2294    char buffer[] = "xx.x.xxxx";
2295    char *p = buffer;
2296    int r;
2297
2298    if (dev_id->valid) {
2299
2300        r = snprintf(buffer, sizeof(buffer), "%02x.%1x.%04x", dev_id->cssid,
2301                     dev_id->ssid, dev_id->devid);
2302        assert(r == sizeof(buffer) - 1);
2303
2304        /* drop leading zero */
2305        if (dev_id->cssid <= 0xf) {
2306            p++;
2307        }
2308    } else {
2309        snprintf(buffer, sizeof(buffer), "<unset>");
2310    }
2311
2312    visit_type_str(v, name, &p, errp);
2313}
2314
2315/*
2316 * parse <cssid>.<ssid>.<devid> and assert valid range for cssid/ssid
2317 */
2318static void set_css_devid(Object *obj, Visitor *v, const char *name,
2319                          void *opaque, Error **errp)
2320{
2321    DeviceState *dev = DEVICE(obj);
2322    Property *prop = opaque;
2323    CssDevId *dev_id = qdev_get_prop_ptr(dev, prop);
2324    Error *local_err = NULL;
2325    char *str;
2326    int num, n1, n2;
2327    unsigned int cssid, ssid, devid;
2328
2329    if (dev->realized) {
2330        qdev_prop_set_after_realize(dev, name, errp);
2331        return;
2332    }
2333
2334    visit_type_str(v, name, &str, &local_err);
2335    if (local_err) {
2336        error_propagate(errp, local_err);
2337        return;
2338    }
2339
2340    num = sscanf(str, "%2x.%1x%n.%4x%n", &cssid, &ssid, &n1, &devid, &n2);
2341    if (num != 3 || (n2 - n1) != 5 || strlen(str) != n2) {
2342        error_set_from_qdev_prop_error(errp, EINVAL, dev, prop, str);
2343        goto out;
2344    }
2345    if ((cssid > MAX_CSSID) || (ssid > MAX_SSID)) {
2346        error_setg(errp, "Invalid cssid or ssid: cssid %x, ssid %x",
2347                   cssid, ssid);
2348        goto out;
2349    }
2350
2351    dev_id->cssid = cssid;
2352    dev_id->ssid = ssid;
2353    dev_id->devid = devid;
2354    dev_id->valid = true;
2355
2356out:
2357    g_free(str);
2358}
2359
2360const PropertyInfo css_devid_propinfo = {
2361    .name = "str",
2362    .description = "Identifier of an I/O device in the channel "
2363                   "subsystem, example: fe.1.23ab",
2364    .get = get_css_devid,
2365    .set = set_css_devid,
2366};
2367
2368const PropertyInfo css_devid_ro_propinfo = {
2369    .name = "str",
2370    .description = "Read-only identifier of an I/O device in the channel "
2371                   "subsystem, example: fe.1.23ab",
2372    .get = get_css_devid,
2373};
2374
2375SubchDev *css_create_sch(CssDevId bus_id, Error **errp)
2376{
2377    uint16_t schid = 0;
2378    SubchDev *sch;
2379
2380    if (bus_id.valid) {
2381        if (!channel_subsys.css[bus_id.cssid]) {
2382            css_create_css_image(bus_id.cssid, false);
2383        }
2384
2385        if (!css_find_free_subch_for_devno(bus_id.cssid, bus_id.ssid,
2386                                           bus_id.devid, &schid, errp)) {
2387            return NULL;
2388        }
2389    } else {
2390        for (bus_id.cssid = channel_subsys.default_cssid;;) {
2391            if (!channel_subsys.css[bus_id.cssid]) {
2392                css_create_css_image(bus_id.cssid, false);
2393            }
2394
2395            if   (css_find_free_subch_and_devno(bus_id.cssid, &bus_id.ssid,
2396                                                &bus_id.devid, &schid,
2397                                                NULL)) {
2398                break;
2399            }
2400            bus_id.cssid = (bus_id.cssid + 1) % MAX_CSSID;
2401            if (bus_id.cssid == channel_subsys.default_cssid) {
2402                error_setg(errp, "Virtual channel subsystem is full!");
2403                return NULL;
2404            }
2405        }
2406    }
2407
2408    sch = g_new0(SubchDev, 1);
2409    sch->cssid = bus_id.cssid;
2410    sch->ssid = bus_id.ssid;
2411    sch->devno = bus_id.devid;
2412    sch->schid = schid;
2413    css_subch_assign(sch->cssid, sch->ssid, schid, sch->devno, sch);
2414    return sch;
2415}
2416
2417static int css_sch_get_chpids(SubchDev *sch, CssDevId *dev_id)
2418{
2419    char *fid_path;
2420    FILE *fd;
2421    uint32_t chpid[8];
2422    int i;
2423    SCHIB *schib = &sch->curr_status;
2424
2425    fid_path = g_strdup_printf("/sys/bus/css/devices/%x.%x.%04x/chpids",
2426                               dev_id->cssid, dev_id->ssid, dev_id->devid);
2427    fd = fopen(fid_path, "r");
2428    if (fd == NULL) {
2429        error_report("%s: open %s failed", __func__, fid_path);
2430        g_free(fid_path);
2431        return -EINVAL;
2432    }
2433
2434    if (fscanf(fd, "%x %x %x %x %x %x %x %x",
2435        &chpid[0], &chpid[1], &chpid[2], &chpid[3],
2436        &chpid[4], &chpid[5], &chpid[6], &chpid[7]) != 8) {
2437        fclose(fd);
2438        g_free(fid_path);
2439        return -EINVAL;
2440    }
2441
2442    for (i = 0; i < ARRAY_SIZE(schib->pmcw.chpid); i++) {
2443        schib->pmcw.chpid[i] = chpid[i];
2444    }
2445
2446    fclose(fd);
2447    g_free(fid_path);
2448
2449    return 0;
2450}
2451
2452static int css_sch_get_path_masks(SubchDev *sch, CssDevId *dev_id)
2453{
2454    char *fid_path;
2455    FILE *fd;
2456    uint32_t pim, pam, pom;
2457    SCHIB *schib = &sch->curr_status;
2458
2459    fid_path = g_strdup_printf("/sys/bus/css/devices/%x.%x.%04x/pimpampom",
2460                               dev_id->cssid, dev_id->ssid, dev_id->devid);
2461    fd = fopen(fid_path, "r");
2462    if (fd == NULL) {
2463        error_report("%s: open %s failed", __func__, fid_path);
2464        g_free(fid_path);
2465        return -EINVAL;
2466    }
2467
2468    if (fscanf(fd, "%x %x %x", &pim, &pam, &pom) != 3) {
2469        fclose(fd);
2470        g_free(fid_path);
2471        return -EINVAL;
2472    }
2473
2474    schib->pmcw.pim = pim;
2475    schib->pmcw.pam = pam;
2476    schib->pmcw.pom = pom;
2477    fclose(fd);
2478    g_free(fid_path);
2479
2480    return 0;
2481}
2482
2483static int css_sch_get_chpid_type(uint8_t chpid, uint32_t *type,
2484                                  CssDevId *dev_id)
2485{
2486    char *fid_path;
2487    FILE *fd;
2488
2489    fid_path = g_strdup_printf("/sys/devices/css%x/chp0.%02x/type",
2490                               dev_id->cssid, chpid);
2491    fd = fopen(fid_path, "r");
2492    if (fd == NULL) {
2493        error_report("%s: open %s failed", __func__, fid_path);
2494        g_free(fid_path);
2495        return -EINVAL;
2496    }
2497
2498    if (fscanf(fd, "%x", type) != 1) {
2499        fclose(fd);
2500        g_free(fid_path);
2501        return -EINVAL;
2502    }
2503
2504    fclose(fd);
2505    g_free(fid_path);
2506
2507    return 0;
2508}
2509
2510/*
2511 * We currently retrieve the real device information from sysfs to build the
2512 * guest subchannel information block without considering the migration feature.
2513 * We need to revisit this problem when we want to add migration support.
2514 */
2515int css_sch_build_schib(SubchDev *sch, CssDevId *dev_id)
2516{
2517    CssImage *css = channel_subsys.css[sch->cssid];
2518    SCHIB *schib = &sch->curr_status;
2519    uint32_t type;
2520    int i, ret;
2521
2522    assert(css != NULL);
2523    memset(&schib->pmcw, 0, sizeof(PMCW));
2524    schib->pmcw.flags |= PMCW_FLAGS_MASK_DNV;
2525    /* We are dealing with I/O subchannels only. */
2526    schib->pmcw.devno = sch->devno;
2527
2528    /* Grab path mask from sysfs. */
2529    ret = css_sch_get_path_masks(sch, dev_id);
2530    if (ret) {
2531        return ret;
2532    }
2533
2534    /* Grab chpids from sysfs. */
2535    ret = css_sch_get_chpids(sch, dev_id);
2536    if (ret) {
2537        return ret;
2538    }
2539
2540   /* Build chpid type. */
2541    for (i = 0; i < ARRAY_SIZE(schib->pmcw.chpid); i++) {
2542        if (schib->pmcw.chpid[i] && !css->chpids[schib->pmcw.chpid[i]].in_use) {
2543            ret = css_sch_get_chpid_type(schib->pmcw.chpid[i], &type, dev_id);
2544            if (ret) {
2545                return ret;
2546            }
2547            css_add_chpid(sch->cssid, schib->pmcw.chpid[i], type, false);
2548        }
2549    }
2550
2551    memset(&schib->scsw, 0, sizeof(SCSW));
2552    schib->mba = 0;
2553    for (i = 0; i < ARRAY_SIZE(schib->mda); i++) {
2554        schib->mda[i] = 0;
2555    }
2556
2557    return 0;
2558}
2559