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18#include "qemu/osdep.h"
19#include "hw/usb/hcd-ehci.h"
20
21static const VMStateDescription vmstate_ehci_sysbus = {
22 .name = "ehci-sysbus",
23 .version_id = 2,
24 .minimum_version_id = 1,
25 .fields = (VMStateField[]) {
26 VMSTATE_STRUCT(ehci, EHCISysBusState, 2, vmstate_ehci, EHCIState),
27 VMSTATE_END_OF_LIST()
28 }
29};
30
31static Property ehci_sysbus_properties[] = {
32 DEFINE_PROP_UINT32("maxframes", EHCISysBusState, ehci.maxframes, 128),
33 DEFINE_PROP_END_OF_LIST(),
34};
35
36static void usb_ehci_sysbus_realize(DeviceState *dev, Error **errp)
37{
38 SysBusDevice *d = SYS_BUS_DEVICE(dev);
39 EHCISysBusState *i = SYS_BUS_EHCI(dev);
40 EHCIState *s = &i->ehci;
41
42 usb_ehci_realize(s, dev, errp);
43 sysbus_init_irq(d, &s->irq);
44}
45
46static void usb_ehci_sysbus_reset(DeviceState *dev)
47{
48 SysBusDevice *d = SYS_BUS_DEVICE(dev);
49 EHCISysBusState *i = SYS_BUS_EHCI(d);
50 EHCIState *s = &i->ehci;
51
52 ehci_reset(s);
53}
54
55static void ehci_sysbus_init(Object *obj)
56{
57 SysBusDevice *d = SYS_BUS_DEVICE(obj);
58 EHCISysBusState *i = SYS_BUS_EHCI(obj);
59 SysBusEHCIClass *sec = SYS_BUS_EHCI_GET_CLASS(obj);
60 EHCIState *s = &i->ehci;
61
62 s->capsbase = sec->capsbase;
63 s->opregbase = sec->opregbase;
64 s->portscbase = sec->portscbase;
65 s->portnr = sec->portnr;
66 s->as = &address_space_memory;
67
68 usb_ehci_init(s, DEVICE(obj));
69 sysbus_init_mmio(d, &s->mem);
70}
71
72static void ehci_sysbus_class_init(ObjectClass *klass, void *data)
73{
74 DeviceClass *dc = DEVICE_CLASS(klass);
75 SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(klass);
76
77 sec->portscbase = 0x44;
78 sec->portnr = NB_PORTS;
79
80 dc->realize = usb_ehci_sysbus_realize;
81 dc->vmsd = &vmstate_ehci_sysbus;
82 dc->props = ehci_sysbus_properties;
83 dc->reset = usb_ehci_sysbus_reset;
84 set_bit(DEVICE_CATEGORY_USB, dc->categories);
85}
86
87static const TypeInfo ehci_type_info = {
88 .name = TYPE_SYS_BUS_EHCI,
89 .parent = TYPE_SYS_BUS_DEVICE,
90 .instance_size = sizeof(EHCISysBusState),
91 .instance_init = ehci_sysbus_init,
92 .abstract = true,
93 .class_init = ehci_sysbus_class_init,
94 .class_size = sizeof(SysBusEHCIClass),
95};
96
97static void ehci_platform_class_init(ObjectClass *oc, void *data)
98{
99 SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(oc);
100 DeviceClass *dc = DEVICE_CLASS(oc);
101
102 sec->capsbase = 0x0;
103 sec->opregbase = 0x20;
104 set_bit(DEVICE_CATEGORY_USB, dc->categories);
105}
106
107static const TypeInfo ehci_platform_type_info = {
108 .name = TYPE_PLATFORM_EHCI,
109 .parent = TYPE_SYS_BUS_EHCI,
110 .class_init = ehci_platform_class_init,
111};
112
113static void ehci_xlnx_class_init(ObjectClass *oc, void *data)
114{
115 SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(oc);
116 DeviceClass *dc = DEVICE_CLASS(oc);
117
118 set_bit(DEVICE_CATEGORY_USB, dc->categories);
119 sec->capsbase = 0x100;
120 sec->opregbase = 0x140;
121}
122
123static const TypeInfo ehci_xlnx_type_info = {
124 .name = "xlnx,ps7-usb",
125 .parent = TYPE_SYS_BUS_EHCI,
126 .class_init = ehci_xlnx_class_init,
127};
128
129static void ehci_exynos4210_class_init(ObjectClass *oc, void *data)
130{
131 SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(oc);
132 DeviceClass *dc = DEVICE_CLASS(oc);
133
134 sec->capsbase = 0x0;
135 sec->opregbase = 0x10;
136 set_bit(DEVICE_CATEGORY_USB, dc->categories);
137}
138
139static const TypeInfo ehci_exynos4210_type_info = {
140 .name = TYPE_EXYNOS4210_EHCI,
141 .parent = TYPE_SYS_BUS_EHCI,
142 .class_init = ehci_exynos4210_class_init,
143};
144
145static void ehci_tegra2_class_init(ObjectClass *oc, void *data)
146{
147 SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(oc);
148 DeviceClass *dc = DEVICE_CLASS(oc);
149
150 sec->capsbase = 0x100;
151 sec->opregbase = 0x140;
152 set_bit(DEVICE_CATEGORY_USB, dc->categories);
153}
154
155static const TypeInfo ehci_tegra2_type_info = {
156 .name = TYPE_TEGRA2_EHCI,
157 .parent = TYPE_SYS_BUS_EHCI,
158 .class_init = ehci_tegra2_class_init,
159};
160
161static void ehci_ppc4xx_init(Object *o)
162{
163 EHCISysBusState *s = SYS_BUS_EHCI(o);
164
165 s->ehci.companion_enable = true;
166}
167
168static void ehci_ppc4xx_class_init(ObjectClass *oc, void *data)
169{
170 SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(oc);
171 DeviceClass *dc = DEVICE_CLASS(oc);
172
173 sec->capsbase = 0x0;
174 sec->opregbase = 0x10;
175 set_bit(DEVICE_CATEGORY_USB, dc->categories);
176}
177
178static const TypeInfo ehci_ppc4xx_type_info = {
179 .name = TYPE_PPC4xx_EHCI,
180 .parent = TYPE_SYS_BUS_EHCI,
181 .class_init = ehci_ppc4xx_class_init,
182 .instance_init = ehci_ppc4xx_init,
183};
184
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190
191
192
193
194enum FUSBH200EHCIRegs {
195 FUSBH200_REG_EOF_ASTR = 0x34,
196 FUSBH200_REG_BMCSR = 0x40,
197};
198
199static uint64_t fusbh200_ehci_read(void *opaque, hwaddr addr, unsigned size)
200{
201 EHCIState *s = opaque;
202 hwaddr off = s->opregbase + s->portscbase + 4 * s->portnr + addr;
203
204 switch (off) {
205 case FUSBH200_REG_EOF_ASTR:
206 return 0x00000041;
207 case FUSBH200_REG_BMCSR:
208
209 return (2 << 9) | (1 << 8) | (1 << 3);
210 }
211
212 return 0;
213}
214
215static void fusbh200_ehci_write(void *opaque, hwaddr addr, uint64_t val,
216 unsigned size)
217{
218}
219
220static const MemoryRegionOps fusbh200_ehci_mmio_ops = {
221 .read = fusbh200_ehci_read,
222 .write = fusbh200_ehci_write,
223 .valid.min_access_size = 4,
224 .valid.max_access_size = 4,
225 .endianness = DEVICE_LITTLE_ENDIAN,
226};
227
228static void fusbh200_ehci_init(Object *obj)
229{
230 EHCISysBusState *i = SYS_BUS_EHCI(obj);
231 FUSBH200EHCIState *f = FUSBH200_EHCI(obj);
232 EHCIState *s = &i->ehci;
233
234 memory_region_init_io(&f->mem_vendor, OBJECT(f), &fusbh200_ehci_mmio_ops, s,
235 "fusbh200", 0x4c);
236 memory_region_add_subregion(&s->mem,
237 s->opregbase + s->portscbase + 4 * s->portnr,
238 &f->mem_vendor);
239}
240
241static void fusbh200_ehci_class_init(ObjectClass *oc, void *data)
242{
243 SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(oc);
244 DeviceClass *dc = DEVICE_CLASS(oc);
245
246 sec->capsbase = 0x0;
247 sec->opregbase = 0x10;
248 sec->portscbase = 0x20;
249 sec->portnr = 1;
250 set_bit(DEVICE_CATEGORY_USB, dc->categories);
251}
252
253static const TypeInfo ehci_fusbh200_type_info = {
254 .name = TYPE_FUSBH200_EHCI,
255 .parent = TYPE_SYS_BUS_EHCI,
256 .instance_size = sizeof(FUSBH200EHCIState),
257 .instance_init = fusbh200_ehci_init,
258 .class_init = fusbh200_ehci_class_init,
259};
260
261static void ehci_sysbus_register_types(void)
262{
263 type_register_static(&ehci_type_info);
264 type_register_static(&ehci_platform_type_info);
265 type_register_static(&ehci_xlnx_type_info);
266 type_register_static(&ehci_exynos4210_type_info);
267 type_register_static(&ehci_tegra2_type_info);
268 type_register_static(&ehci_ppc4xx_type_info);
269 type_register_static(&ehci_fusbh200_type_info);
270}
271
272type_init(ehci_sysbus_register_types)
273
