1#ifndef ALLWINNER_H_ 2 3#include "qemu-common.h" 4#include "qemu/error-report.h" 5#include "hw/char/serial.h" 6#include "hw/arm/arm.h" 7#include "hw/timer/allwinner-a10-pit.h" 8#include "hw/intc/allwinner-a10-pic.h" 9#include "hw/net/allwinner_emac.h" 10#include "hw/ide/pci.h" 11#include "hw/ide/ahci.h" 12 13#include "sysemu/sysemu.h" 14 15 16#define AW_A10_PIC_REG_BASE 0x01c20400 17#define AW_A10_PIT_REG_BASE 0x01c20c00 18#define AW_A10_UART0_REG_BASE 0x01c28000 19#define AW_A10_EMAC_BASE 0x01c0b000 20#define AW_A10_SATA_BASE 0x01c18000 21 22#define AW_A10_SDRAM_BASE 0x40000000 23 24#define TYPE_AW_A10 "allwinner-a10" 25#define AW_A10(obj) OBJECT_CHECK(AwA10State, (obj), TYPE_AW_A10) 26 27typedef struct AwA10State { 28 /*< private >*/ 29 DeviceState parent_obj; 30 /*< public >*/ 31 32 ARMCPU cpu; 33 qemu_irq irq[AW_A10_PIC_INT_NR]; 34 AwA10PITState timer; 35 AwA10PICState intc; 36 AwEmacState emac; 37 AllwinnerAHCIState sata; 38 MemoryRegion sram_a; 39} AwA10State; 40 41#define ALLWINNER_H_ 42#endif 43