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26#ifndef HW_SERIAL_H
27#define HW_SERIAL_H
28
29#include "hw/hw.h"
30#include "sysemu/sysemu.h"
31#include "chardev/char-fe.h"
32#include "exec/memory.h"
33#include "qemu/fifo8.h"
34#include "chardev/char.h"
35
36#define UART_FIFO_LENGTH 16
37
38typedef struct SerialState {
39 uint16_t divider;
40 uint8_t rbr;
41 uint8_t thr;
42 uint8_t tsr;
43 uint8_t ier;
44 uint8_t iir;
45 uint8_t lcr;
46 uint8_t mcr;
47 uint8_t lsr;
48 uint8_t msr;
49 uint8_t scr;
50 uint8_t fcr;
51 uint8_t fcr_vmstate;
52
53
54
55 int thr_ipending;
56 qemu_irq irq;
57 CharBackend chr;
58 int last_break_enable;
59 int it_shift;
60 int baudbase;
61 uint32_t tsr_retry;
62 guint watch_tag;
63 uint32_t wakeup;
64
65
66 uint64_t last_xmit_ts;
67 Fifo8 recv_fifo;
68 Fifo8 xmit_fifo;
69
70 uint8_t recv_fifo_itl;
71
72 QEMUTimer *fifo_timeout_timer;
73 int timeout_ipending;
74
75 uint64_t char_transmit_time;
76 int poll_msl;
77
78 QEMUTimer *modem_status_poll;
79 MemoryRegion io;
80} SerialState;
81
82extern const VMStateDescription vmstate_serial;
83extern const MemoryRegionOps serial_io_ops;
84
85void serial_realize_core(SerialState *s, Error **errp);
86void serial_exit_core(SerialState *s);
87void serial_set_frequency(SerialState *s, uint32_t frequency);
88
89
90SerialState *serial_init(int base, qemu_irq irq, int baudbase,
91 Chardev *chr, MemoryRegion *system_io);
92SerialState *serial_mm_init(MemoryRegion *address_space,
93 hwaddr base, int it_shift,
94 qemu_irq irq, int baudbase,
95 Chardev *chr, enum device_endian end);
96
97
98
99#define MAX_ISA_SERIAL_PORTS 4
100
101#define TYPE_ISA_SERIAL "isa-serial"
102void serial_hds_isa_init(ISABus *bus, int from, int to);
103
104#endif
105