1/* 2 * Copyright (C) 2014 - Linaro 3 * Author: Rob Herring <rob.herring@linaro.org> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, see <http://www.gnu.org/licenses/>. 17 */ 18#include "qemu/osdep.h" 19#include "cpu.h" 20#include "exec/helper-proto.h" 21#include "kvm-consts.h" 22#include "sysemu/sysemu.h" 23#include "internals.h" 24#include "arm-powerctl.h" 25 26bool arm_is_psci_call(ARMCPU *cpu, int excp_type) 27{ 28 /* Return true if the r0/x0 value indicates a PSCI call and 29 * the exception type matches the configured PSCI conduit. This is 30 * called before the SMC/HVC instruction is executed, to decide whether 31 * we should treat it as a PSCI call or with the architecturally 32 * defined behaviour for an SMC or HVC (which might be UNDEF or trap 33 * to EL2 or to EL3). 34 */ 35 CPUARMState *env = &cpu->env; 36 uint64_t param = is_a64(env) ? env->xregs[0] : env->regs[0]; 37 38 switch (excp_type) { 39 case EXCP_HVC: 40 if (cpu->psci_conduit != QEMU_PSCI_CONDUIT_HVC) { 41 return false; 42 } 43 break; 44 case EXCP_SMC: 45 if (cpu->psci_conduit != QEMU_PSCI_CONDUIT_SMC) { 46 return false; 47 } 48 break; 49 default: 50 return false; 51 } 52 53 switch (param) { 54 case QEMU_PSCI_0_2_FN_PSCI_VERSION: 55 case QEMU_PSCI_0_2_FN_MIGRATE_INFO_TYPE: 56 case QEMU_PSCI_0_2_FN_AFFINITY_INFO: 57 case QEMU_PSCI_0_2_FN64_AFFINITY_INFO: 58 case QEMU_PSCI_0_2_FN_SYSTEM_RESET: 59 case QEMU_PSCI_0_2_FN_SYSTEM_OFF: 60 case QEMU_PSCI_0_1_FN_CPU_ON: 61 case QEMU_PSCI_0_2_FN_CPU_ON: 62 case QEMU_PSCI_0_2_FN64_CPU_ON: 63 case QEMU_PSCI_0_1_FN_CPU_OFF: 64 case QEMU_PSCI_0_2_FN_CPU_OFF: 65 case QEMU_PSCI_0_1_FN_CPU_SUSPEND: 66 case QEMU_PSCI_0_2_FN_CPU_SUSPEND: 67 case QEMU_PSCI_0_2_FN64_CPU_SUSPEND: 68 case QEMU_PSCI_0_1_FN_MIGRATE: 69 case QEMU_PSCI_0_2_FN_MIGRATE: 70 return true; 71 default: 72 return false; 73 } 74} 75 76void arm_handle_psci_call(ARMCPU *cpu) 77{ 78 /* 79 * This function partially implements the logic for dispatching Power State 80 * Coordination Interface (PSCI) calls (as described in ARM DEN 0022B.b), 81 * to the extent required for bringing up and taking down secondary cores, 82 * and for handling reset and poweroff requests. 83 * Additional information about the calling convention used is available in 84 * the document 'SMC Calling Convention' (ARM DEN 0028) 85 */ 86 CPUARMState *env = &cpu->env; 87 uint64_t param[4]; 88 uint64_t context_id, mpidr; 89 target_ulong entry; 90 int32_t ret = 0; 91 int i; 92 93 for (i = 0; i < 4; i++) { 94 /* 95 * All PSCI functions take explicit 32-bit or native int sized 96 * arguments so we can simply zero-extend all arguments regardless 97 * of which exact function we are about to call. 98 */ 99 param[i] = is_a64(env) ? env->xregs[i] : env->regs[i]; 100 } 101 102 if ((param[0] & QEMU_PSCI_0_2_64BIT) && !is_a64(env)) { 103 ret = QEMU_PSCI_RET_INVALID_PARAMS; 104 goto err; 105 } 106 107 switch (param[0]) { 108 CPUState *target_cpu_state; 109 ARMCPU *target_cpu; 110 111 case QEMU_PSCI_0_2_FN_PSCI_VERSION: 112 ret = QEMU_PSCI_0_2_RET_VERSION_0_2; 113 break; 114 case QEMU_PSCI_0_2_FN_MIGRATE_INFO_TYPE: 115 ret = QEMU_PSCI_0_2_RET_TOS_MIGRATION_NOT_REQUIRED; /* No trusted OS */ 116 break; 117 case QEMU_PSCI_0_2_FN_AFFINITY_INFO: 118 case QEMU_PSCI_0_2_FN64_AFFINITY_INFO: 119 mpidr = param[1]; 120 121 switch (param[2]) { 122 case 0: 123 target_cpu_state = arm_get_cpu_by_id(mpidr); 124 if (!target_cpu_state) { 125 ret = QEMU_PSCI_RET_INVALID_PARAMS; 126 break; 127 } 128 target_cpu = ARM_CPU(target_cpu_state); 129 130 g_assert(qemu_mutex_iothread_locked()); 131 ret = target_cpu->power_state; 132 break; 133 default: 134 /* Everything above affinity level 0 is always on. */ 135 ret = 0; 136 } 137 break; 138 case QEMU_PSCI_0_2_FN_SYSTEM_RESET: 139 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); 140 /* QEMU reset and shutdown are async requests, but PSCI 141 * mandates that we never return from the reset/shutdown 142 * call, so power the CPU off now so it doesn't execute 143 * anything further. 144 */ 145 goto cpu_off; 146 case QEMU_PSCI_0_2_FN_SYSTEM_OFF: 147 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); 148 goto cpu_off; 149 case QEMU_PSCI_0_1_FN_CPU_ON: 150 case QEMU_PSCI_0_2_FN_CPU_ON: 151 case QEMU_PSCI_0_2_FN64_CPU_ON: 152 { 153 /* The PSCI spec mandates that newly brought up CPUs start 154 * in the highest exception level which exists and is enabled 155 * on the calling CPU. Since the QEMU PSCI implementation is 156 * acting as a "fake EL3" or "fake EL2" firmware, this for us 157 * means that we want to start at the highest NS exception level 158 * that we are providing to the guest. 159 * The execution mode should be that which is currently in use 160 * by the same exception level on the calling CPU. 161 * The CPU should be started with the context_id value 162 * in x0 (if AArch64) or r0 (if AArch32). 163 */ 164 int target_el = arm_feature(env, ARM_FEATURE_EL2) ? 2 : 1; 165 bool target_aarch64 = arm_el_is_aa64(env, target_el); 166 167 mpidr = param[1]; 168 entry = param[2]; 169 context_id = param[3]; 170 ret = arm_set_cpu_on(mpidr, entry, context_id, 171 target_el, target_aarch64); 172 break; 173 } 174 case QEMU_PSCI_0_1_FN_CPU_OFF: 175 case QEMU_PSCI_0_2_FN_CPU_OFF: 176 goto cpu_off; 177 case QEMU_PSCI_0_1_FN_CPU_SUSPEND: 178 case QEMU_PSCI_0_2_FN_CPU_SUSPEND: 179 case QEMU_PSCI_0_2_FN64_CPU_SUSPEND: 180 /* Affinity levels are not supported in QEMU */ 181 if (param[1] & 0xfffe0000) { 182 ret = QEMU_PSCI_RET_INVALID_PARAMS; 183 break; 184 } 185 /* Powerdown is not supported, we always go into WFI */ 186 if (is_a64(env)) { 187 env->xregs[0] = 0; 188 } else { 189 env->regs[0] = 0; 190 } 191 helper_wfi(env, 4); 192 break; 193 case QEMU_PSCI_0_1_FN_MIGRATE: 194 case QEMU_PSCI_0_2_FN_MIGRATE: 195 ret = QEMU_PSCI_RET_NOT_SUPPORTED; 196 break; 197 default: 198 g_assert_not_reached(); 199 } 200 201err: 202 if (is_a64(env)) { 203 env->xregs[0] = ret; 204 } else { 205 env->regs[0] = ret; 206 } 207 return; 208 209cpu_off: 210 ret = arm_set_cpu_off(cpu->mp_affinity); 211 /* notreached */ 212 /* sanity check in case something failed */ 213 assert(ret == QEMU_ARM_POWERCTL_RET_SUCCESS); 214} 215