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10#include "qemu/osdep.h"
11#include "qemu/units.h"
12#include "qapi/error.h"
13#include "qemu-common.h"
14#include "cpu.h"
15#include "hw/hw.h"
16#include "hw/mips/mips.h"
17#include "hw/mips/cpudevs.h"
18#include "hw/i386/pc.h"
19#include "hw/char/serial.h"
20#include "hw/isa/isa.h"
21#include "net/net.h"
22#include "hw/net/ne2000-isa.h"
23#include "sysemu/sysemu.h"
24#include "hw/boards.h"
25#include "hw/block/flash.h"
26#include "qemu/log.h"
27#include "hw/mips/bios.h"
28#include "hw/ide.h"
29#include "hw/loader.h"
30#include "elf.h"
31#include "hw/timer/mc146818rtc.h"
32#include "hw/input/i8042.h"
33#include "hw/timer/i8254.h"
34#include "exec/address-spaces.h"
35#include "sysemu/qtest.h"
36#include "qemu/error-report.h"
37
38#define MAX_IDE_BUS 2
39
40static const int ide_iobase[2] = { 0x1f0, 0x170 };
41static const int ide_iobase2[2] = { 0x3f6, 0x376 };
42static const int ide_irq[2] = { 14, 15 };
43
44static ISADevice *pit;
45
46
47
48static struct _loaderparams {
49 int ram_size;
50 const char *kernel_filename;
51 const char *kernel_cmdline;
52 const char *initrd_filename;
53} loaderparams;
54
55static void mips_qemu_write (void *opaque, hwaddr addr,
56 uint64_t val, unsigned size)
57{
58 if ((addr & 0xffff) == 0 && val == 42)
59 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
60 else if ((addr & 0xffff) == 4 && val == 42)
61 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
62}
63
64static uint64_t mips_qemu_read (void *opaque, hwaddr addr,
65 unsigned size)
66{
67 return 0;
68}
69
70static const MemoryRegionOps mips_qemu_ops = {
71 .read = mips_qemu_read,
72 .write = mips_qemu_write,
73 .endianness = DEVICE_NATIVE_ENDIAN,
74};
75
76typedef struct ResetData {
77 MIPSCPU *cpu;
78 uint64_t vector;
79} ResetData;
80
81static int64_t load_kernel(void)
82{
83 const size_t params_size = 264;
84 int64_t entry, kernel_high, initrd_size;
85 long kernel_size;
86 ram_addr_t initrd_offset;
87 uint32_t *params_buf;
88 int big_endian;
89
90#ifdef TARGET_WORDS_BIGENDIAN
91 big_endian = 1;
92#else
93 big_endian = 0;
94#endif
95 kernel_size = load_elf(loaderparams.kernel_filename, NULL,
96 cpu_mips_kseg0_to_phys, NULL,
97 (uint64_t *)&entry, NULL,
98 (uint64_t *)&kernel_high, big_endian,
99 EM_MIPS, 1, 0);
100 if (kernel_size >= 0) {
101 if ((entry & ~0x7fffffffULL) == 0x80000000)
102 entry = (int32_t)entry;
103 } else {
104 error_report("could not load kernel '%s': %s",
105 loaderparams.kernel_filename,
106 load_elf_strerror(kernel_size));
107 exit(1);
108 }
109
110
111 initrd_size = 0;
112 initrd_offset = 0;
113 if (loaderparams.initrd_filename) {
114 initrd_size = get_image_size (loaderparams.initrd_filename);
115 if (initrd_size > 0) {
116 initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
117 if (initrd_offset + initrd_size > ram_size) {
118 error_report("memory too small for initial ram disk '%s'",
119 loaderparams.initrd_filename);
120 exit(1);
121 }
122 initrd_size = load_image_targphys(loaderparams.initrd_filename,
123 initrd_offset,
124 ram_size - initrd_offset);
125 }
126 if (initrd_size == (target_ulong) -1) {
127 error_report("could not load initial ram disk '%s'",
128 loaderparams.initrd_filename);
129 exit(1);
130 }
131 }
132
133
134 params_buf = g_malloc(params_size);
135
136 params_buf[0] = tswap32(ram_size);
137 params_buf[1] = tswap32(0x12345678);
138
139 if (initrd_size > 0) {
140 snprintf((char *)params_buf + 8, 256, "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s",
141 cpu_mips_phys_to_kseg0(NULL, initrd_offset),
142 initrd_size, loaderparams.kernel_cmdline);
143 } else {
144 snprintf((char *)params_buf + 8, 256, "%s", loaderparams.kernel_cmdline);
145 }
146
147 rom_add_blob_fixed("params", params_buf, params_size,
148 16 * MiB - params_size);
149
150 g_free(params_buf);
151 return entry;
152}
153
154static void main_cpu_reset(void *opaque)
155{
156 ResetData *s = (ResetData *)opaque;
157 CPUMIPSState *env = &s->cpu->env;
158
159 cpu_reset(CPU(s->cpu));
160 env->active_tc.PC = s->vector;
161}
162
163static const int sector_len = 32 * KiB;
164static
165void mips_r4k_init(MachineState *machine)
166{
167 ram_addr_t ram_size = machine->ram_size;
168 const char *kernel_filename = machine->kernel_filename;
169 const char *kernel_cmdline = machine->kernel_cmdline;
170 const char *initrd_filename = machine->initrd_filename;
171 char *filename;
172 MemoryRegion *address_space_mem = get_system_memory();
173 MemoryRegion *ram = g_new(MemoryRegion, 1);
174 MemoryRegion *bios;
175 MemoryRegion *iomem = g_new(MemoryRegion, 1);
176 MemoryRegion *isa_io = g_new(MemoryRegion, 1);
177 MemoryRegion *isa_mem = g_new(MemoryRegion, 1);
178 int bios_size;
179 MIPSCPU *cpu;
180 CPUMIPSState *env;
181 ResetData *reset_info;
182 int i;
183 qemu_irq *i8259;
184 ISABus *isa_bus;
185 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
186 DriveInfo *dinfo;
187 int be;
188
189
190 cpu = MIPS_CPU(cpu_create(machine->cpu_type));
191 env = &cpu->env;
192
193 reset_info = g_malloc0(sizeof(ResetData));
194 reset_info->cpu = cpu;
195 reset_info->vector = env->active_tc.PC;
196 qemu_register_reset(main_cpu_reset, reset_info);
197
198
199 if (ram_size > 256 * MiB) {
200 error_report("Too much memory for this machine: %" PRId64 "MB,"
201 " maximum 256MB", ram_size / MiB);
202 exit(1);
203 }
204 memory_region_allocate_system_memory(ram, NULL, "mips_r4k.ram", ram_size);
205
206 memory_region_add_subregion(address_space_mem, 0, ram);
207
208 memory_region_init_io(iomem, NULL, &mips_qemu_ops, NULL, "mips-qemu", 0x10000);
209 memory_region_add_subregion(address_space_mem, 0x1fbf0000, iomem);
210
211
212
213
214
215 if (bios_name == NULL)
216 bios_name = BIOS_FILENAME;
217 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
218 if (filename) {
219 bios_size = get_image_size(filename);
220 } else {
221 bios_size = -1;
222 }
223#ifdef TARGET_WORDS_BIGENDIAN
224 be = 1;
225#else
226 be = 0;
227#endif
228 if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
229 bios = g_new(MemoryRegion, 1);
230 memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE,
231 &error_fatal);
232 memory_region_set_readonly(bios, true);
233 memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios);
234
235 load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
236 } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
237 uint32_t mips_rom = 0x00400000;
238 if (!pflash_cfi01_register(0x1fc00000, "mips_r4k.bios", mips_rom,
239 blk_by_legacy_dinfo(dinfo),
240 sector_len, 4, 0, 0, 0, 0, be)) {
241 fprintf(stderr, "qemu: Error registering flash memory.\n");
242 }
243 } else if (!qtest_enabled()) {
244
245 warn_report("could not load MIPS bios '%s'", bios_name);
246 }
247 g_free(filename);
248
249 if (kernel_filename) {
250 loaderparams.ram_size = ram_size;
251 loaderparams.kernel_filename = kernel_filename;
252 loaderparams.kernel_cmdline = kernel_cmdline;
253 loaderparams.initrd_filename = initrd_filename;
254 reset_info->vector = load_kernel();
255 }
256
257
258 cpu_mips_irq_init_cpu(cpu);
259 cpu_mips_clock_init(cpu);
260
261
262 memory_region_init_alias(isa_io, NULL, "isa-io",
263 get_system_io(), 0, 0x00010000);
264 memory_region_init(isa_mem, NULL, "isa-mem", 0x01000000);
265 memory_region_add_subregion(get_system_memory(), 0x14000000, isa_io);
266 memory_region_add_subregion(get_system_memory(), 0x10000000, isa_mem);
267 isa_bus = isa_bus_new(NULL, isa_mem, get_system_io(), &error_abort);
268
269
270 i8259 = i8259_init(isa_bus, env->irq[2]);
271 isa_bus_irqs(isa_bus, i8259);
272
273 mc146818_rtc_init(isa_bus, 2000, NULL);
274
275 pit = i8254_pit_init(isa_bus, 0x40, 0, NULL);
276
277 serial_hds_isa_init(isa_bus, 0, MAX_ISA_SERIAL_PORTS);
278
279 isa_vga_init(isa_bus);
280
281 if (nd_table[0].used)
282 isa_ne2000_init(isa_bus, 0x300, 9, &nd_table[0]);
283
284 ide_drive_get(hd, ARRAY_SIZE(hd));
285 for(i = 0; i < MAX_IDE_BUS; i++)
286 isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i],
287 hd[MAX_IDE_DEVS * i],
288 hd[MAX_IDE_DEVS * i + 1]);
289
290 isa_create_simple(isa_bus, TYPE_I8042);
291}
292
293static void mips_machine_init(MachineClass *mc)
294{
295 mc->desc = "mips r4k platform";
296 mc->init = mips_r4k_init;
297 mc->block_default_type = IF_IDE;
298#ifdef TARGET_MIPS64
299 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("R4000");
300#else
301 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
302#endif
303
304}
305
306DEFINE_MACHINE("mips", mips_machine_init)
307
