1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18#include "qemu/osdep.h"
19#include "qemu/log.h"
20#include "qemu/module.h"
21#include "qapi/error.h"
22#include "trace.h"
23#include "hw/sysbus.h"
24#include "hw/registerfields.h"
25#include "hw/misc/mps2-fpgaio.h"
26#include "qemu/timer.h"
27
28REG32(LED0, 0)
29REG32(BUTTON, 8)
30REG32(CLK1HZ, 0x10)
31REG32(CLK100HZ, 0x14)
32REG32(COUNTER, 0x18)
33REG32(PRESCALE, 0x1c)
34REG32(PSCNTR, 0x20)
35REG32(MISC, 0x4c)
36
37static uint32_t counter_from_tickoff(int64_t now, int64_t tick_offset, int frq)
38{
39 return muldiv64(now - tick_offset, frq, NANOSECONDS_PER_SECOND);
40}
41
42static int64_t tickoff_from_counter(int64_t now, uint32_t count, int frq)
43{
44 return now - muldiv64(count, NANOSECONDS_PER_SECOND, frq);
45}
46
47static void resync_counter(MPS2FPGAIO *s)
48{
49
50
51
52
53
54 int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
55 int64_t elapsed = now - s->pscntr_sync_ticks;
56
57
58
59
60
61 uint64_t ticks = muldiv64(elapsed, s->prescale_clk, NANOSECONDS_PER_SECOND);
62
63
64
65
66
67
68 if (ticks == 0) {
69
70 return;
71 } else if (ticks < s->pscntr) {
72
73 s->pscntr -= ticks;
74 } else {
75 if (s->prescale == 0) {
76
77
78
79
80
81 s->counter += ticks - s->pscntr;
82 s->pscntr = 0;
83 } else {
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103 uint64_t y = ticks - s->pscntr + s->prescale;
104 s->pscntr = s->prescale - (y % (s->prescale + 1));
105 s->counter += y / (s->prescale + 1);
106 }
107 }
108
109
110
111
112
113
114 s->pscntr_sync_ticks += muldiv64(ticks, NANOSECONDS_PER_SECOND,
115 s->prescale_clk);
116}
117
118static uint64_t mps2_fpgaio_read(void *opaque, hwaddr offset, unsigned size)
119{
120 MPS2FPGAIO *s = MPS2_FPGAIO(opaque);
121 uint64_t r;
122 int64_t now;
123
124 switch (offset) {
125 case A_LED0:
126 r = s->led0;
127 break;
128 case A_BUTTON:
129
130
131
132 r = 0;
133 break;
134 case A_PRESCALE:
135 r = s->prescale;
136 break;
137 case A_MISC:
138 r = s->misc;
139 break;
140 case A_CLK1HZ:
141 now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
142 r = counter_from_tickoff(now, s->clk1hz_tick_offset, 1);
143 break;
144 case A_CLK100HZ:
145 now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
146 r = counter_from_tickoff(now, s->clk100hz_tick_offset, 100);
147 break;
148 case A_COUNTER:
149 resync_counter(s);
150 r = s->counter;
151 break;
152 case A_PSCNTR:
153 resync_counter(s);
154 r = s->pscntr;
155 break;
156 default:
157 qemu_log_mask(LOG_GUEST_ERROR,
158 "MPS2 FPGAIO read: bad offset %x\n", (int) offset);
159 r = 0;
160 break;
161 }
162
163 trace_mps2_fpgaio_read(offset, r, size);
164 return r;
165}
166
167static void mps2_fpgaio_write(void *opaque, hwaddr offset, uint64_t value,
168 unsigned size)
169{
170 MPS2FPGAIO *s = MPS2_FPGAIO(opaque);
171 int64_t now;
172
173 trace_mps2_fpgaio_write(offset, value, size);
174
175 switch (offset) {
176 case A_LED0:
177
178
179
180 trace_mps2_fpgaio_leds(value & 0x02 ? '*' : '.',
181 value & 0x01 ? '*' : '.');
182 s->led0 = value & 0x3;
183 break;
184 case A_PRESCALE:
185 resync_counter(s);
186 s->prescale = value;
187 break;
188 case A_MISC:
189
190
191
192
193 qemu_log_mask(LOG_UNIMP,
194 "MPS2 FPGAIO: MISC control bits unimplemented\n");
195 s->misc = value;
196 break;
197 case A_CLK1HZ:
198 now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
199 s->clk1hz_tick_offset = tickoff_from_counter(now, value, 1);
200 break;
201 case A_CLK100HZ:
202 now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
203 s->clk100hz_tick_offset = tickoff_from_counter(now, value, 100);
204 break;
205 case A_COUNTER:
206 resync_counter(s);
207 s->counter = value;
208 break;
209 case A_PSCNTR:
210 resync_counter(s);
211 s->pscntr = value;
212 break;
213 default:
214 qemu_log_mask(LOG_GUEST_ERROR,
215 "MPS2 FPGAIO write: bad offset 0x%x\n", (int) offset);
216 break;
217 }
218}
219
220static const MemoryRegionOps mps2_fpgaio_ops = {
221 .read = mps2_fpgaio_read,
222 .write = mps2_fpgaio_write,
223 .endianness = DEVICE_LITTLE_ENDIAN,
224};
225
226static void mps2_fpgaio_reset(DeviceState *dev)
227{
228 MPS2FPGAIO *s = MPS2_FPGAIO(dev);
229 int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
230
231 trace_mps2_fpgaio_reset();
232 s->led0 = 0;
233 s->prescale = 0;
234 s->misc = 0;
235 s->clk1hz_tick_offset = tickoff_from_counter(now, 0, 1);
236 s->clk100hz_tick_offset = tickoff_from_counter(now, 0, 100);
237 s->counter = 0;
238 s->pscntr = 0;
239 s->pscntr_sync_ticks = now;
240}
241
242static void mps2_fpgaio_init(Object *obj)
243{
244 SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
245 MPS2FPGAIO *s = MPS2_FPGAIO(obj);
246
247 memory_region_init_io(&s->iomem, obj, &mps2_fpgaio_ops, s,
248 "mps2-fpgaio", 0x1000);
249 sysbus_init_mmio(sbd, &s->iomem);
250}
251
252static bool mps2_fpgaio_counters_needed(void *opaque)
253{
254
255 return true;
256}
257
258static const VMStateDescription mps2_fpgaio_counters_vmstate = {
259 .name = "mps2-fpgaio/counters",
260 .version_id = 2,
261 .minimum_version_id = 2,
262 .needed = mps2_fpgaio_counters_needed,
263 .fields = (VMStateField[]) {
264 VMSTATE_INT64(clk1hz_tick_offset, MPS2FPGAIO),
265 VMSTATE_INT64(clk100hz_tick_offset, MPS2FPGAIO),
266 VMSTATE_UINT32(counter, MPS2FPGAIO),
267 VMSTATE_UINT32(pscntr, MPS2FPGAIO),
268 VMSTATE_INT64(pscntr_sync_ticks, MPS2FPGAIO),
269 VMSTATE_END_OF_LIST()
270 }
271};
272
273static const VMStateDescription mps2_fpgaio_vmstate = {
274 .name = "mps2-fpgaio",
275 .version_id = 1,
276 .minimum_version_id = 1,
277 .fields = (VMStateField[]) {
278 VMSTATE_UINT32(led0, MPS2FPGAIO),
279 VMSTATE_UINT32(prescale, MPS2FPGAIO),
280 VMSTATE_UINT32(misc, MPS2FPGAIO),
281 VMSTATE_END_OF_LIST()
282 },
283 .subsections = (const VMStateDescription*[]) {
284 &mps2_fpgaio_counters_vmstate,
285 NULL
286 }
287};
288
289static Property mps2_fpgaio_properties[] = {
290
291 DEFINE_PROP_UINT32("prescale-clk", MPS2FPGAIO, prescale_clk, 20000000),
292 DEFINE_PROP_END_OF_LIST(),
293};
294
295static void mps2_fpgaio_class_init(ObjectClass *klass, void *data)
296{
297 DeviceClass *dc = DEVICE_CLASS(klass);
298
299 dc->vmsd = &mps2_fpgaio_vmstate;
300 dc->reset = mps2_fpgaio_reset;
301 dc->props = mps2_fpgaio_properties;
302}
303
304static const TypeInfo mps2_fpgaio_info = {
305 .name = TYPE_MPS2_FPGAIO,
306 .parent = TYPE_SYS_BUS_DEVICE,
307 .instance_size = sizeof(MPS2FPGAIO),
308 .instance_init = mps2_fpgaio_init,
309 .class_init = mps2_fpgaio_class_init,
310};
311
312static void mps2_fpgaio_register_types(void)
313{
314 type_register_static(&mps2_fpgaio_info);
315}
316
317type_init(mps2_fpgaio_register_types);
318