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27#ifndef HW_TIMER_XLNX_ZYNQMP_RTC_H
28#define HW_TIMER_XLNX_ZYNQMP_RTC_H
29
30#include "hw/register.h"
31
32#define TYPE_XLNX_ZYNQMP_RTC "xlnx-zynmp.rtc"
33
34#define XLNX_ZYNQMP_RTC(obj) \
35 OBJECT_CHECK(XlnxZynqMPRTC, (obj), TYPE_XLNX_ZYNQMP_RTC)
36
37REG32(SET_TIME_WRITE, 0x0)
38REG32(SET_TIME_READ, 0x4)
39REG32(CALIB_WRITE, 0x8)
40 FIELD(CALIB_WRITE, FRACTION_EN, 20, 1)
41 FIELD(CALIB_WRITE, FRACTION_DATA, 16, 4)
42 FIELD(CALIB_WRITE, MAX_TICK, 0, 16)
43REG32(CALIB_READ, 0xc)
44 FIELD(CALIB_READ, FRACTION_EN, 20, 1)
45 FIELD(CALIB_READ, FRACTION_DATA, 16, 4)
46 FIELD(CALIB_READ, MAX_TICK, 0, 16)
47REG32(CURRENT_TIME, 0x10)
48REG32(CURRENT_TICK, 0x14)
49 FIELD(CURRENT_TICK, VALUE, 0, 16)
50REG32(ALARM, 0x18)
51REG32(RTC_INT_STATUS, 0x20)
52 FIELD(RTC_INT_STATUS, ALARM, 1, 1)
53 FIELD(RTC_INT_STATUS, SECONDS, 0, 1)
54REG32(RTC_INT_MASK, 0x24)
55 FIELD(RTC_INT_MASK, ALARM, 1, 1)
56 FIELD(RTC_INT_MASK, SECONDS, 0, 1)
57REG32(RTC_INT_EN, 0x28)
58 FIELD(RTC_INT_EN, ALARM, 1, 1)
59 FIELD(RTC_INT_EN, SECONDS, 0, 1)
60REG32(RTC_INT_DIS, 0x2c)
61 FIELD(RTC_INT_DIS, ALARM, 1, 1)
62 FIELD(RTC_INT_DIS, SECONDS, 0, 1)
63REG32(ADDR_ERROR, 0x30)
64 FIELD(ADDR_ERROR, STATUS, 0, 1)
65REG32(ADDR_ERROR_INT_MASK, 0x34)
66 FIELD(ADDR_ERROR_INT_MASK, MASK, 0, 1)
67REG32(ADDR_ERROR_INT_EN, 0x38)
68 FIELD(ADDR_ERROR_INT_EN, MASK, 0, 1)
69REG32(ADDR_ERROR_INT_DIS, 0x3c)
70 FIELD(ADDR_ERROR_INT_DIS, MASK, 0, 1)
71REG32(CONTROL, 0x40)
72 FIELD(CONTROL, BATTERY_DISABLE, 31, 1)
73 FIELD(CONTROL, OSC_CNTRL, 24, 4)
74 FIELD(CONTROL, SLVERR_ENABLE, 0, 1)
75REG32(SAFETY_CHK, 0x50)
76
77#define XLNX_ZYNQMP_RTC_R_MAX (R_SAFETY_CHK + 1)
78
79typedef struct XlnxZynqMPRTC {
80 SysBusDevice parent_obj;
81 MemoryRegion iomem;
82 qemu_irq irq_rtc_int;
83 qemu_irq irq_addr_error_int;
84
85 uint32_t tick_offset;
86
87 uint32_t regs[XLNX_ZYNQMP_RTC_R_MAX];
88 RegisterInfo regs_info[XLNX_ZYNQMP_RTC_R_MAX];
89} XlnxZynqMPRTC;
90
91#endif
92