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20#include "qemu/osdep.h"
21#include "cpu.h"
22#include "exec/exec-all.h"
23#include "exec/helper-proto.h"
24#include "exec/cpu_ldst.h"
25#include "sysemu/sysemu.h"
26#include "qemu/timer.h"
27#include "fpu/softfloat.h"
28#include "trace.h"
29
30void QEMU_NORETURN HELPER(excp)(CPUHPPAState *env, int excp)
31{
32 CPUState *cs = env_cpu(env);
33
34 cs->exception_index = excp;
35 cpu_loop_exit(cs);
36}
37
38void QEMU_NORETURN hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra)
39{
40 CPUState *cs = env_cpu(env);
41
42 cs->exception_index = excp;
43 cpu_loop_exit_restore(cs, ra);
44}
45
46void HELPER(tsv)(CPUHPPAState *env, target_ureg cond)
47{
48 if (unlikely((target_sreg)cond < 0)) {
49 hppa_dynamic_excp(env, EXCP_OVERFLOW, GETPC());
50 }
51}
52
53void HELPER(tcond)(CPUHPPAState *env, target_ureg cond)
54{
55 if (unlikely(cond)) {
56 hppa_dynamic_excp(env, EXCP_COND, GETPC());
57 }
58}
59
60static void atomic_store_3(CPUHPPAState *env, target_ulong addr, uint32_t val,
61 uint32_t mask, uintptr_t ra)
62{
63#ifdef CONFIG_USER_ONLY
64 uint32_t old, new, cmp;
65
66 uint32_t *haddr = g2h(addr - 1);
67 old = *haddr;
68 while (1) {
69 new = (old & ~mask) | (val & mask);
70 cmp = atomic_cmpxchg(haddr, old, new);
71 if (cmp == old) {
72 return;
73 }
74 old = cmp;
75 }
76#else
77
78 cpu_loop_exit_atomic(env_cpu(env), ra);
79#endif
80}
81
82static void do_stby_b(CPUHPPAState *env, target_ulong addr, target_ureg val,
83 bool parallel, uintptr_t ra)
84{
85 switch (addr & 3) {
86 case 3:
87 cpu_stb_data_ra(env, addr, val, ra);
88 break;
89 case 2:
90 cpu_stw_data_ra(env, addr, val, ra);
91 break;
92 case 1:
93
94 if (parallel) {
95 atomic_store_3(env, addr, val, 0x00ffffffu, ra);
96 } else {
97 cpu_stb_data_ra(env, addr, val >> 16, ra);
98 cpu_stw_data_ra(env, addr + 1, val, ra);
99 }
100 break;
101 default:
102 cpu_stl_data_ra(env, addr, val, ra);
103 break;
104 }
105}
106
107void HELPER(stby_b)(CPUHPPAState *env, target_ulong addr, target_ureg val)
108{
109 do_stby_b(env, addr, val, false, GETPC());
110}
111
112void HELPER(stby_b_parallel)(CPUHPPAState *env, target_ulong addr,
113 target_ureg val)
114{
115 do_stby_b(env, addr, val, true, GETPC());
116}
117
118static void do_stby_e(CPUHPPAState *env, target_ulong addr, target_ureg val,
119 bool parallel, uintptr_t ra)
120{
121 switch (addr & 3) {
122 case 3:
123
124 if (parallel) {
125 atomic_store_3(env, addr - 3, val, 0xffffff00u, ra);
126 } else {
127 cpu_stw_data_ra(env, addr - 3, val >> 16, ra);
128 cpu_stb_data_ra(env, addr - 1, val >> 8, ra);
129 }
130 break;
131 case 2:
132 cpu_stw_data_ra(env, addr - 2, val >> 16, ra);
133 break;
134 case 1:
135 cpu_stb_data_ra(env, addr - 1, val >> 24, ra);
136 break;
137 default:
138
139
140#ifndef CONFIG_USER_ONLY
141 probe_write(env, addr, 0, cpu_mmu_index(env, 0), ra);
142#endif
143 break;
144 }
145}
146
147void HELPER(stby_e)(CPUHPPAState *env, target_ulong addr, target_ureg val)
148{
149 do_stby_e(env, addr, val, false, GETPC());
150}
151
152void HELPER(stby_e_parallel)(CPUHPPAState *env, target_ulong addr,
153 target_ureg val)
154{
155 do_stby_e(env, addr, val, true, GETPC());
156}
157
158target_ureg HELPER(probe)(CPUHPPAState *env, target_ulong addr,
159 uint32_t level, uint32_t want)
160{
161#ifdef CONFIG_USER_ONLY
162 return page_check_range(addr, 1, want);
163#else
164 int prot, excp;
165 hwaddr phys;
166
167 trace_hppa_tlb_probe(addr, level, want);
168
169 if (level < (env->iaoq_f & 3)) {
170 return 0;
171 }
172
173 excp = hppa_get_physical_address(env, addr, level, 0, &phys, &prot);
174 if (excp >= 0) {
175 if (env->psw & PSW_Q) {
176
177 env->cr[CR_IOR] = addr;
178 env->cr[CR_ISR] = addr >> 32;
179 }
180 if (excp == EXCP_DTLB_MISS) {
181 excp = EXCP_NA_DTLB_MISS;
182 }
183 hppa_dynamic_excp(env, excp, GETPC());
184 }
185 return (want & prot) != 0;
186#endif
187}
188
189void HELPER(loaded_fr0)(CPUHPPAState *env)
190{
191 uint32_t shadow = env->fr[0] >> 32;
192 int rm, d;
193
194 env->fr0_shadow = shadow;
195
196 switch (extract32(shadow, 9, 2)) {
197 default:
198 rm = float_round_nearest_even;
199 break;
200 case 1:
201 rm = float_round_to_zero;
202 break;
203 case 2:
204 rm = float_round_up;
205 break;
206 case 3:
207 rm = float_round_down;
208 break;
209 }
210 set_float_rounding_mode(rm, &env->fp_status);
211
212 d = extract32(shadow, 5, 1);
213 set_flush_to_zero(d, &env->fp_status);
214 set_flush_inputs_to_zero(d, &env->fp_status);
215}
216
217void cpu_hppa_loaded_fr0(CPUHPPAState *env)
218{
219 helper_loaded_fr0(env);
220}
221
222#define CONVERT_BIT(X, SRC, DST) \
223 ((SRC) > (DST) \
224 ? (X) / ((SRC) / (DST)) & (DST) \
225 : ((X) & (SRC)) * ((DST) / (SRC)))
226
227static void update_fr0_op(CPUHPPAState *env, uintptr_t ra)
228{
229 uint32_t soft_exp = get_float_exception_flags(&env->fp_status);
230 uint32_t hard_exp = 0;
231 uint32_t shadow = env->fr0_shadow;
232
233 if (likely(soft_exp == 0)) {
234 env->fr[0] = (uint64_t)shadow << 32;
235 return;
236 }
237 set_float_exception_flags(0, &env->fp_status);
238
239 hard_exp |= CONVERT_BIT(soft_exp, float_flag_inexact, 1u << 0);
240 hard_exp |= CONVERT_BIT(soft_exp, float_flag_underflow, 1u << 1);
241 hard_exp |= CONVERT_BIT(soft_exp, float_flag_overflow, 1u << 2);
242 hard_exp |= CONVERT_BIT(soft_exp, float_flag_divbyzero, 1u << 3);
243 hard_exp |= CONVERT_BIT(soft_exp, float_flag_invalid, 1u << 4);
244 shadow |= hard_exp << (32 - 5);
245 env->fr0_shadow = shadow;
246 env->fr[0] = (uint64_t)shadow << 32;
247
248 if (hard_exp & shadow) {
249 hppa_dynamic_excp(env, EXCP_ASSIST, ra);
250 }
251}
252
253float32 HELPER(fsqrt_s)(CPUHPPAState *env, float32 arg)
254{
255 float32 ret = float32_sqrt(arg, &env->fp_status);
256 update_fr0_op(env, GETPC());
257 return ret;
258}
259
260float32 HELPER(frnd_s)(CPUHPPAState *env, float32 arg)
261{
262 float32 ret = float32_round_to_int(arg, &env->fp_status);
263 update_fr0_op(env, GETPC());
264 return ret;
265}
266
267float32 HELPER(fadd_s)(CPUHPPAState *env, float32 a, float32 b)
268{
269 float32 ret = float32_add(a, b, &env->fp_status);
270 update_fr0_op(env, GETPC());
271 return ret;
272}
273
274float32 HELPER(fsub_s)(CPUHPPAState *env, float32 a, float32 b)
275{
276 float32 ret = float32_sub(a, b, &env->fp_status);
277 update_fr0_op(env, GETPC());
278 return ret;
279}
280
281float32 HELPER(fmpy_s)(CPUHPPAState *env, float32 a, float32 b)
282{
283 float32 ret = float32_mul(a, b, &env->fp_status);
284 update_fr0_op(env, GETPC());
285 return ret;
286}
287
288float32 HELPER(fdiv_s)(CPUHPPAState *env, float32 a, float32 b)
289{
290 float32 ret = float32_div(a, b, &env->fp_status);
291 update_fr0_op(env, GETPC());
292 return ret;
293}
294
295float64 HELPER(fsqrt_d)(CPUHPPAState *env, float64 arg)
296{
297 float64 ret = float64_sqrt(arg, &env->fp_status);
298 update_fr0_op(env, GETPC());
299 return ret;
300}
301
302float64 HELPER(frnd_d)(CPUHPPAState *env, float64 arg)
303{
304 float64 ret = float64_round_to_int(arg, &env->fp_status);
305 update_fr0_op(env, GETPC());
306 return ret;
307}
308
309float64 HELPER(fadd_d)(CPUHPPAState *env, float64 a, float64 b)
310{
311 float64 ret = float64_add(a, b, &env->fp_status);
312 update_fr0_op(env, GETPC());
313 return ret;
314}
315
316float64 HELPER(fsub_d)(CPUHPPAState *env, float64 a, float64 b)
317{
318 float64 ret = float64_sub(a, b, &env->fp_status);
319 update_fr0_op(env, GETPC());
320 return ret;
321}
322
323float64 HELPER(fmpy_d)(CPUHPPAState *env, float64 a, float64 b)
324{
325 float64 ret = float64_mul(a, b, &env->fp_status);
326 update_fr0_op(env, GETPC());
327 return ret;
328}
329
330float64 HELPER(fdiv_d)(CPUHPPAState *env, float64 a, float64 b)
331{
332 float64 ret = float64_div(a, b, &env->fp_status);
333 update_fr0_op(env, GETPC());
334 return ret;
335}
336
337float64 HELPER(fcnv_s_d)(CPUHPPAState *env, float32 arg)
338{
339 float64 ret = float32_to_float64(arg, &env->fp_status);
340 update_fr0_op(env, GETPC());
341 return ret;
342}
343
344float32 HELPER(fcnv_d_s)(CPUHPPAState *env, float64 arg)
345{
346 float32 ret = float64_to_float32(arg, &env->fp_status);
347 update_fr0_op(env, GETPC());
348 return ret;
349}
350
351float32 HELPER(fcnv_w_s)(CPUHPPAState *env, int32_t arg)
352{
353 float32 ret = int32_to_float32(arg, &env->fp_status);
354 update_fr0_op(env, GETPC());
355 return ret;
356}
357
358float32 HELPER(fcnv_dw_s)(CPUHPPAState *env, int64_t arg)
359{
360 float32 ret = int64_to_float32(arg, &env->fp_status);
361 update_fr0_op(env, GETPC());
362 return ret;
363}
364
365float64 HELPER(fcnv_w_d)(CPUHPPAState *env, int32_t arg)
366{
367 float64 ret = int32_to_float64(arg, &env->fp_status);
368 update_fr0_op(env, GETPC());
369 return ret;
370}
371
372float64 HELPER(fcnv_dw_d)(CPUHPPAState *env, int64_t arg)
373{
374 float64 ret = int64_to_float64(arg, &env->fp_status);
375 update_fr0_op(env, GETPC());
376 return ret;
377}
378
379int32_t HELPER(fcnv_s_w)(CPUHPPAState *env, float32 arg)
380{
381 int32_t ret = float32_to_int32(arg, &env->fp_status);
382 update_fr0_op(env, GETPC());
383 return ret;
384}
385
386int32_t HELPER(fcnv_d_w)(CPUHPPAState *env, float64 arg)
387{
388 int32_t ret = float64_to_int32(arg, &env->fp_status);
389 update_fr0_op(env, GETPC());
390 return ret;
391}
392
393int64_t HELPER(fcnv_s_dw)(CPUHPPAState *env, float32 arg)
394{
395 int64_t ret = float32_to_int64(arg, &env->fp_status);
396 update_fr0_op(env, GETPC());
397 return ret;
398}
399
400int64_t HELPER(fcnv_d_dw)(CPUHPPAState *env, float64 arg)
401{
402 int64_t ret = float64_to_int64(arg, &env->fp_status);
403 update_fr0_op(env, GETPC());
404 return ret;
405}
406
407int32_t HELPER(fcnv_t_s_w)(CPUHPPAState *env, float32 arg)
408{
409 int32_t ret = float32_to_int32_round_to_zero(arg, &env->fp_status);
410 update_fr0_op(env, GETPC());
411 return ret;
412}
413
414int32_t HELPER(fcnv_t_d_w)(CPUHPPAState *env, float64 arg)
415{
416 int32_t ret = float64_to_int32_round_to_zero(arg, &env->fp_status);
417 update_fr0_op(env, GETPC());
418 return ret;
419}
420
421int64_t HELPER(fcnv_t_s_dw)(CPUHPPAState *env, float32 arg)
422{
423 int64_t ret = float32_to_int64_round_to_zero(arg, &env->fp_status);
424 update_fr0_op(env, GETPC());
425 return ret;
426}
427
428int64_t HELPER(fcnv_t_d_dw)(CPUHPPAState *env, float64 arg)
429{
430 int64_t ret = float64_to_int64_round_to_zero(arg, &env->fp_status);
431 update_fr0_op(env, GETPC());
432 return ret;
433}
434
435float32 HELPER(fcnv_uw_s)(CPUHPPAState *env, uint32_t arg)
436{
437 float32 ret = uint32_to_float32(arg, &env->fp_status);
438 update_fr0_op(env, GETPC());
439 return ret;
440}
441
442float32 HELPER(fcnv_udw_s)(CPUHPPAState *env, uint64_t arg)
443{
444 float32 ret = uint64_to_float32(arg, &env->fp_status);
445 update_fr0_op(env, GETPC());
446 return ret;
447}
448
449float64 HELPER(fcnv_uw_d)(CPUHPPAState *env, uint32_t arg)
450{
451 float64 ret = uint32_to_float64(arg, &env->fp_status);
452 update_fr0_op(env, GETPC());
453 return ret;
454}
455
456float64 HELPER(fcnv_udw_d)(CPUHPPAState *env, uint64_t arg)
457{
458 float64 ret = uint64_to_float64(arg, &env->fp_status);
459 update_fr0_op(env, GETPC());
460 return ret;
461}
462
463uint32_t HELPER(fcnv_s_uw)(CPUHPPAState *env, float32 arg)
464{
465 uint32_t ret = float32_to_uint32(arg, &env->fp_status);
466 update_fr0_op(env, GETPC());
467 return ret;
468}
469
470uint32_t HELPER(fcnv_d_uw)(CPUHPPAState *env, float64 arg)
471{
472 uint32_t ret = float64_to_uint32(arg, &env->fp_status);
473 update_fr0_op(env, GETPC());
474 return ret;
475}
476
477uint64_t HELPER(fcnv_s_udw)(CPUHPPAState *env, float32 arg)
478{
479 uint64_t ret = float32_to_uint64(arg, &env->fp_status);
480 update_fr0_op(env, GETPC());
481 return ret;
482}
483
484uint64_t HELPER(fcnv_d_udw)(CPUHPPAState *env, float64 arg)
485{
486 uint64_t ret = float64_to_uint64(arg, &env->fp_status);
487 update_fr0_op(env, GETPC());
488 return ret;
489}
490
491uint32_t HELPER(fcnv_t_s_uw)(CPUHPPAState *env, float32 arg)
492{
493 uint32_t ret = float32_to_uint32_round_to_zero(arg, &env->fp_status);
494 update_fr0_op(env, GETPC());
495 return ret;
496}
497
498uint32_t HELPER(fcnv_t_d_uw)(CPUHPPAState *env, float64 arg)
499{
500 uint32_t ret = float64_to_uint32_round_to_zero(arg, &env->fp_status);
501 update_fr0_op(env, GETPC());
502 return ret;
503}
504
505uint64_t HELPER(fcnv_t_s_udw)(CPUHPPAState *env, float32 arg)
506{
507 uint64_t ret = float32_to_uint64_round_to_zero(arg, &env->fp_status);
508 update_fr0_op(env, GETPC());
509 return ret;
510}
511
512uint64_t HELPER(fcnv_t_d_udw)(CPUHPPAState *env, float64 arg)
513{
514 uint64_t ret = float64_to_uint64_round_to_zero(arg, &env->fp_status);
515 update_fr0_op(env, GETPC());
516 return ret;
517}
518
519static void update_fr0_cmp(CPUHPPAState *env, uint32_t y, uint32_t c, int r)
520{
521 uint32_t shadow = env->fr0_shadow;
522
523 switch (r) {
524 case float_relation_greater:
525 c = extract32(c, 4, 1);
526 break;
527 case float_relation_less:
528 c = extract32(c, 3, 1);
529 break;
530 case float_relation_equal:
531 c = extract32(c, 2, 1);
532 break;
533 case float_relation_unordered:
534 c = extract32(c, 1, 1);
535 break;
536 default:
537 g_assert_not_reached();
538 }
539
540 if (y) {
541
542
543 shadow = deposit32(shadow, 21 - (y - 1), 1, c);
544 } else {
545
546
547 shadow = deposit32(shadow, 11, 10, extract32(shadow, 12, 10));
548
549 shadow = deposit32(shadow, 21, 1, extract32(shadow, 26, 1));
550
551 shadow = deposit32(shadow, 26, 1, c);
552 }
553
554 env->fr0_shadow = shadow;
555 env->fr[0] = (uint64_t)shadow << 32;
556}
557
558void HELPER(fcmp_s)(CPUHPPAState *env, float32 a, float32 b,
559 uint32_t y, uint32_t c)
560{
561 int r;
562 if (c & 1) {
563 r = float32_compare(a, b, &env->fp_status);
564 } else {
565 r = float32_compare_quiet(a, b, &env->fp_status);
566 }
567 update_fr0_op(env, GETPC());
568 update_fr0_cmp(env, y, c, r);
569}
570
571void HELPER(fcmp_d)(CPUHPPAState *env, float64 a, float64 b,
572 uint32_t y, uint32_t c)
573{
574 int r;
575 if (c & 1) {
576 r = float64_compare(a, b, &env->fp_status);
577 } else {
578 r = float64_compare_quiet(a, b, &env->fp_status);
579 }
580 update_fr0_op(env, GETPC());
581 update_fr0_cmp(env, y, c, r);
582}
583
584float32 HELPER(fmpyfadd_s)(CPUHPPAState *env, float32 a, float32 b, float32 c)
585{
586 float32 ret = float32_muladd(a, b, c, 0, &env->fp_status);
587 update_fr0_op(env, GETPC());
588 return ret;
589}
590
591float32 HELPER(fmpynfadd_s)(CPUHPPAState *env, float32 a, float32 b, float32 c)
592{
593 float32 ret = float32_muladd(a, b, c, float_muladd_negate_product,
594 &env->fp_status);
595 update_fr0_op(env, GETPC());
596 return ret;
597}
598
599float64 HELPER(fmpyfadd_d)(CPUHPPAState *env, float64 a, float64 b, float64 c)
600{
601 float64 ret = float64_muladd(a, b, c, 0, &env->fp_status);
602 update_fr0_op(env, GETPC());
603 return ret;
604}
605
606float64 HELPER(fmpynfadd_d)(CPUHPPAState *env, float64 a, float64 b, float64 c)
607{
608 float64 ret = float64_muladd(a, b, c, float_muladd_negate_product,
609 &env->fp_status);
610 update_fr0_op(env, GETPC());
611 return ret;
612}
613
614target_ureg HELPER(read_interval_timer)(void)
615{
616#ifdef CONFIG_USER_ONLY
617
618
619 return cpu_get_host_ticks();
620#else
621
622
623
624 return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >> 2;
625#endif
626}
627
628#ifndef CONFIG_USER_ONLY
629void HELPER(write_interval_timer)(CPUHPPAState *env, target_ureg val)
630{
631 HPPACPU *cpu = env_archcpu(env);
632 uint64_t current = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
633 uint64_t timeout;
634
635
636
637
638 timeout = deposit64(current, 0, 34, (uint64_t)val << 2);
639
640
641 if (timeout < current + 1000) {
642 timeout += 1ULL << 34;
643 }
644
645 cpu->env.cr[CR_IT] = timeout;
646 timer_mod(cpu->alarm_timer, timeout);
647}
648
649void HELPER(halt)(CPUHPPAState *env)
650{
651 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
652 helper_excp(env, EXCP_HLT);
653}
654
655void HELPER(reset)(CPUHPPAState *env)
656{
657 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
658 helper_excp(env, EXCP_HLT);
659}
660
661target_ureg HELPER(swap_system_mask)(CPUHPPAState *env, target_ureg nsm)
662{
663 target_ulong psw = env->psw;
664
665
666
667
668
669
670
671
672
673 env->psw = (psw & ~PSW_SM) | (nsm & PSW_SM);
674 return psw & PSW_SM;
675}
676
677void HELPER(rfi)(CPUHPPAState *env)
678{
679 env->iasq_f = (uint64_t)env->cr[CR_IIASQ] << 32;
680 env->iasq_b = (uint64_t)env->cr_back[0] << 32;
681 env->iaoq_f = env->cr[CR_IIAOQ];
682 env->iaoq_b = env->cr_back[1];
683 cpu_hppa_put_psw(env, env->cr[CR_IPSW]);
684}
685
686void HELPER(rfi_r)(CPUHPPAState *env)
687{
688 env->gr[1] = env->shadow[0];
689 env->gr[8] = env->shadow[1];
690 env->gr[9] = env->shadow[2];
691 env->gr[16] = env->shadow[3];
692 env->gr[17] = env->shadow[4];
693 env->gr[24] = env->shadow[5];
694 env->gr[25] = env->shadow[6];
695 helper_rfi(env);
696}
697#endif
698