qemu/hw/arm/boot.c
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   1/*
   2 * ARM kernel loader.
   3 *
   4 * Copyright (c) 2006-2007 CodeSourcery.
   5 * Written by Paul Brook
   6 *
   7 * This code is licensed under the GPL.
   8 */
   9
  10#include "qemu/osdep.h"
  11#include "qemu-common.h"
  12#include "qemu/error-report.h"
  13#include "qapi/error.h"
  14#include <libfdt.h>
  15#include "hw/hw.h"
  16#include "hw/arm/boot.h"
  17#include "hw/arm/linux-boot-if.h"
  18#include "sysemu/kvm.h"
  19#include "sysemu/sysemu.h"
  20#include "sysemu/numa.h"
  21#include "hw/boards.h"
  22#include "hw/loader.h"
  23#include "elf.h"
  24#include "sysemu/device_tree.h"
  25#include "qemu/config-file.h"
  26#include "qemu/option.h"
  27#include "exec/address-spaces.h"
  28#include "qemu/units.h"
  29
  30/* Kernel boot protocol is specified in the kernel docs
  31 * Documentation/arm/Booting and Documentation/arm64/booting.txt
  32 * They have different preferred image load offsets from system RAM base.
  33 */
  34#define KERNEL_ARGS_ADDR   0x100
  35#define KERNEL_NOLOAD_ADDR 0x02000000
  36#define KERNEL_LOAD_ADDR   0x00010000
  37#define KERNEL64_LOAD_ADDR 0x00080000
  38
  39#define ARM64_TEXT_OFFSET_OFFSET    8
  40#define ARM64_MAGIC_OFFSET          56
  41
  42#define BOOTLOADER_MAX_SIZE         (4 * KiB)
  43
  44AddressSpace *arm_boot_address_space(ARMCPU *cpu,
  45                                     const struct arm_boot_info *info)
  46{
  47    /* Return the address space to use for bootloader reads and writes.
  48     * We prefer the secure address space if the CPU has it and we're
  49     * going to boot the guest into it.
  50     */
  51    int asidx;
  52    CPUState *cs = CPU(cpu);
  53
  54    if (arm_feature(&cpu->env, ARM_FEATURE_EL3) && info->secure_boot) {
  55        asidx = ARMASIdx_S;
  56    } else {
  57        asidx = ARMASIdx_NS;
  58    }
  59
  60    return cpu_get_address_space(cs, asidx);
  61}
  62
  63typedef enum {
  64    FIXUP_NONE = 0,     /* do nothing */
  65    FIXUP_TERMINATOR,   /* end of insns */
  66    FIXUP_BOARDID,      /* overwrite with board ID number */
  67    FIXUP_BOARD_SETUP,  /* overwrite with board specific setup code address */
  68    FIXUP_ARGPTR_LO,    /* overwrite with pointer to kernel args */
  69    FIXUP_ARGPTR_HI,    /* overwrite with pointer to kernel args (high half) */
  70    FIXUP_ENTRYPOINT_LO, /* overwrite with kernel entry point */
  71    FIXUP_ENTRYPOINT_HI, /* overwrite with kernel entry point (high half) */
  72    FIXUP_GIC_CPU_IF,   /* overwrite with GIC CPU interface address */
  73    FIXUP_BOOTREG,      /* overwrite with boot register address */
  74    FIXUP_DSB,          /* overwrite with correct DSB insn for cpu */
  75    FIXUP_MAX,
  76} FixupType;
  77
  78typedef struct ARMInsnFixup {
  79    uint32_t insn;
  80    FixupType fixup;
  81} ARMInsnFixup;
  82
  83static const ARMInsnFixup bootloader_aarch64[] = {
  84    { 0x580000c0 }, /* ldr x0, arg ; Load the lower 32-bits of DTB */
  85    { 0xaa1f03e1 }, /* mov x1, xzr */
  86    { 0xaa1f03e2 }, /* mov x2, xzr */
  87    { 0xaa1f03e3 }, /* mov x3, xzr */
  88    { 0x58000084 }, /* ldr x4, entry ; Load the lower 32-bits of kernel entry */
  89    { 0xd61f0080 }, /* br x4      ; Jump to the kernel entry point */
  90    { 0, FIXUP_ARGPTR_LO }, /* arg: .word @DTB Lower 32-bits */
  91    { 0, FIXUP_ARGPTR_HI}, /* .word @DTB Higher 32-bits */
  92    { 0, FIXUP_ENTRYPOINT_LO }, /* entry: .word @Kernel Entry Lower 32-bits */
  93    { 0, FIXUP_ENTRYPOINT_HI }, /* .word @Kernel Entry Higher 32-bits */
  94    { 0, FIXUP_TERMINATOR }
  95};
  96
  97/* A very small bootloader: call the board-setup code (if needed),
  98 * set r0-r2, then jump to the kernel.
  99 * If we're not calling boot setup code then we don't copy across
 100 * the first BOOTLOADER_NO_BOARD_SETUP_OFFSET insns in this array.
 101 */
 102
 103static const ARMInsnFixup bootloader[] = {
 104    { 0xe28fe004 }, /* add     lr, pc, #4 */
 105    { 0xe51ff004 }, /* ldr     pc, [pc, #-4] */
 106    { 0, FIXUP_BOARD_SETUP },
 107#define BOOTLOADER_NO_BOARD_SETUP_OFFSET 3
 108    { 0xe3a00000 }, /* mov     r0, #0 */
 109    { 0xe59f1004 }, /* ldr     r1, [pc, #4] */
 110    { 0xe59f2004 }, /* ldr     r2, [pc, #4] */
 111    { 0xe59ff004 }, /* ldr     pc, [pc, #4] */
 112    { 0, FIXUP_BOARDID },
 113    { 0, FIXUP_ARGPTR_LO },
 114    { 0, FIXUP_ENTRYPOINT_LO },
 115    { 0, FIXUP_TERMINATOR }
 116};
 117
 118/* Handling for secondary CPU boot in a multicore system.
 119 * Unlike the uniprocessor/primary CPU boot, this is platform
 120 * dependent. The default code here is based on the secondary
 121 * CPU boot protocol used on realview/vexpress boards, with
 122 * some parameterisation to increase its flexibility.
 123 * QEMU platform models for which this code is not appropriate
 124 * should override write_secondary_boot and secondary_cpu_reset_hook
 125 * instead.
 126 *
 127 * This code enables the interrupt controllers for the secondary
 128 * CPUs and then puts all the secondary CPUs into a loop waiting
 129 * for an interprocessor interrupt and polling a configurable
 130 * location for the kernel secondary CPU entry point.
 131 */
 132#define DSB_INSN 0xf57ff04f
 133#define CP15_DSB_INSN 0xee070f9a /* mcr cp15, 0, r0, c7, c10, 4 */
 134
 135static const ARMInsnFixup smpboot[] = {
 136    { 0xe59f2028 }, /* ldr r2, gic_cpu_if */
 137    { 0xe59f0028 }, /* ldr r0, bootreg_addr */
 138    { 0xe3a01001 }, /* mov r1, #1 */
 139    { 0xe5821000 }, /* str r1, [r2] - set GICC_CTLR.Enable */
 140    { 0xe3a010ff }, /* mov r1, #0xff */
 141    { 0xe5821004 }, /* str r1, [r2, 4] - set GIC_PMR.Priority to 0xff */
 142    { 0, FIXUP_DSB },   /* dsb */
 143    { 0xe320f003 }, /* wfi */
 144    { 0xe5901000 }, /* ldr     r1, [r0] */
 145    { 0xe1110001 }, /* tst     r1, r1 */
 146    { 0x0afffffb }, /* beq     <wfi> */
 147    { 0xe12fff11 }, /* bx      r1 */
 148    { 0, FIXUP_GIC_CPU_IF }, /* gic_cpu_if: .word 0x.... */
 149    { 0, FIXUP_BOOTREG }, /* bootreg_addr: .word 0x.... */
 150    { 0, FIXUP_TERMINATOR }
 151};
 152
 153static void write_bootloader(const char *name, hwaddr addr,
 154                             const ARMInsnFixup *insns, uint32_t *fixupcontext,
 155                             AddressSpace *as)
 156{
 157    /* Fix up the specified bootloader fragment and write it into
 158     * guest memory using rom_add_blob_fixed(). fixupcontext is
 159     * an array giving the values to write in for the fixup types
 160     * which write a value into the code array.
 161     */
 162    int i, len;
 163    uint32_t *code;
 164
 165    len = 0;
 166    while (insns[len].fixup != FIXUP_TERMINATOR) {
 167        len++;
 168    }
 169
 170    code = g_new0(uint32_t, len);
 171
 172    for (i = 0; i < len; i++) {
 173        uint32_t insn = insns[i].insn;
 174        FixupType fixup = insns[i].fixup;
 175
 176        switch (fixup) {
 177        case FIXUP_NONE:
 178            break;
 179        case FIXUP_BOARDID:
 180        case FIXUP_BOARD_SETUP:
 181        case FIXUP_ARGPTR_LO:
 182        case FIXUP_ARGPTR_HI:
 183        case FIXUP_ENTRYPOINT_LO:
 184        case FIXUP_ENTRYPOINT_HI:
 185        case FIXUP_GIC_CPU_IF:
 186        case FIXUP_BOOTREG:
 187        case FIXUP_DSB:
 188            insn = fixupcontext[fixup];
 189            break;
 190        default:
 191            abort();
 192        }
 193        code[i] = tswap32(insn);
 194    }
 195
 196    assert((len * sizeof(uint32_t)) < BOOTLOADER_MAX_SIZE);
 197
 198    rom_add_blob_fixed_as(name, code, len * sizeof(uint32_t), addr, as);
 199
 200    g_free(code);
 201}
 202
 203static void default_write_secondary(ARMCPU *cpu,
 204                                    const struct arm_boot_info *info)
 205{
 206    uint32_t fixupcontext[FIXUP_MAX];
 207    AddressSpace *as = arm_boot_address_space(cpu, info);
 208
 209    fixupcontext[FIXUP_GIC_CPU_IF] = info->gic_cpu_if_addr;
 210    fixupcontext[FIXUP_BOOTREG] = info->smp_bootreg_addr;
 211    if (arm_feature(&cpu->env, ARM_FEATURE_V7)) {
 212        fixupcontext[FIXUP_DSB] = DSB_INSN;
 213    } else {
 214        fixupcontext[FIXUP_DSB] = CP15_DSB_INSN;
 215    }
 216
 217    write_bootloader("smpboot", info->smp_loader_start,
 218                     smpboot, fixupcontext, as);
 219}
 220
 221void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu,
 222                                            const struct arm_boot_info *info,
 223                                            hwaddr mvbar_addr)
 224{
 225    AddressSpace *as = arm_boot_address_space(cpu, info);
 226    int n;
 227    uint32_t mvbar_blob[] = {
 228        /* mvbar_addr: secure monitor vectors
 229         * Default unimplemented and unused vectors to spin. Makes it
 230         * easier to debug (as opposed to the CPU running away).
 231         */
 232        0xeafffffe, /* (spin) */
 233        0xeafffffe, /* (spin) */
 234        0xe1b0f00e, /* movs pc, lr ;SMC exception return */
 235        0xeafffffe, /* (spin) */
 236        0xeafffffe, /* (spin) */
 237        0xeafffffe, /* (spin) */
 238        0xeafffffe, /* (spin) */
 239        0xeafffffe, /* (spin) */
 240    };
 241    uint32_t board_setup_blob[] = {
 242        /* board setup addr */
 243        0xe3a00e00 + (mvbar_addr >> 4), /* mov r0, #mvbar_addr */
 244        0xee0c0f30, /* mcr     p15, 0, r0, c12, c0, 1 ;set MVBAR */
 245        0xee110f11, /* mrc     p15, 0, r0, c1 , c1, 0 ;read SCR */
 246        0xe3800031, /* orr     r0, #0x31              ;enable AW, FW, NS */
 247        0xee010f11, /* mcr     p15, 0, r0, c1, c1, 0  ;write SCR */
 248        0xe1a0100e, /* mov     r1, lr                 ;save LR across SMC */
 249        0xe1600070, /* smc     #0                     ;call monitor to flush SCR */
 250        0xe1a0f001, /* mov     pc, r1                 ;return */
 251    };
 252
 253    /* check that mvbar_addr is correctly aligned and relocatable (using MOV) */
 254    assert((mvbar_addr & 0x1f) == 0 && (mvbar_addr >> 4) < 0x100);
 255
 256    /* check that these blobs don't overlap */
 257    assert((mvbar_addr + sizeof(mvbar_blob) <= info->board_setup_addr)
 258          || (info->board_setup_addr + sizeof(board_setup_blob) <= mvbar_addr));
 259
 260    for (n = 0; n < ARRAY_SIZE(mvbar_blob); n++) {
 261        mvbar_blob[n] = tswap32(mvbar_blob[n]);
 262    }
 263    rom_add_blob_fixed_as("board-setup-mvbar", mvbar_blob, sizeof(mvbar_blob),
 264                          mvbar_addr, as);
 265
 266    for (n = 0; n < ARRAY_SIZE(board_setup_blob); n++) {
 267        board_setup_blob[n] = tswap32(board_setup_blob[n]);
 268    }
 269    rom_add_blob_fixed_as("board-setup", board_setup_blob,
 270                          sizeof(board_setup_blob), info->board_setup_addr, as);
 271}
 272
 273static void default_reset_secondary(ARMCPU *cpu,
 274                                    const struct arm_boot_info *info)
 275{
 276    AddressSpace *as = arm_boot_address_space(cpu, info);
 277    CPUState *cs = CPU(cpu);
 278
 279    address_space_stl_notdirty(as, info->smp_bootreg_addr,
 280                               0, MEMTXATTRS_UNSPECIFIED, NULL);
 281    cpu_set_pc(cs, info->smp_loader_start);
 282}
 283
 284static inline bool have_dtb(const struct arm_boot_info *info)
 285{
 286    return info->dtb_filename || info->get_dtb;
 287}
 288
 289#define WRITE_WORD(p, value) do { \
 290    address_space_stl_notdirty(as, p, value, \
 291                               MEMTXATTRS_UNSPECIFIED, NULL);  \
 292    p += 4;                       \
 293} while (0)
 294
 295static void set_kernel_args(const struct arm_boot_info *info, AddressSpace *as)
 296{
 297    int initrd_size = info->initrd_size;
 298    hwaddr base = info->loader_start;
 299    hwaddr p;
 300
 301    p = base + KERNEL_ARGS_ADDR;
 302    /* ATAG_CORE */
 303    WRITE_WORD(p, 5);
 304    WRITE_WORD(p, 0x54410001);
 305    WRITE_WORD(p, 1);
 306    WRITE_WORD(p, 0x1000);
 307    WRITE_WORD(p, 0);
 308    /* ATAG_MEM */
 309    /* TODO: handle multiple chips on one ATAG list */
 310    WRITE_WORD(p, 4);
 311    WRITE_WORD(p, 0x54410002);
 312    WRITE_WORD(p, info->ram_size);
 313    WRITE_WORD(p, info->loader_start);
 314    if (initrd_size) {
 315        /* ATAG_INITRD2 */
 316        WRITE_WORD(p, 4);
 317        WRITE_WORD(p, 0x54420005);
 318        WRITE_WORD(p, info->initrd_start);
 319        WRITE_WORD(p, initrd_size);
 320    }
 321    if (info->kernel_cmdline && *info->kernel_cmdline) {
 322        /* ATAG_CMDLINE */
 323        int cmdline_size;
 324
 325        cmdline_size = strlen(info->kernel_cmdline);
 326        address_space_write(as, p + 8, MEMTXATTRS_UNSPECIFIED,
 327                            (const uint8_t *)info->kernel_cmdline,
 328                            cmdline_size + 1);
 329        cmdline_size = (cmdline_size >> 2) + 1;
 330        WRITE_WORD(p, cmdline_size + 2);
 331        WRITE_WORD(p, 0x54410009);
 332        p += cmdline_size * 4;
 333    }
 334    if (info->atag_board) {
 335        /* ATAG_BOARD */
 336        int atag_board_len;
 337        uint8_t atag_board_buf[0x1000];
 338
 339        atag_board_len = (info->atag_board(info, atag_board_buf) + 3) & ~3;
 340        WRITE_WORD(p, (atag_board_len + 8) >> 2);
 341        WRITE_WORD(p, 0x414f4d50);
 342        address_space_write(as, p, MEMTXATTRS_UNSPECIFIED,
 343                            atag_board_buf, atag_board_len);
 344        p += atag_board_len;
 345    }
 346    /* ATAG_END */
 347    WRITE_WORD(p, 0);
 348    WRITE_WORD(p, 0);
 349}
 350
 351static void set_kernel_args_old(const struct arm_boot_info *info,
 352                                AddressSpace *as)
 353{
 354    hwaddr p;
 355    const char *s;
 356    int initrd_size = info->initrd_size;
 357    hwaddr base = info->loader_start;
 358
 359    /* see linux/include/asm-arm/setup.h */
 360    p = base + KERNEL_ARGS_ADDR;
 361    /* page_size */
 362    WRITE_WORD(p, 4096);
 363    /* nr_pages */
 364    WRITE_WORD(p, info->ram_size / 4096);
 365    /* ramdisk_size */
 366    WRITE_WORD(p, 0);
 367#define FLAG_READONLY   1
 368#define FLAG_RDLOAD     4
 369#define FLAG_RDPROMPT   8
 370    /* flags */
 371    WRITE_WORD(p, FLAG_READONLY | FLAG_RDLOAD | FLAG_RDPROMPT);
 372    /* rootdev */
 373    WRITE_WORD(p, (31 << 8) | 0);       /* /dev/mtdblock0 */
 374    /* video_num_cols */
 375    WRITE_WORD(p, 0);
 376    /* video_num_rows */
 377    WRITE_WORD(p, 0);
 378    /* video_x */
 379    WRITE_WORD(p, 0);
 380    /* video_y */
 381    WRITE_WORD(p, 0);
 382    /* memc_control_reg */
 383    WRITE_WORD(p, 0);
 384    /* unsigned char sounddefault */
 385    /* unsigned char adfsdrives */
 386    /* unsigned char bytes_per_char_h */
 387    /* unsigned char bytes_per_char_v */
 388    WRITE_WORD(p, 0);
 389    /* pages_in_bank[4] */
 390    WRITE_WORD(p, 0);
 391    WRITE_WORD(p, 0);
 392    WRITE_WORD(p, 0);
 393    WRITE_WORD(p, 0);
 394    /* pages_in_vram */
 395    WRITE_WORD(p, 0);
 396    /* initrd_start */
 397    if (initrd_size) {
 398        WRITE_WORD(p, info->initrd_start);
 399    } else {
 400        WRITE_WORD(p, 0);
 401    }
 402    /* initrd_size */
 403    WRITE_WORD(p, initrd_size);
 404    /* rd_start */
 405    WRITE_WORD(p, 0);
 406    /* system_rev */
 407    WRITE_WORD(p, 0);
 408    /* system_serial_low */
 409    WRITE_WORD(p, 0);
 410    /* system_serial_high */
 411    WRITE_WORD(p, 0);
 412    /* mem_fclk_21285 */
 413    WRITE_WORD(p, 0);
 414    /* zero unused fields */
 415    while (p < base + KERNEL_ARGS_ADDR + 256 + 1024) {
 416        WRITE_WORD(p, 0);
 417    }
 418    s = info->kernel_cmdline;
 419    if (s) {
 420        address_space_write(as, p, MEMTXATTRS_UNSPECIFIED,
 421                            (const uint8_t *)s, strlen(s) + 1);
 422    } else {
 423        WRITE_WORD(p, 0);
 424    }
 425}
 426
 427static int fdt_add_memory_node(void *fdt, uint32_t acells, hwaddr mem_base,
 428                               uint32_t scells, hwaddr mem_len,
 429                               int numa_node_id)
 430{
 431    char *nodename;
 432    int ret;
 433
 434    nodename = g_strdup_printf("/memory@%" PRIx64, mem_base);
 435    qemu_fdt_add_subnode(fdt, nodename);
 436    qemu_fdt_setprop_string(fdt, nodename, "device_type", "memory");
 437    ret = qemu_fdt_setprop_sized_cells(fdt, nodename, "reg", acells, mem_base,
 438                                       scells, mem_len);
 439    if (ret < 0) {
 440        goto out;
 441    }
 442
 443    /* only set the NUMA ID if it is specified */
 444    if (numa_node_id >= 0) {
 445        ret = qemu_fdt_setprop_cell(fdt, nodename,
 446                                    "numa-node-id", numa_node_id);
 447    }
 448out:
 449    g_free(nodename);
 450    return ret;
 451}
 452
 453static void fdt_add_psci_node(void *fdt)
 454{
 455    uint32_t cpu_suspend_fn;
 456    uint32_t cpu_off_fn;
 457    uint32_t cpu_on_fn;
 458    uint32_t migrate_fn;
 459    ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(0));
 460    const char *psci_method;
 461    int64_t psci_conduit;
 462    int rc;
 463
 464    psci_conduit = object_property_get_int(OBJECT(armcpu),
 465                                           "psci-conduit",
 466                                           &error_abort);
 467    switch (psci_conduit) {
 468    case QEMU_PSCI_CONDUIT_DISABLED:
 469        return;
 470    case QEMU_PSCI_CONDUIT_HVC:
 471        psci_method = "hvc";
 472        break;
 473    case QEMU_PSCI_CONDUIT_SMC:
 474        psci_method = "smc";
 475        break;
 476    default:
 477        g_assert_not_reached();
 478    }
 479
 480    /*
 481     * If /psci node is present in provided DTB, assume that no fixup
 482     * is necessary and all PSCI configuration should be taken as-is
 483     */
 484    rc = fdt_path_offset(fdt, "/psci");
 485    if (rc >= 0) {
 486        return;
 487    }
 488
 489    qemu_fdt_add_subnode(fdt, "/psci");
 490    if (armcpu->psci_version == 2) {
 491        const char comp[] = "arm,psci-0.2\0arm,psci";
 492        qemu_fdt_setprop(fdt, "/psci", "compatible", comp, sizeof(comp));
 493
 494        cpu_off_fn = QEMU_PSCI_0_2_FN_CPU_OFF;
 495        if (arm_feature(&armcpu->env, ARM_FEATURE_AARCH64)) {
 496            cpu_suspend_fn = QEMU_PSCI_0_2_FN64_CPU_SUSPEND;
 497            cpu_on_fn = QEMU_PSCI_0_2_FN64_CPU_ON;
 498            migrate_fn = QEMU_PSCI_0_2_FN64_MIGRATE;
 499        } else {
 500            cpu_suspend_fn = QEMU_PSCI_0_2_FN_CPU_SUSPEND;
 501            cpu_on_fn = QEMU_PSCI_0_2_FN_CPU_ON;
 502            migrate_fn = QEMU_PSCI_0_2_FN_MIGRATE;
 503        }
 504    } else {
 505        qemu_fdt_setprop_string(fdt, "/psci", "compatible", "arm,psci");
 506
 507        cpu_suspend_fn = QEMU_PSCI_0_1_FN_CPU_SUSPEND;
 508        cpu_off_fn = QEMU_PSCI_0_1_FN_CPU_OFF;
 509        cpu_on_fn = QEMU_PSCI_0_1_FN_CPU_ON;
 510        migrate_fn = QEMU_PSCI_0_1_FN_MIGRATE;
 511    }
 512
 513    /* We adopt the PSCI spec's nomenclature, and use 'conduit' to refer
 514     * to the instruction that should be used to invoke PSCI functions.
 515     * However, the device tree binding uses 'method' instead, so that is
 516     * what we should use here.
 517     */
 518    qemu_fdt_setprop_string(fdt, "/psci", "method", psci_method);
 519
 520    qemu_fdt_setprop_cell(fdt, "/psci", "cpu_suspend", cpu_suspend_fn);
 521    qemu_fdt_setprop_cell(fdt, "/psci", "cpu_off", cpu_off_fn);
 522    qemu_fdt_setprop_cell(fdt, "/psci", "cpu_on", cpu_on_fn);
 523    qemu_fdt_setprop_cell(fdt, "/psci", "migrate", migrate_fn);
 524}
 525
 526int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
 527                 hwaddr addr_limit, AddressSpace *as)
 528{
 529    void *fdt = NULL;
 530    int size, rc, n = 0;
 531    uint32_t acells, scells;
 532    unsigned int i;
 533    hwaddr mem_base, mem_len;
 534    char **node_path;
 535    Error *err = NULL;
 536
 537    if (binfo->dtb_filename) {
 538        char *filename;
 539        filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, binfo->dtb_filename);
 540        if (!filename) {
 541            fprintf(stderr, "Couldn't open dtb file %s\n", binfo->dtb_filename);
 542            goto fail;
 543        }
 544
 545        fdt = load_device_tree(filename, &size);
 546        if (!fdt) {
 547            fprintf(stderr, "Couldn't open dtb file %s\n", filename);
 548            g_free(filename);
 549            goto fail;
 550        }
 551        g_free(filename);
 552    } else {
 553        fdt = binfo->get_dtb(binfo, &size);
 554        if (!fdt) {
 555            fprintf(stderr, "Board was unable to create a dtb blob\n");
 556            goto fail;
 557        }
 558    }
 559
 560    if (addr_limit > addr && size > (addr_limit - addr)) {
 561        /* Installing the device tree blob at addr would exceed addr_limit.
 562         * Whether this constitutes failure is up to the caller to decide,
 563         * so just return 0 as size, i.e., no error.
 564         */
 565        g_free(fdt);
 566        return 0;
 567    }
 568
 569    acells = qemu_fdt_getprop_cell(fdt, "/", "#address-cells",
 570                                   NULL, &error_fatal);
 571    scells = qemu_fdt_getprop_cell(fdt, "/", "#size-cells",
 572                                   NULL, &error_fatal);
 573    if (acells == 0 || scells == 0) {
 574        fprintf(stderr, "dtb file invalid (#address-cells or #size-cells 0)\n");
 575        goto fail;
 576    }
 577
 578    if (scells < 2 && binfo->ram_size >= (1ULL << 32)) {
 579        /* This is user error so deserves a friendlier error message
 580         * than the failure of setprop_sized_cells would provide
 581         */
 582        fprintf(stderr, "qemu: dtb file not compatible with "
 583                "RAM size > 4GB\n");
 584        goto fail;
 585    }
 586
 587    /* nop all root nodes matching /memory or /memory@unit-address */
 588    node_path = qemu_fdt_node_unit_path(fdt, "memory", &err);
 589    if (err) {
 590        error_report_err(err);
 591        goto fail;
 592    }
 593    while (node_path[n]) {
 594        if (g_str_has_prefix(node_path[n], "/memory")) {
 595            qemu_fdt_nop_node(fdt, node_path[n]);
 596        }
 597        n++;
 598    }
 599    g_strfreev(node_path);
 600
 601    if (nb_numa_nodes > 0) {
 602        mem_base = binfo->loader_start;
 603        for (i = 0; i < nb_numa_nodes; i++) {
 604            mem_len = numa_info[i].node_mem;
 605            rc = fdt_add_memory_node(fdt, acells, mem_base,
 606                                     scells, mem_len, i);
 607            if (rc < 0) {
 608                fprintf(stderr, "couldn't add /memory@%"PRIx64" node\n",
 609                        mem_base);
 610                goto fail;
 611            }
 612
 613            mem_base += mem_len;
 614        }
 615    } else {
 616        rc = fdt_add_memory_node(fdt, acells, binfo->loader_start,
 617                                 scells, binfo->ram_size, -1);
 618        if (rc < 0) {
 619            fprintf(stderr, "couldn't add /memory@%"PRIx64" node\n",
 620                    binfo->loader_start);
 621            goto fail;
 622        }
 623    }
 624
 625    rc = fdt_path_offset(fdt, "/chosen");
 626    if (rc < 0) {
 627        qemu_fdt_add_subnode(fdt, "/chosen");
 628    }
 629
 630    if (binfo->kernel_cmdline && *binfo->kernel_cmdline) {
 631        rc = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs",
 632                                     binfo->kernel_cmdline);
 633        if (rc < 0) {
 634            fprintf(stderr, "couldn't set /chosen/bootargs\n");
 635            goto fail;
 636        }
 637    }
 638
 639    if (binfo->initrd_size) {
 640        rc = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start",
 641                                   binfo->initrd_start);
 642        if (rc < 0) {
 643            fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
 644            goto fail;
 645        }
 646
 647        rc = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end",
 648                                   binfo->initrd_start + binfo->initrd_size);
 649        if (rc < 0) {
 650            fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
 651            goto fail;
 652        }
 653    }
 654
 655    fdt_add_psci_node(fdt);
 656
 657    if (binfo->modify_dtb) {
 658        binfo->modify_dtb(binfo, fdt);
 659    }
 660
 661    qemu_fdt_dumpdtb(fdt, size);
 662
 663    /* Put the DTB into the memory map as a ROM image: this will ensure
 664     * the DTB is copied again upon reset, even if addr points into RAM.
 665     */
 666    rom_add_blob_fixed_as("dtb", fdt, size, addr, as);
 667
 668    g_free(fdt);
 669
 670    return size;
 671
 672fail:
 673    g_free(fdt);
 674    return -1;
 675}
 676
 677static void do_cpu_reset(void *opaque)
 678{
 679    ARMCPU *cpu = opaque;
 680    CPUState *cs = CPU(cpu);
 681    CPUARMState *env = &cpu->env;
 682    const struct arm_boot_info *info = env->boot_info;
 683
 684    cpu_reset(cs);
 685    if (info) {
 686        if (!info->is_linux) {
 687            int i;
 688            /* Jump to the entry point.  */
 689            uint64_t entry = info->entry;
 690
 691            switch (info->endianness) {
 692            case ARM_ENDIANNESS_LE:
 693                env->cp15.sctlr_el[1] &= ~SCTLR_E0E;
 694                for (i = 1; i < 4; ++i) {
 695                    env->cp15.sctlr_el[i] &= ~SCTLR_EE;
 696                }
 697                env->uncached_cpsr &= ~CPSR_E;
 698                break;
 699            case ARM_ENDIANNESS_BE8:
 700                env->cp15.sctlr_el[1] |= SCTLR_E0E;
 701                for (i = 1; i < 4; ++i) {
 702                    env->cp15.sctlr_el[i] |= SCTLR_EE;
 703                }
 704                env->uncached_cpsr |= CPSR_E;
 705                break;
 706            case ARM_ENDIANNESS_BE32:
 707                env->cp15.sctlr_el[1] |= SCTLR_B;
 708                break;
 709            case ARM_ENDIANNESS_UNKNOWN:
 710                break; /* Board's decision */
 711            default:
 712                g_assert_not_reached();
 713            }
 714
 715            cpu_set_pc(cs, entry);
 716        } else {
 717            /* If we are booting Linux then we need to check whether we are
 718             * booting into secure or non-secure state and adjust the state
 719             * accordingly.  Out of reset, ARM is defined to be in secure state
 720             * (SCR.NS = 0), we change that here if non-secure boot has been
 721             * requested.
 722             */
 723            if (arm_feature(env, ARM_FEATURE_EL3)) {
 724                /* AArch64 is defined to come out of reset into EL3 if enabled.
 725                 * If we are booting Linux then we need to adjust our EL as
 726                 * Linux expects us to be in EL2 or EL1.  AArch32 resets into
 727                 * SVC, which Linux expects, so no privilege/exception level to
 728                 * adjust.
 729                 */
 730                if (env->aarch64) {
 731                    env->cp15.scr_el3 |= SCR_RW;
 732                    if (arm_feature(env, ARM_FEATURE_EL2)) {
 733                        env->cp15.hcr_el2 |= HCR_RW;
 734                        env->pstate = PSTATE_MODE_EL2h;
 735                    } else {
 736                        env->pstate = PSTATE_MODE_EL1h;
 737                    }
 738                    /* AArch64 kernels never boot in secure mode */
 739                    assert(!info->secure_boot);
 740                    /* This hook is only supported for AArch32 currently:
 741                     * bootloader_aarch64[] will not call the hook, and
 742                     * the code above has already dropped us into EL2 or EL1.
 743                     */
 744                    assert(!info->secure_board_setup);
 745                }
 746
 747                if (arm_feature(env, ARM_FEATURE_EL2)) {
 748                    /* If we have EL2 then Linux expects the HVC insn to work */
 749                    env->cp15.scr_el3 |= SCR_HCE;
 750                }
 751
 752                /* Set to non-secure if not a secure boot */
 753                if (!info->secure_boot &&
 754                    (cs != first_cpu || !info->secure_board_setup)) {
 755                    /* Linux expects non-secure state */
 756                    env->cp15.scr_el3 |= SCR_NS;
 757                    /* Set NSACR.{CP11,CP10} so NS can access the FPU */
 758                    env->cp15.nsacr |= 3 << 10;
 759                }
 760            }
 761
 762            if (!env->aarch64 && !info->secure_boot &&
 763                arm_feature(env, ARM_FEATURE_EL2)) {
 764                /*
 765                 * This is an AArch32 boot not to Secure state, and
 766                 * we have Hyp mode available, so boot the kernel into
 767                 * Hyp mode. This is not how the CPU comes out of reset,
 768                 * so we need to manually put it there.
 769                 */
 770                cpsr_write(env, ARM_CPU_MODE_HYP, CPSR_M, CPSRWriteRaw);
 771            }
 772
 773            if (cs == first_cpu) {
 774                AddressSpace *as = arm_boot_address_space(cpu, info);
 775
 776                cpu_set_pc(cs, info->loader_start);
 777
 778                if (!have_dtb(info)) {
 779                    if (old_param) {
 780                        set_kernel_args_old(info, as);
 781                    } else {
 782                        set_kernel_args(info, as);
 783                    }
 784                }
 785            } else {
 786                info->secondary_cpu_reset_hook(cpu, info);
 787            }
 788        }
 789    }
 790}
 791
 792/**
 793 * load_image_to_fw_cfg() - Load an image file into an fw_cfg entry identified
 794 *                          by key.
 795 * @fw_cfg:         The firmware config instance to store the data in.
 796 * @size_key:       The firmware config key to store the size of the loaded
 797 *                  data under, with fw_cfg_add_i32().
 798 * @data_key:       The firmware config key to store the loaded data under,
 799 *                  with fw_cfg_add_bytes().
 800 * @image_name:     The name of the image file to load. If it is NULL, the
 801 *                  function returns without doing anything.
 802 * @try_decompress: Whether the image should be decompressed (gunzipped) before
 803 *                  adding it to fw_cfg. If decompression fails, the image is
 804 *                  loaded as-is.
 805 *
 806 * In case of failure, the function prints an error message to stderr and the
 807 * process exits with status 1.
 808 */
 809static void load_image_to_fw_cfg(FWCfgState *fw_cfg, uint16_t size_key,
 810                                 uint16_t data_key, const char *image_name,
 811                                 bool try_decompress)
 812{
 813    size_t size = -1;
 814    uint8_t *data;
 815
 816    if (image_name == NULL) {
 817        return;
 818    }
 819
 820    if (try_decompress) {
 821        size = load_image_gzipped_buffer(image_name,
 822                                         LOAD_IMAGE_MAX_GUNZIP_BYTES, &data);
 823    }
 824
 825    if (size == (size_t)-1) {
 826        gchar *contents;
 827        gsize length;
 828
 829        if (!g_file_get_contents(image_name, &contents, &length, NULL)) {
 830            error_report("failed to load \"%s\"", image_name);
 831            exit(1);
 832        }
 833        size = length;
 834        data = (uint8_t *)contents;
 835    }
 836
 837    fw_cfg_add_i32(fw_cfg, size_key, size);
 838    fw_cfg_add_bytes(fw_cfg, data_key, data, size);
 839}
 840
 841static int do_arm_linux_init(Object *obj, void *opaque)
 842{
 843    if (object_dynamic_cast(obj, TYPE_ARM_LINUX_BOOT_IF)) {
 844        ARMLinuxBootIf *albif = ARM_LINUX_BOOT_IF(obj);
 845        ARMLinuxBootIfClass *albifc = ARM_LINUX_BOOT_IF_GET_CLASS(obj);
 846        struct arm_boot_info *info = opaque;
 847
 848        if (albifc->arm_linux_init) {
 849            albifc->arm_linux_init(albif, info->secure_boot);
 850        }
 851    }
 852    return 0;
 853}
 854
 855static int64_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry,
 856                            uint64_t *lowaddr, uint64_t *highaddr,
 857                            int elf_machine, AddressSpace *as)
 858{
 859    bool elf_is64;
 860    union {
 861        Elf32_Ehdr h32;
 862        Elf64_Ehdr h64;
 863    } elf_header;
 864    int data_swab = 0;
 865    bool big_endian;
 866    int64_t ret = -1;
 867    Error *err = NULL;
 868
 869
 870    load_elf_hdr(info->kernel_filename, &elf_header, &elf_is64, &err);
 871    if (err) {
 872        error_free(err);
 873        return ret;
 874    }
 875
 876    if (elf_is64) {
 877        big_endian = elf_header.h64.e_ident[EI_DATA] == ELFDATA2MSB;
 878        info->endianness = big_endian ? ARM_ENDIANNESS_BE8
 879                                      : ARM_ENDIANNESS_LE;
 880    } else {
 881        big_endian = elf_header.h32.e_ident[EI_DATA] == ELFDATA2MSB;
 882        if (big_endian) {
 883            if (bswap32(elf_header.h32.e_flags) & EF_ARM_BE8) {
 884                info->endianness = ARM_ENDIANNESS_BE8;
 885            } else {
 886                info->endianness = ARM_ENDIANNESS_BE32;
 887                /* In BE32, the CPU has a different view of the per-byte
 888                 * address map than the rest of the system. BE32 ELF files
 889                 * are organised such that they can be programmed through
 890                 * the CPU's per-word byte-reversed view of the world. QEMU
 891                 * however loads ELF files independently of the CPU. So
 892                 * tell the ELF loader to byte reverse the data for us.
 893                 */
 894                data_swab = 2;
 895            }
 896        } else {
 897            info->endianness = ARM_ENDIANNESS_LE;
 898        }
 899    }
 900
 901    ret = load_elf_as(info->kernel_filename, NULL, NULL, NULL,
 902                      pentry, lowaddr, highaddr, big_endian, elf_machine,
 903                      1, data_swab, as);
 904    if (ret <= 0) {
 905        /* The header loaded but the image didn't */
 906        exit(1);
 907    }
 908
 909    return ret;
 910}
 911
 912static uint64_t load_aarch64_image(const char *filename, hwaddr mem_base,
 913                                   hwaddr *entry, AddressSpace *as)
 914{
 915    hwaddr kernel_load_offset = KERNEL64_LOAD_ADDR;
 916    uint64_t kernel_size = 0;
 917    uint8_t *buffer;
 918    int size;
 919
 920    /* On aarch64, it's the bootloader's job to uncompress the kernel. */
 921    size = load_image_gzipped_buffer(filename, LOAD_IMAGE_MAX_GUNZIP_BYTES,
 922                                     &buffer);
 923
 924    if (size < 0) {
 925        gsize len;
 926
 927        /* Load as raw file otherwise */
 928        if (!g_file_get_contents(filename, (char **)&buffer, &len, NULL)) {
 929            return -1;
 930        }
 931        size = len;
 932    }
 933
 934    /* check the arm64 magic header value -- very old kernels may not have it */
 935    if (size > ARM64_MAGIC_OFFSET + 4 &&
 936        memcmp(buffer + ARM64_MAGIC_OFFSET, "ARM\x64", 4) == 0) {
 937        uint64_t hdrvals[2];
 938
 939        /* The arm64 Image header has text_offset and image_size fields at 8 and
 940         * 16 bytes into the Image header, respectively. The text_offset field
 941         * is only valid if the image_size is non-zero.
 942         */
 943        memcpy(&hdrvals, buffer + ARM64_TEXT_OFFSET_OFFSET, sizeof(hdrvals));
 944
 945        kernel_size = le64_to_cpu(hdrvals[1]);
 946
 947        if (kernel_size != 0) {
 948            kernel_load_offset = le64_to_cpu(hdrvals[0]);
 949
 950            /*
 951             * We write our startup "bootloader" at the very bottom of RAM,
 952             * so that bit can't be used for the image. Luckily the Image
 953             * format specification is that the image requests only an offset
 954             * from a 2MB boundary, not an absolute load address. So if the
 955             * image requests an offset that might mean it overlaps with the
 956             * bootloader, we can just load it starting at 2MB+offset rather
 957             * than 0MB + offset.
 958             */
 959            if (kernel_load_offset < BOOTLOADER_MAX_SIZE) {
 960                kernel_load_offset += 2 * MiB;
 961            }
 962        }
 963    }
 964
 965    /*
 966     * Kernels before v3.17 don't populate the image_size field, and
 967     * raw images have no header. For those our best guess at the size
 968     * is the size of the Image file itself.
 969     */
 970    if (kernel_size == 0) {
 971        kernel_size = size;
 972    }
 973
 974    *entry = mem_base + kernel_load_offset;
 975    rom_add_blob_fixed_as(filename, buffer, size, *entry, as);
 976
 977    g_free(buffer);
 978
 979    return kernel_size;
 980}
 981
 982static void arm_setup_direct_kernel_boot(ARMCPU *cpu,
 983                                         struct arm_boot_info *info)
 984{
 985    /* Set up for a direct boot of a kernel image file. */
 986    CPUState *cs;
 987    AddressSpace *as = arm_boot_address_space(cpu, info);
 988    int kernel_size;
 989    int initrd_size;
 990    int is_linux = 0;
 991    uint64_t elf_entry;
 992    /* Addresses of first byte used and first byte not used by the image */
 993    uint64_t image_low_addr = 0, image_high_addr = 0;
 994    int elf_machine;
 995    hwaddr entry;
 996    static const ARMInsnFixup *primary_loader;
 997    uint64_t ram_end = info->loader_start + info->ram_size;
 998
 999    if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
1000        primary_loader = bootloader_aarch64;
1001        elf_machine = EM_AARCH64;
1002    } else {
1003        primary_loader = bootloader;
1004        if (!info->write_board_setup) {
1005            primary_loader += BOOTLOADER_NO_BOARD_SETUP_OFFSET;
1006        }
1007        elf_machine = EM_ARM;
1008    }
1009
1010    if (!info->secondary_cpu_reset_hook) {
1011        info->secondary_cpu_reset_hook = default_reset_secondary;
1012    }
1013    if (!info->write_secondary_boot) {
1014        info->write_secondary_boot = default_write_secondary;
1015    }
1016
1017    if (info->nb_cpus == 0)
1018        info->nb_cpus = 1;
1019
1020    /* Assume that raw images are linux kernels, and ELF images are not.  */
1021    kernel_size = arm_load_elf(info, &elf_entry, &image_low_addr,
1022                               &image_high_addr, elf_machine, as);
1023    if (kernel_size > 0 && have_dtb(info)) {
1024        /*
1025         * If there is still some room left at the base of RAM, try and put
1026         * the DTB there like we do for images loaded with -bios or -pflash.
1027         */
1028        if (image_low_addr > info->loader_start
1029            || image_high_addr < info->loader_start) {
1030            /*
1031             * Set image_low_addr as address limit for arm_load_dtb if it may be
1032             * pointing into RAM, otherwise pass '0' (no limit)
1033             */
1034            if (image_low_addr < info->loader_start) {
1035                image_low_addr = 0;
1036            }
1037            info->dtb_start = info->loader_start;
1038            info->dtb_limit = image_low_addr;
1039        }
1040    }
1041    entry = elf_entry;
1042    if (kernel_size < 0) {
1043        uint64_t loadaddr = info->loader_start + KERNEL_NOLOAD_ADDR;
1044        kernel_size = load_uimage_as(info->kernel_filename, &entry, &loadaddr,
1045                                     &is_linux, NULL, NULL, as);
1046        if (kernel_size >= 0) {
1047            image_low_addr = loadaddr;
1048            image_high_addr = image_low_addr + kernel_size;
1049        }
1050    }
1051    if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) && kernel_size < 0) {
1052        kernel_size = load_aarch64_image(info->kernel_filename,
1053                                         info->loader_start, &entry, as);
1054        is_linux = 1;
1055        if (kernel_size >= 0) {
1056            image_low_addr = entry;
1057            image_high_addr = image_low_addr + kernel_size;
1058        }
1059    } else if (kernel_size < 0) {
1060        /* 32-bit ARM */
1061        entry = info->loader_start + KERNEL_LOAD_ADDR;
1062        kernel_size = load_image_targphys_as(info->kernel_filename, entry,
1063                                             ram_end - KERNEL_LOAD_ADDR, as);
1064        is_linux = 1;
1065        if (kernel_size >= 0) {
1066            image_low_addr = entry;
1067            image_high_addr = image_low_addr + kernel_size;
1068        }
1069    }
1070    if (kernel_size < 0) {
1071        error_report("could not load kernel '%s'", info->kernel_filename);
1072        exit(1);
1073    }
1074
1075    if (kernel_size > info->ram_size) {
1076        error_report("kernel '%s' is too large to fit in RAM "
1077                     "(kernel size %d, RAM size %" PRId64 ")",
1078                     info->kernel_filename, kernel_size, info->ram_size);
1079        exit(1);
1080    }
1081
1082    info->entry = entry;
1083
1084    /*
1085     * We want to put the initrd far enough into RAM that when the
1086     * kernel is uncompressed it will not clobber the initrd. However
1087     * on boards without much RAM we must ensure that we still leave
1088     * enough room for a decent sized initrd, and on boards with large
1089     * amounts of RAM we must avoid the initrd being so far up in RAM
1090     * that it is outside lowmem and inaccessible to the kernel.
1091     * So for boards with less  than 256MB of RAM we put the initrd
1092     * halfway into RAM, and for boards with 256MB of RAM or more we put
1093     * the initrd at 128MB.
1094     * We also refuse to put the initrd somewhere that will definitely
1095     * overlay the kernel we just loaded, though for kernel formats which
1096     * don't tell us their exact size (eg self-decompressing 32-bit kernels)
1097     * we might still make a bad choice here.
1098     */
1099    info->initrd_start = info->loader_start +
1100        MIN(info->ram_size / 2, 128 * 1024 * 1024);
1101    if (image_high_addr) {
1102        info->initrd_start = MAX(info->initrd_start, image_high_addr);
1103    }
1104    info->initrd_start = TARGET_PAGE_ALIGN(info->initrd_start);
1105
1106    if (is_linux) {
1107        uint32_t fixupcontext[FIXUP_MAX];
1108
1109        if (info->initrd_filename) {
1110
1111            if (info->initrd_start >= ram_end) {
1112                error_report("not enough space after kernel to load initrd");
1113                exit(1);
1114            }
1115
1116            initrd_size = load_ramdisk_as(info->initrd_filename,
1117                                          info->initrd_start,
1118                                          ram_end - info->initrd_start, as);
1119            if (initrd_size < 0) {
1120                initrd_size = load_image_targphys_as(info->initrd_filename,
1121                                                     info->initrd_start,
1122                                                     ram_end -
1123                                                     info->initrd_start,
1124                                                     as);
1125            }
1126            if (initrd_size < 0) {
1127                error_report("could not load initrd '%s'",
1128                             info->initrd_filename);
1129                exit(1);
1130            }
1131            if (info->initrd_start + initrd_size > ram_end) {
1132                error_report("could not load initrd '%s': "
1133                             "too big to fit into RAM after the kernel",
1134                             info->initrd_filename);
1135                exit(1);
1136            }
1137        } else {
1138            initrd_size = 0;
1139        }
1140        info->initrd_size = initrd_size;
1141
1142        fixupcontext[FIXUP_BOARDID] = info->board_id;
1143        fixupcontext[FIXUP_BOARD_SETUP] = info->board_setup_addr;
1144
1145        /*
1146         * for device tree boot, we pass the DTB directly in r2. Otherwise
1147         * we point to the kernel args.
1148         */
1149        if (have_dtb(info)) {
1150            hwaddr align;
1151
1152            if (elf_machine == EM_AARCH64) {
1153                /*
1154                 * Some AArch64 kernels on early bootup map the fdt region as
1155                 *
1156                 *   [ ALIGN_DOWN(fdt, 2MB) ... ALIGN_DOWN(fdt, 2MB) + 2MB ]
1157                 *
1158                 * Let's play safe and prealign it to 2MB to give us some space.
1159                 */
1160                align = 2 * 1024 * 1024;
1161            } else {
1162                /*
1163                 * Some 32bit kernels will trash anything in the 4K page the
1164                 * initrd ends in, so make sure the DTB isn't caught up in that.
1165                 */
1166                align = 4096;
1167            }
1168
1169            /* Place the DTB after the initrd in memory with alignment. */
1170            info->dtb_start = QEMU_ALIGN_UP(info->initrd_start + initrd_size,
1171                                           align);
1172            if (info->dtb_start >= ram_end) {
1173                error_report("Not enough space for DTB after kernel/initrd");
1174                exit(1);
1175            }
1176            fixupcontext[FIXUP_ARGPTR_LO] = info->dtb_start;
1177            fixupcontext[FIXUP_ARGPTR_HI] = info->dtb_start >> 32;
1178        } else {
1179            fixupcontext[FIXUP_ARGPTR_LO] =
1180                info->loader_start + KERNEL_ARGS_ADDR;
1181            fixupcontext[FIXUP_ARGPTR_HI] =
1182                (info->loader_start + KERNEL_ARGS_ADDR) >> 32;
1183            if (info->ram_size >= (1ULL << 32)) {
1184                error_report("RAM size must be less than 4GB to boot"
1185                             " Linux kernel using ATAGS (try passing a device tree"
1186                             " using -dtb)");
1187                exit(1);
1188            }
1189        }
1190        fixupcontext[FIXUP_ENTRYPOINT_LO] = entry;
1191        fixupcontext[FIXUP_ENTRYPOINT_HI] = entry >> 32;
1192
1193        write_bootloader("bootloader", info->loader_start,
1194                         primary_loader, fixupcontext, as);
1195
1196        if (info->nb_cpus > 1) {
1197            info->write_secondary_boot(cpu, info);
1198        }
1199        if (info->write_board_setup) {
1200            info->write_board_setup(cpu, info);
1201        }
1202
1203        /*
1204         * Notify devices which need to fake up firmware initialization
1205         * that we're doing a direct kernel boot.
1206         */
1207        object_child_foreach_recursive(object_get_root(),
1208                                       do_arm_linux_init, info);
1209    }
1210    info->is_linux = is_linux;
1211
1212    for (cs = first_cpu; cs; cs = CPU_NEXT(cs)) {
1213        ARM_CPU(cs)->env.boot_info = info;
1214    }
1215}
1216
1217static void arm_setup_firmware_boot(ARMCPU *cpu, struct arm_boot_info *info)
1218{
1219    /* Set up for booting firmware (which might load a kernel via fw_cfg) */
1220
1221    if (have_dtb(info)) {
1222        /*
1223         * If we have a device tree blob, but no kernel to supply it to (or
1224         * the kernel is supposed to be loaded by the bootloader), copy the
1225         * DTB to the base of RAM for the bootloader to pick up.
1226         */
1227        info->dtb_start = info->loader_start;
1228    }
1229
1230    if (info->kernel_filename) {
1231        FWCfgState *fw_cfg;
1232        bool try_decompressing_kernel;
1233
1234        fw_cfg = fw_cfg_find();
1235        try_decompressing_kernel = arm_feature(&cpu->env,
1236                                               ARM_FEATURE_AARCH64);
1237
1238        /*
1239         * Expose the kernel, the command line, and the initrd in fw_cfg.
1240         * We don't process them here at all, it's all left to the
1241         * firmware.
1242         */
1243        load_image_to_fw_cfg(fw_cfg,
1244                             FW_CFG_KERNEL_SIZE, FW_CFG_KERNEL_DATA,
1245                             info->kernel_filename,
1246                             try_decompressing_kernel);
1247        load_image_to_fw_cfg(fw_cfg,
1248                             FW_CFG_INITRD_SIZE, FW_CFG_INITRD_DATA,
1249                             info->initrd_filename, false);
1250
1251        if (info->kernel_cmdline) {
1252            fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
1253                           strlen(info->kernel_cmdline) + 1);
1254            fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA,
1255                              info->kernel_cmdline);
1256        }
1257    }
1258
1259    /*
1260     * We will start from address 0 (typically a boot ROM image) in the
1261     * same way as hardware. Leave env->boot_info NULL, so that
1262     * do_cpu_reset() knows it does not need to alter the PC on reset.
1263     */
1264}
1265
1266void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
1267{
1268    CPUState *cs;
1269    AddressSpace *as = arm_boot_address_space(cpu, info);
1270
1271    /*
1272     * CPU objects (unlike devices) are not automatically reset on system
1273     * reset, so we must always register a handler to do so. If we're
1274     * actually loading a kernel, the handler is also responsible for
1275     * arranging that we start it correctly.
1276     */
1277    for (cs = first_cpu; cs; cs = CPU_NEXT(cs)) {
1278        qemu_register_reset(do_cpu_reset, ARM_CPU(cs));
1279    }
1280
1281    /*
1282     * The board code is not supposed to set secure_board_setup unless
1283     * running its code in secure mode is actually possible, and KVM
1284     * doesn't support secure.
1285     */
1286    assert(!(info->secure_board_setup && kvm_enabled()));
1287
1288    info->dtb_filename = qemu_opt_get(qemu_get_machine_opts(), "dtb");
1289    info->dtb_limit = 0;
1290
1291    /* Load the kernel.  */
1292    if (!info->kernel_filename || info->firmware_loaded) {
1293        arm_setup_firmware_boot(cpu, info);
1294    } else {
1295        arm_setup_direct_kernel_boot(cpu, info);
1296    }
1297
1298    if (!info->skip_dtb_autoload && have_dtb(info)) {
1299        if (arm_load_dtb(info->dtb_start, info, info->dtb_limit, as) < 0) {
1300            exit(1);
1301        }
1302    }
1303}
1304
1305static const TypeInfo arm_linux_boot_if_info = {
1306    .name = TYPE_ARM_LINUX_BOOT_IF,
1307    .parent = TYPE_INTERFACE,
1308    .class_size = sizeof(ARMLinuxBootIfClass),
1309};
1310
1311static void arm_linux_boot_register_types(void)
1312{
1313    type_register_static(&arm_linux_boot_if_info);
1314}
1315
1316type_init(arm_linux_boot_register_types)
1317