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28#include "qemu/osdep.h"
29#include "qapi/error.h"
30#include "hw/hw.h"
31#include "ui/console.h"
32#include "hw/arm/omap.h"
33#include "hw/boards.h"
34#include "hw/arm/boot.h"
35#include "hw/block/flash.h"
36#include "sysemu/qtest.h"
37#include "exec/address-spaces.h"
38#include "cpu.h"
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65static uint64_t static_read(void *opaque, hwaddr offset,
66 unsigned size)
67{
68 uint32_t *val = (uint32_t *) opaque;
69 uint32_t mask = (4 / size) - 1;
70
71 return *val >> ((offset & mask) << 3);
72}
73
74static void static_write(void *opaque, hwaddr offset,
75 uint64_t value, unsigned size)
76{
77#ifdef SPY
78 printf("%s: value %" PRIx64 " %u bytes written at 0x%x\n",
79 __func__, value, size, (int)offset);
80#endif
81}
82
83static const MemoryRegionOps static_ops = {
84 .read = static_read,
85 .write = static_write,
86 .endianness = DEVICE_NATIVE_ENDIAN,
87};
88
89#define sdram_size 0x02000000
90#define sector_size (128 * 1024)
91#define flash0_size (16 * 1024 * 1024)
92#define flash1_size ( 8 * 1024 * 1024)
93#define flash2_size (32 * 1024 * 1024)
94#define total_ram_v1 (sdram_size + flash0_size + flash1_size + OMAP15XX_SRAM_SIZE)
95#define total_ram_v2 (sdram_size + flash2_size + OMAP15XX_SRAM_SIZE)
96
97static struct arm_boot_info sx1_binfo = {
98 .loader_start = OMAP_EMIFF_BASE,
99 .ram_size = sdram_size,
100 .board_id = 0x265,
101};
102
103static void sx1_init(MachineState *machine, const int version)
104{
105 struct omap_mpu_state_s *mpu;
106 MemoryRegion *address_space = get_system_memory();
107 MemoryRegion *flash = g_new(MemoryRegion, 1);
108 MemoryRegion *cs = g_new(MemoryRegion, 4);
109 static uint32_t cs0val = 0x00213090;
110 static uint32_t cs1val = 0x00215070;
111 static uint32_t cs2val = 0x00001139;
112 static uint32_t cs3val = 0x00001139;
113 DriveInfo *dinfo;
114 int fl_idx;
115 uint32_t flash_size = flash0_size;
116 int be;
117
118 if (version == 2) {
119 flash_size = flash2_size;
120 }
121
122 mpu = omap310_mpu_init(address_space, sx1_binfo.ram_size,
123 machine->cpu_type);
124
125
126 memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size,
127 &error_fatal);
128 memory_region_set_readonly(flash, true);
129 memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash);
130
131 memory_region_init_io(&cs[0], NULL, &static_ops, &cs0val,
132 "sx1.cs0", OMAP_CS0_SIZE - flash_size);
133 memory_region_add_subregion(address_space,
134 OMAP_CS0_BASE + flash_size, &cs[0]);
135
136
137 memory_region_init_io(&cs[2], NULL, &static_ops, &cs2val,
138 "sx1.cs2", OMAP_CS2_SIZE);
139 memory_region_add_subregion(address_space,
140 OMAP_CS2_BASE, &cs[2]);
141
142 memory_region_init_io(&cs[3], NULL, &static_ops, &cs3val,
143 "sx1.cs3", OMAP_CS3_SIZE);
144 memory_region_add_subregion(address_space,
145 OMAP_CS2_BASE, &cs[3]);
146
147 fl_idx = 0;
148#ifdef TARGET_WORDS_BIGENDIAN
149 be = 1;
150#else
151 be = 0;
152#endif
153
154 if ((dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
155 if (!pflash_cfi01_register(OMAP_CS0_BASE,
156 "omap_sx1.flash0-1", flash_size,
157 blk_by_legacy_dinfo(dinfo),
158 sector_size, 4, 0, 0, 0, 0, be)) {
159 fprintf(stderr, "qemu: Error registering flash memory %d.\n",
160 fl_idx);
161 }
162 fl_idx++;
163 }
164
165 if ((version == 1) &&
166 (dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
167 MemoryRegion *flash_1 = g_new(MemoryRegion, 1);
168 memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0",
169 flash1_size, &error_fatal);
170 memory_region_set_readonly(flash_1, true);
171 memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1);
172
173 memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val,
174 "sx1.cs1", OMAP_CS1_SIZE - flash1_size);
175 memory_region_add_subregion(address_space,
176 OMAP_CS1_BASE + flash1_size, &cs[1]);
177
178 if (!pflash_cfi01_register(OMAP_CS1_BASE,
179 "omap_sx1.flash1-1", flash1_size,
180 blk_by_legacy_dinfo(dinfo),
181 sector_size, 4, 0, 0, 0, 0, be)) {
182 fprintf(stderr, "qemu: Error registering flash memory %d.\n",
183 fl_idx);
184 }
185 fl_idx++;
186 } else {
187 memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val,
188 "sx1.cs1", OMAP_CS1_SIZE);
189 memory_region_add_subregion(address_space,
190 OMAP_CS1_BASE, &cs[1]);
191 }
192
193 if (!machine->kernel_filename && !fl_idx && !qtest_enabled()) {
194 error_report("Kernel or Flash image must be specified");
195 exit(1);
196 }
197
198
199 sx1_binfo.kernel_filename = machine->kernel_filename;
200 sx1_binfo.kernel_cmdline = machine->kernel_cmdline;
201 sx1_binfo.initrd_filename = machine->initrd_filename;
202 arm_load_kernel(mpu->cpu, &sx1_binfo);
203
204
205
206}
207
208static void sx1_init_v1(MachineState *machine)
209{
210 sx1_init(machine, 1);
211}
212
213static void sx1_init_v2(MachineState *machine)
214{
215 sx1_init(machine, 2);
216}
217
218static void sx1_machine_v2_class_init(ObjectClass *oc, void *data)
219{
220 MachineClass *mc = MACHINE_CLASS(oc);
221
222 mc->desc = "Siemens SX1 (OMAP310) V2";
223 mc->init = sx1_init_v2;
224 mc->ignore_memory_transaction_failures = true;
225 mc->default_cpu_type = ARM_CPU_TYPE_NAME("ti925t");
226}
227
228static const TypeInfo sx1_machine_v2_type = {
229 .name = MACHINE_TYPE_NAME("sx1"),
230 .parent = TYPE_MACHINE,
231 .class_init = sx1_machine_v2_class_init,
232};
233
234static void sx1_machine_v1_class_init(ObjectClass *oc, void *data)
235{
236 MachineClass *mc = MACHINE_CLASS(oc);
237
238 mc->desc = "Siemens SX1 (OMAP310) V1";
239 mc->init = sx1_init_v1;
240 mc->ignore_memory_transaction_failures = true;
241 mc->default_cpu_type = ARM_CPU_TYPE_NAME("ti925t");
242}
243
244static const TypeInfo sx1_machine_v1_type = {
245 .name = MACHINE_TYPE_NAME("sx1-v1"),
246 .parent = TYPE_MACHINE,
247 .class_init = sx1_machine_v1_class_init,
248};
249
250static void sx1_machine_init(void)
251{
252 type_register_static(&sx1_machine_v1_type);
253 type_register_static(&sx1_machine_v2_type);
254}
255
256type_init(sx1_machine_init)
257