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25#include "qemu/osdep.h"
26#include "qapi/error.h"
27#include "qemu/module.h"
28#include "hw/arm/boot.h"
29#include "exec/address-spaces.h"
30#include "hw/arm/stm32f205_soc.h"
31
32
33static const uint32_t timer_addr[STM_NUM_TIMERS] = { 0x40000000, 0x40000400,
34 0x40000800, 0x40000C00 };
35static const uint32_t usart_addr[STM_NUM_USARTS] = { 0x40011000, 0x40004400,
36 0x40004800, 0x40004C00, 0x40005000, 0x40011400 };
37static const uint32_t adc_addr[STM_NUM_ADCS] = { 0x40012000, 0x40012100,
38 0x40012200 };
39static const uint32_t spi_addr[STM_NUM_SPIS] = { 0x40013000, 0x40003800,
40 0x40003C00 };
41
42static const int timer_irq[STM_NUM_TIMERS] = {28, 29, 30, 50};
43static const int usart_irq[STM_NUM_USARTS] = {37, 38, 39, 52, 53, 71};
44#define ADC_IRQ 18
45static const int spi_irq[STM_NUM_SPIS] = {35, 36, 51};
46
47static void stm32f205_soc_initfn(Object *obj)
48{
49 STM32F205State *s = STM32F205_SOC(obj);
50 int i;
51
52 sysbus_init_child_obj(obj, "armv7m", &s->armv7m, sizeof(s->armv7m),
53 TYPE_ARMV7M);
54
55 sysbus_init_child_obj(obj, "syscfg", &s->syscfg, sizeof(s->syscfg),
56 TYPE_STM32F2XX_SYSCFG);
57
58 for (i = 0; i < STM_NUM_USARTS; i++) {
59 sysbus_init_child_obj(obj, "usart[*]", &s->usart[i],
60 sizeof(s->usart[i]), TYPE_STM32F2XX_USART);
61 }
62
63 for (i = 0; i < STM_NUM_TIMERS; i++) {
64 sysbus_init_child_obj(obj, "timer[*]", &s->timer[i],
65 sizeof(s->timer[i]), TYPE_STM32F2XX_TIMER);
66 }
67
68 s->adc_irqs = OR_IRQ(object_new(TYPE_OR_IRQ));
69
70 for (i = 0; i < STM_NUM_ADCS; i++) {
71 sysbus_init_child_obj(obj, "adc[*]", &s->adc[i], sizeof(s->adc[i]),
72 TYPE_STM32F2XX_ADC);
73 }
74
75 for (i = 0; i < STM_NUM_SPIS; i++) {
76 sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], sizeof(s->spi[i]),
77 TYPE_STM32F2XX_SPI);
78 }
79}
80
81static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
82{
83 STM32F205State *s = STM32F205_SOC(dev_soc);
84 DeviceState *dev, *armv7m;
85 SysBusDevice *busdev;
86 Error *err = NULL;
87 int i;
88
89 MemoryRegion *system_memory = get_system_memory();
90 MemoryRegion *sram = g_new(MemoryRegion, 1);
91 MemoryRegion *flash = g_new(MemoryRegion, 1);
92 MemoryRegion *flash_alias = g_new(MemoryRegion, 1);
93
94 memory_region_init_ram(flash, NULL, "STM32F205.flash", FLASH_SIZE,
95 &error_fatal);
96 memory_region_init_alias(flash_alias, NULL, "STM32F205.flash.alias",
97 flash, 0, FLASH_SIZE);
98
99 memory_region_set_readonly(flash, true);
100 memory_region_set_readonly(flash_alias, true);
101
102 memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, flash);
103 memory_region_add_subregion(system_memory, 0, flash_alias);
104
105 memory_region_init_ram(sram, NULL, "STM32F205.sram", SRAM_SIZE,
106 &error_fatal);
107 memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram);
108
109 armv7m = DEVICE(&s->armv7m);
110 qdev_prop_set_uint32(armv7m, "num-irq", 96);
111 qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type);
112 qdev_prop_set_bit(armv7m, "enable-bitband", true);
113 object_property_set_link(OBJECT(&s->armv7m), OBJECT(get_system_memory()),
114 "memory", &error_abort);
115 object_property_set_bool(OBJECT(&s->armv7m), true, "realized", &err);
116 if (err != NULL) {
117 error_propagate(errp, err);
118 return;
119 }
120
121
122 dev = DEVICE(&s->syscfg);
123 object_property_set_bool(OBJECT(&s->syscfg), true, "realized", &err);
124 if (err != NULL) {
125 error_propagate(errp, err);
126 return;
127 }
128 busdev = SYS_BUS_DEVICE(dev);
129 sysbus_mmio_map(busdev, 0, 0x40013800);
130 sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, 71));
131
132
133 for (i = 0; i < STM_NUM_USARTS; i++) {
134 dev = DEVICE(&(s->usart[i]));
135 qdev_prop_set_chr(dev, "chardev", serial_hd(i));
136 object_property_set_bool(OBJECT(&s->usart[i]), true, "realized", &err);
137 if (err != NULL) {
138 error_propagate(errp, err);
139 return;
140 }
141 busdev = SYS_BUS_DEVICE(dev);
142 sysbus_mmio_map(busdev, 0, usart_addr[i]);
143 sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, usart_irq[i]));
144 }
145
146
147 for (i = 0; i < STM_NUM_TIMERS; i++) {
148 dev = DEVICE(&(s->timer[i]));
149 qdev_prop_set_uint64(dev, "clock-frequency", 1000000000);
150 object_property_set_bool(OBJECT(&s->timer[i]), true, "realized", &err);
151 if (err != NULL) {
152 error_propagate(errp, err);
153 return;
154 }
155 busdev = SYS_BUS_DEVICE(dev);
156 sysbus_mmio_map(busdev, 0, timer_addr[i]);
157 sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, timer_irq[i]));
158 }
159
160
161 object_property_set_int(OBJECT(s->adc_irqs), STM_NUM_ADCS,
162 "num-lines", &err);
163 object_property_set_bool(OBJECT(s->adc_irqs), true, "realized", &err);
164 if (err != NULL) {
165 error_propagate(errp, err);
166 return;
167 }
168 qdev_connect_gpio_out(DEVICE(s->adc_irqs), 0,
169 qdev_get_gpio_in(armv7m, ADC_IRQ));
170
171 for (i = 0; i < STM_NUM_ADCS; i++) {
172 dev = DEVICE(&(s->adc[i]));
173 object_property_set_bool(OBJECT(&s->adc[i]), true, "realized", &err);
174 if (err != NULL) {
175 error_propagate(errp, err);
176 return;
177 }
178 busdev = SYS_BUS_DEVICE(dev);
179 sysbus_mmio_map(busdev, 0, adc_addr[i]);
180 sysbus_connect_irq(busdev, 0,
181 qdev_get_gpio_in(DEVICE(s->adc_irqs), i));
182 }
183
184
185 for (i = 0; i < STM_NUM_SPIS; i++) {
186 dev = DEVICE(&(s->spi[i]));
187 object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err);
188 if (err != NULL) {
189 error_propagate(errp, err);
190 return;
191 }
192 busdev = SYS_BUS_DEVICE(dev);
193 sysbus_mmio_map(busdev, 0, spi_addr[i]);
194 sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, spi_irq[i]));
195 }
196}
197
198static Property stm32f205_soc_properties[] = {
199 DEFINE_PROP_STRING("cpu-type", STM32F205State, cpu_type),
200 DEFINE_PROP_END_OF_LIST(),
201};
202
203static void stm32f205_soc_class_init(ObjectClass *klass, void *data)
204{
205 DeviceClass *dc = DEVICE_CLASS(klass);
206
207 dc->realize = stm32f205_soc_realize;
208 dc->props = stm32f205_soc_properties;
209}
210
211static const TypeInfo stm32f205_soc_info = {
212 .name = TYPE_STM32F205_SOC,
213 .parent = TYPE_SYS_BUS_DEVICE,
214 .instance_size = sizeof(STM32F205State),
215 .instance_init = stm32f205_soc_initfn,
216 .class_init = stm32f205_soc_class_init,
217};
218
219static void stm32f205_soc_types(void)
220{
221 type_register_static(&stm32f205_soc_info);
222}
223
224type_init(stm32f205_soc_types)
225
