LXR qemu/hw/char/debugcon.c

   1/*
   2 * QEMU Bochs-style debug console ("port E9") emulation
   3 *
   4 * Copyright (c) 2003-2004 Fabrice Bellard
   5 * Copyright (c) 2008 Citrix Systems, Inc.
   6 * Copyright (c) Intel Corporation; author: H. Peter Anvin
   7 *
   8 * Permission is hereby granted, free of charge, to any person obtaining a copy
   9 * of this software and associated documentation files (the "Software"), to deal
  10 * in the Software without restriction, including without limitation the rights
  11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12 * copies of the Software, and to permit persons to whom the Software is
  13 * furnished to do so, subject to the following conditions:
  14 *
  15 * The above copyright notice and this permission notice shall be included in
  16 * all copies or substantial portions of the Software.
  17 *
  18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24 * THE SOFTWARE.
  25 */
  26
  27#include "qemu/osdep.h"
  28#include "qapi/error.h"
  29#include "qemu/module.h"
  30#include "hw/hw.h"
  31#include "chardev/char-fe.h"
  32#include "hw/isa/isa.h"
  33
  34#define TYPE_ISA_DEBUGCON_DEVICE "isa-debugcon"
  35#define ISA_DEBUGCON_DEVICE(obj) \
  36     OBJECT_CHECK(ISADebugconState, (obj), TYPE_ISA_DEBUGCON_DEVICE)
  37
  38//#define DEBUG_DEBUGCON
  39
  40typedef struct DebugconState {
  41    MemoryRegion io;
  42    CharBackend chr;
  43    uint32_t readback;
  44} DebugconState;
  45
  46typedef struct ISADebugconState {
  47    ISADevice parent_obj;
  48
  49    uint32_t iobase;
  50    DebugconState state;
  51} ISADebugconState;
  52
  53static void debugcon_ioport_write(void *opaque, hwaddr addr, uint64_t val,
  54                                  unsigned width)
  55{
  56    DebugconState *s = opaque;
  57    unsigned char ch = val;
  58
  59#ifdef DEBUG_DEBUGCON
  60    printf(" [debugcon: write addr=0x%04" HWADDR_PRIx " val=0x%02" PRIx64 "]\n", addr, val);
  61#endif
  62
  63    /* XXX this blocks entire thread. Rewrite to use
  64     * qemu_chr_fe_write and background I/O callbacks */
  65    qemu_chr_fe_write_all(&s->chr, &ch, 1);
  66}
  67
  68
  69static uint64_t debugcon_ioport_read(void *opaque, hwaddr addr, unsigned width)
  70{
  71    DebugconState *s = opaque;
  72
  73#ifdef DEBUG_DEBUGCON
  74    printf("debugcon: read addr=0x%04" HWADDR_PRIx "\n", addr);
  75#endif
  76
  77    return s->readback;
  78}
  79
  80static const MemoryRegionOps debugcon_ops = {
  81    .read = debugcon_ioport_read,
  82    .write = debugcon_ioport_write,
  83    .valid.min_access_size = 1,
  84    .valid.max_access_size = 1,
  85    .endianness = DEVICE_LITTLE_ENDIAN,
  86};
  87
  88static void debugcon_realize_core(DebugconState *s, Error **errp)
  89{
  90    if (!qemu_chr_fe_backend_connected(&s->chr)) {
  91        error_setg(errp, "Can't create debugcon device, empty char device");
  92        return;
  93    }
  94
  95    qemu_chr_fe_set_handlers(&s->chr, NULL, NULL, NULL, NULL, s, NULL, true);
  96}
  97
  98static void debugcon_isa_realizefn(DeviceState *dev, Error **errp)
  99{
 100    ISADevice *d = ISA_DEVICE(dev);
 101    ISADebugconState *isa = ISA_DEBUGCON_DEVICE(dev);
 102    DebugconState *s = &isa->state;
 103    Error *err = NULL;
 104
 105    debugcon_realize_core(s, &err);
 106    if (err != NULL) {
 107        error_propagate(errp, err);
 108        return;
 109    }
 110    memory_region_init_io(&s->io, OBJECT(dev), &debugcon_ops, s,
 111                          TYPE_ISA_DEBUGCON_DEVICE, 1);
 112    memory_region_add_subregion(isa_address_space_io(d),
 113                                isa->iobase, &s->io);
 114}
 115
 116static Property debugcon_isa_properties[] = {
 117    DEFINE_PROP_UINT32("iobase", ISADebugconState, iobase, 0xe9),
 118    DEFINE_PROP_CHR("chardev",  ISADebugconState, state.chr),
 119    DEFINE_PROP_UINT32("readback", ISADebugconState, state.readback, 0xe9),
 120    DEFINE_PROP_END_OF_LIST(),
 121};
 122
 123static void debugcon_isa_class_initfn(ObjectClass *klass, void *data)
 124{
 125    DeviceClass *dc = DEVICE_CLASS(klass);
 126
 127    dc->realize = debugcon_isa_realizefn;
 128    dc->props = debugcon_isa_properties;
 129    set_bit(DEVICE_CATEGORY_MISC, dc->categories);
 130}
 131
 132static const TypeInfo debugcon_isa_info = {
 133    .name          = TYPE_ISA_DEBUGCON_DEVICE,
 134    .parent        = TYPE_ISA_DEVICE,
 135    .instance_size = sizeof(ISADebugconState),
 136    .class_init    = debugcon_isa_class_initfn,
 137};
 138
 139static void debugcon_register_types(void)
 140{
 141    type_register_static(&debugcon_isa_info);
 142}
 143
 144type_init(debugcon_register_types)
 145