qemu/hw/i386/kvm/i8259.c
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   1/*
   2 * KVM in-kernel PIC (i8259) support
   3 *
   4 * Copyright (c) 2011 Siemens AG
   5 *
   6 * Authors:
   7 *  Jan Kiszka          <jan.kiszka@siemens.com>
   8 *
   9 * This work is licensed under the terms of the GNU GPL version 2.
  10 * See the COPYING file in the top-level directory.
  11 */
  12
  13#include "qemu/osdep.h"
  14#include "hw/isa/i8259_internal.h"
  15#include "qemu/module.h"
  16#include "hw/i386/apic_internal.h"
  17#include "sysemu/kvm.h"
  18
  19#define TYPE_KVM_I8259 "kvm-i8259"
  20#define KVM_PIC_CLASS(class) \
  21    OBJECT_CLASS_CHECK(KVMPICClass, (class), TYPE_KVM_I8259)
  22#define KVM_PIC_GET_CLASS(obj) \
  23    OBJECT_GET_CLASS(KVMPICClass, (obj), TYPE_KVM_I8259)
  24
  25/**
  26 * KVMPICClass:
  27 * @parent_realize: The parent's realizefn.
  28 */
  29typedef struct KVMPICClass {
  30    PICCommonClass parent_class;
  31
  32    DeviceRealize parent_realize;
  33} KVMPICClass;
  34
  35static void kvm_pic_get(PICCommonState *s)
  36{
  37    struct kvm_irqchip chip;
  38    struct kvm_pic_state *kpic;
  39    int ret;
  40
  41    chip.chip_id = s->master ? KVM_IRQCHIP_PIC_MASTER : KVM_IRQCHIP_PIC_SLAVE;
  42    ret = kvm_vm_ioctl(kvm_state, KVM_GET_IRQCHIP, &chip);
  43    if (ret < 0) {
  44        fprintf(stderr, "KVM_GET_IRQCHIP failed: %s\n", strerror(ret));
  45        abort();
  46    }
  47
  48    kpic = &chip.chip.pic;
  49
  50    s->last_irr = kpic->last_irr;
  51    s->irr = kpic->irr;
  52    s->imr = kpic->imr;
  53    s->isr = kpic->isr;
  54    s->priority_add = kpic->priority_add;
  55    s->irq_base = kpic->irq_base;
  56    s->read_reg_select = kpic->read_reg_select;
  57    s->poll = kpic->poll;
  58    s->special_mask = kpic->special_mask;
  59    s->init_state = kpic->init_state;
  60    s->auto_eoi = kpic->auto_eoi;
  61    s->rotate_on_auto_eoi = kpic->rotate_on_auto_eoi;
  62    s->special_fully_nested_mode = kpic->special_fully_nested_mode;
  63    s->init4 = kpic->init4;
  64    s->elcr = kpic->elcr;
  65    s->elcr_mask = kpic->elcr_mask;
  66}
  67
  68static void kvm_pic_put(PICCommonState *s)
  69{
  70    struct kvm_irqchip chip;
  71    struct kvm_pic_state *kpic;
  72    int ret;
  73
  74    chip.chip_id = s->master ? KVM_IRQCHIP_PIC_MASTER : KVM_IRQCHIP_PIC_SLAVE;
  75
  76    kpic = &chip.chip.pic;
  77
  78    kpic->last_irr = s->last_irr;
  79    kpic->irr = s->irr;
  80    kpic->imr = s->imr;
  81    kpic->isr = s->isr;
  82    kpic->priority_add = s->priority_add;
  83    kpic->irq_base = s->irq_base;
  84    kpic->read_reg_select = s->read_reg_select;
  85    kpic->poll = s->poll;
  86    kpic->special_mask = s->special_mask;
  87    kpic->init_state = s->init_state;
  88    kpic->auto_eoi = s->auto_eoi;
  89    kpic->rotate_on_auto_eoi = s->rotate_on_auto_eoi;
  90    kpic->special_fully_nested_mode = s->special_fully_nested_mode;
  91    kpic->init4 = s->init4;
  92    kpic->elcr = s->elcr;
  93    kpic->elcr_mask = s->elcr_mask;
  94
  95    ret = kvm_vm_ioctl(kvm_state, KVM_SET_IRQCHIP, &chip);
  96    if (ret < 0) {
  97        fprintf(stderr, "KVM_SET_IRQCHIP failed: %s\n", strerror(ret));
  98        abort();
  99    }
 100}
 101
 102static void kvm_pic_reset(DeviceState *dev)
 103{
 104    PICCommonState *s = PIC_COMMON(dev);
 105
 106    s->elcr = 0;
 107    pic_reset_common(s);
 108
 109    kvm_pic_put(s);
 110}
 111
 112static void kvm_pic_set_irq(void *opaque, int irq, int level)
 113{
 114    int delivered;
 115
 116    pic_stat_update_irq(irq, level);
 117    delivered = kvm_set_irq(kvm_state, irq, level);
 118    apic_report_irq_delivered(delivered);
 119}
 120
 121static void kvm_pic_realize(DeviceState *dev, Error **errp)
 122{
 123    PICCommonState *s = PIC_COMMON(dev);
 124    KVMPICClass *kpc = KVM_PIC_GET_CLASS(dev);
 125
 126    memory_region_init_io(&s->base_io, OBJECT(dev), NULL, NULL, "kvm-pic", 2);
 127    memory_region_init_io(&s->elcr_io, OBJECT(dev), NULL, NULL, "kvm-elcr", 1);
 128
 129    kpc->parent_realize(dev, errp);
 130}
 131
 132qemu_irq *kvm_i8259_init(ISABus *bus)
 133{
 134    i8259_init_chip(TYPE_KVM_I8259, bus, true);
 135    i8259_init_chip(TYPE_KVM_I8259, bus, false);
 136
 137    return qemu_allocate_irqs(kvm_pic_set_irq, NULL, ISA_NUM_IRQS);
 138}
 139
 140static void kvm_i8259_class_init(ObjectClass *klass, void *data)
 141{
 142    KVMPICClass *kpc = KVM_PIC_CLASS(klass);
 143    PICCommonClass *k = PIC_COMMON_CLASS(klass);
 144    DeviceClass *dc = DEVICE_CLASS(klass);
 145
 146    dc->reset     = kvm_pic_reset;
 147    device_class_set_parent_realize(dc, kvm_pic_realize, &kpc->parent_realize);
 148    k->pre_save   = kvm_pic_get;
 149    k->post_load  = kvm_pic_put;
 150}
 151
 152static const TypeInfo kvm_i8259_info = {
 153    .name = TYPE_KVM_I8259,
 154    .parent = TYPE_PIC_COMMON,
 155    .instance_size = sizeof(PICCommonState),
 156    .class_init = kvm_i8259_class_init,
 157    .class_size = sizeof(KVMPICClass),
 158};
 159
 160static void kvm_pic_register_types(void)
 161{
 162    type_register_static(&kvm_i8259_info);
 163}
 164
 165type_init(kvm_pic_register_types)
 166