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21#include "qemu/osdep.h"
22#include "qapi/error.h"
23#include "qemu/module.h"
24#include "hw/intc/arm_gicv3_its_common.h"
25#include "sysemu/sysemu.h"
26#include "sysemu/kvm.h"
27#include "kvm_arm.h"
28#include "migration/blocker.h"
29
30#define TYPE_KVM_ARM_ITS "arm-its-kvm"
31#define KVM_ARM_ITS(obj) OBJECT_CHECK(GICv3ITSState, (obj), TYPE_KVM_ARM_ITS)
32#define KVM_ARM_ITS_CLASS(klass) \
33 OBJECT_CLASS_CHECK(KVMARMITSClass, (klass), TYPE_KVM_ARM_ITS)
34#define KVM_ARM_ITS_GET_CLASS(obj) \
35 OBJECT_GET_CLASS(KVMARMITSClass, (obj), TYPE_KVM_ARM_ITS)
36
37typedef struct KVMARMITSClass {
38 GICv3ITSCommonClass parent_class;
39 void (*parent_reset)(DeviceState *dev);
40} KVMARMITSClass;
41
42
43static int kvm_its_send_msi(GICv3ITSState *s, uint32_t value, uint16_t devid)
44{
45 struct kvm_msi msi;
46
47 if (unlikely(!s->translater_gpa_known)) {
48 MemoryRegion *mr = &s->iomem_its_translation;
49 MemoryRegionSection mrs;
50
51 mrs = memory_region_find(mr, 0, 1);
52 memory_region_unref(mrs.mr);
53 s->gits_translater_gpa = mrs.offset_within_address_space + 0x40;
54 s->translater_gpa_known = true;
55 }
56
57 msi.address_lo = extract64(s->gits_translater_gpa, 0, 32);
58 msi.address_hi = extract64(s->gits_translater_gpa, 32, 32);
59 msi.data = le32_to_cpu(value);
60 msi.flags = KVM_MSI_VALID_DEVID;
61 msi.devid = devid;
62 memset(msi.pad, 0, sizeof(msi.pad));
63
64 return kvm_vm_ioctl(kvm_state, KVM_SIGNAL_MSI, &msi);
65}
66
67
68
69
70
71
72
73static void vm_change_state_handler(void *opaque, int running,
74 RunState state)
75{
76 GICv3ITSState *s = (GICv3ITSState *)opaque;
77 Error *err = NULL;
78
79 if (running) {
80 return;
81 }
82
83 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
84 KVM_DEV_ARM_ITS_SAVE_TABLES, NULL, true, &err);
85 if (err) {
86 error_report_err(err);
87 }
88}
89
90static void kvm_arm_its_realize(DeviceState *dev, Error **errp)
91{
92 GICv3ITSState *s = ARM_GICV3_ITS_COMMON(dev);
93 Error *local_err = NULL;
94
95 s->dev_fd = kvm_create_device(kvm_state, KVM_DEV_TYPE_ARM_VGIC_ITS, false);
96 if (s->dev_fd < 0) {
97 error_setg_errno(errp, -s->dev_fd, "error creating in-kernel ITS");
98 return;
99 }
100
101
102 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
103 KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true, &error_abort);
104
105
106 kvm_arm_register_device(&s->iomem_its_cntrl, -1, KVM_DEV_ARM_VGIC_GRP_ADDR,
107 KVM_VGIC_ITS_ADDR_TYPE, s->dev_fd, 0);
108
109 gicv3_its_init_mmio(s, NULL);
110
111 if (!kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
112 GITS_CTLR)) {
113 error_setg(&s->migration_blocker, "This operating system kernel "
114 "does not support vITS migration");
115 migrate_add_blocker(s->migration_blocker, &local_err);
116 if (local_err) {
117 error_propagate(errp, local_err);
118 error_free(s->migration_blocker);
119 return;
120 }
121 } else {
122 qemu_add_vm_change_state_handler(vm_change_state_handler, s);
123 }
124
125 kvm_msi_use_devid = true;
126 kvm_gsi_direct_mapping = false;
127 kvm_msi_via_irqfd_allowed = kvm_irqfds_enabled();
128}
129
130
131
132
133
134
135
136static void kvm_arm_its_pre_save(GICv3ITSState *s)
137{
138 int i;
139
140 for (i = 0; i < 8; i++) {
141 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
142 GITS_BASER + i * 8, &s->baser[i], false,
143 &error_abort);
144 }
145
146 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
147 GITS_CTLR, &s->ctlr, false, &error_abort);
148
149 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
150 GITS_CBASER, &s->cbaser, false, &error_abort);
151
152 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
153 GITS_CREADR, &s->creadr, false, &error_abort);
154
155 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
156 GITS_CWRITER, &s->cwriter, false, &error_abort);
157
158 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
159 GITS_IIDR, &s->iidr, false, &error_abort);
160}
161
162
163
164
165static void kvm_arm_its_post_load(GICv3ITSState *s)
166{
167 int i;
168
169 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
170 GITS_IIDR, &s->iidr, true, &error_abort);
171
172
173
174
175
176 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
177 GITS_CBASER, &s->cbaser, true, &error_abort);
178
179 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
180 GITS_CREADR, &s->creadr, true, &error_abort);
181
182 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
183 GITS_CWRITER, &s->cwriter, true, &error_abort);
184
185
186 for (i = 0; i < 8; i++) {
187 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
188 GITS_BASER + i * 8, &s->baser[i], true,
189 &error_abort);
190 }
191
192 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
193 KVM_DEV_ARM_ITS_RESTORE_TABLES, NULL, true,
194 &error_abort);
195
196 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
197 GITS_CTLR, &s->ctlr, true, &error_abort);
198}
199
200static void kvm_arm_its_reset(DeviceState *dev)
201{
202 GICv3ITSState *s = ARM_GICV3_ITS_COMMON(dev);
203 KVMARMITSClass *c = KVM_ARM_ITS_GET_CLASS(s);
204 int i;
205
206 c->parent_reset(dev);
207
208 if (kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
209 KVM_DEV_ARM_ITS_CTRL_RESET)) {
210 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
211 KVM_DEV_ARM_ITS_CTRL_RESET, NULL, true, &error_abort);
212 return;
213 }
214
215 warn_report("ITS KVM: full reset is not supported by the host kernel");
216
217 if (!kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
218 GITS_CTLR)) {
219 return;
220 }
221
222 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
223 GITS_CTLR, &s->ctlr, true, &error_abort);
224
225 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
226 GITS_CBASER, &s->cbaser, true, &error_abort);
227
228 for (i = 0; i < 8; i++) {
229 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
230 GITS_BASER + i * 8, &s->baser[i], true,
231 &error_abort);
232 }
233}
234
235static Property kvm_arm_its_props[] = {
236 DEFINE_PROP_LINK("parent-gicv3", GICv3ITSState, gicv3, "kvm-arm-gicv3",
237 GICv3State *),
238 DEFINE_PROP_END_OF_LIST(),
239};
240
241static void kvm_arm_its_class_init(ObjectClass *klass, void *data)
242{
243 DeviceClass *dc = DEVICE_CLASS(klass);
244 GICv3ITSCommonClass *icc = ARM_GICV3_ITS_COMMON_CLASS(klass);
245 KVMARMITSClass *ic = KVM_ARM_ITS_CLASS(klass);
246
247 dc->realize = kvm_arm_its_realize;
248 dc->props = kvm_arm_its_props;
249 device_class_set_parent_reset(dc, kvm_arm_its_reset, &ic->parent_reset);
250 icc->send_msi = kvm_its_send_msi;
251 icc->pre_save = kvm_arm_its_pre_save;
252 icc->post_load = kvm_arm_its_post_load;
253}
254
255static const TypeInfo kvm_arm_its_info = {
256 .name = TYPE_KVM_ARM_ITS,
257 .parent = TYPE_ARM_GICV3_ITS_COMMON,
258 .instance_size = sizeof(GICv3ITSState),
259 .class_init = kvm_arm_its_class_init,
260 .class_size = sizeof(KVMARMITSClass),
261};
262
263static void kvm_arm_its_register_types(void)
264{
265 type_register_static(&kvm_arm_its_info);
266}
267
268type_init(kvm_arm_its_register_types)
269