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10#include "qemu/osdep.h"
11#include "hw/sysbus.h"
12#include "qemu/log.h"
13#include "qemu/module.h"
14
15
16
17
18
19#define PL190_NUM_PRIO 17
20
21#define TYPE_PL190 "pl190"
22#define PL190(obj) OBJECT_CHECK(PL190State, (obj), TYPE_PL190)
23
24typedef struct PL190State {
25 SysBusDevice parent_obj;
26
27 MemoryRegion iomem;
28 uint32_t level;
29 uint32_t soft_level;
30 uint32_t irq_enable;
31 uint32_t fiq_select;
32 uint8_t vect_control[16];
33 uint32_t vect_addr[PL190_NUM_PRIO];
34
35 uint32_t prio_mask[PL190_NUM_PRIO + 1];
36 int protected;
37
38 int priority;
39 int prev_prio[PL190_NUM_PRIO];
40 qemu_irq irq;
41 qemu_irq fiq;
42} PL190State;
43
44static const unsigned char pl190_id[] =
45{ 0x90, 0x11, 0x04, 0x00, 0x0D, 0xf0, 0x05, 0xb1 };
46
47static inline uint32_t pl190_irq_level(PL190State *s)
48{
49 return (s->level | s->soft_level) & s->irq_enable & ~s->fiq_select;
50}
51
52
53static void pl190_update(PL190State *s)
54{
55 uint32_t level = pl190_irq_level(s);
56 int set;
57
58 set = (level & s->prio_mask[s->priority]) != 0;
59 qemu_set_irq(s->irq, set);
60 set = ((s->level | s->soft_level) & s->fiq_select) != 0;
61 qemu_set_irq(s->fiq, set);
62}
63
64static void pl190_set_irq(void *opaque, int irq, int level)
65{
66 PL190State *s = (PL190State *)opaque;
67
68 if (level)
69 s->level |= 1u << irq;
70 else
71 s->level &= ~(1u << irq);
72 pl190_update(s);
73}
74
75static void pl190_update_vectors(PL190State *s)
76{
77 uint32_t mask;
78 int i;
79 int n;
80
81 mask = 0;
82 for (i = 0; i < 16; i++)
83 {
84 s->prio_mask[i] = mask;
85 if (s->vect_control[i] & 0x20)
86 {
87 n = s->vect_control[i] & 0x1f;
88 mask |= 1 << n;
89 }
90 }
91 s->prio_mask[16] = mask;
92 pl190_update(s);
93}
94
95static uint64_t pl190_read(void *opaque, hwaddr offset,
96 unsigned size)
97{
98 PL190State *s = (PL190State *)opaque;
99 int i;
100
101 if (offset >= 0xfe0 && offset < 0x1000) {
102 return pl190_id[(offset - 0xfe0) >> 2];
103 }
104 if (offset >= 0x100 && offset < 0x140) {
105 return s->vect_addr[(offset - 0x100) >> 2];
106 }
107 if (offset >= 0x200 && offset < 0x240) {
108 return s->vect_control[(offset - 0x200) >> 2];
109 }
110 switch (offset >> 2) {
111 case 0:
112 return pl190_irq_level(s);
113 case 1:
114 return (s->level | s->soft_level) & s->fiq_select;
115 case 2:
116 return s->level | s->soft_level;
117 case 3:
118 return s->fiq_select;
119 case 4:
120 return s->irq_enable;
121 case 6:
122 return s->soft_level;
123 case 8:
124 return s->protected;
125 case 12:
126
127
128
129
130
131
132
133 for (i = 0; i < s->priority; i++) {
134 if ((s->level | s->soft_level) & s->prio_mask[i + 1]) {
135 break;
136 }
137 }
138
139
140
141 if (i == PL190_NUM_PRIO)
142 return s->vect_addr[16];
143 if (i < s->priority)
144 {
145 s->prev_prio[i] = s->priority;
146 s->priority = i;
147 pl190_update(s);
148 }
149 return s->vect_addr[s->priority];
150 case 13:
151 return s->vect_addr[16];
152 default:
153 qemu_log_mask(LOG_GUEST_ERROR,
154 "pl190_read: Bad offset %x\n", (int)offset);
155 return 0;
156 }
157}
158
159static void pl190_write(void *opaque, hwaddr offset,
160 uint64_t val, unsigned size)
161{
162 PL190State *s = (PL190State *)opaque;
163
164 if (offset >= 0x100 && offset < 0x140) {
165 s->vect_addr[(offset - 0x100) >> 2] = val;
166 pl190_update_vectors(s);
167 return;
168 }
169 if (offset >= 0x200 && offset < 0x240) {
170 s->vect_control[(offset - 0x200) >> 2] = val;
171 pl190_update_vectors(s);
172 return;
173 }
174 switch (offset >> 2) {
175 case 0:
176
177
178 break;
179 case 3:
180 s->fiq_select = val;
181 break;
182 case 4:
183 s->irq_enable |= val;
184 break;
185 case 5:
186 s->irq_enable &= ~val;
187 break;
188 case 6:
189 s->soft_level |= val;
190 break;
191 case 7:
192 s->soft_level &= ~val;
193 break;
194 case 8:
195
196 s->protected = val & 1;
197 break;
198 case 12:
199
200
201 if (s->priority < PL190_NUM_PRIO)
202 s->priority = s->prev_prio[s->priority];
203 break;
204 case 13:
205 s->vect_addr[16] = val;
206 break;
207 case 0xc0:
208 if (val) {
209 qemu_log_mask(LOG_UNIMP, "pl190: Test mode not implemented\n");
210 }
211 break;
212 default:
213 qemu_log_mask(LOG_GUEST_ERROR,
214 "pl190_write: Bad offset %x\n", (int)offset);
215 return;
216 }
217 pl190_update(s);
218}
219
220static const MemoryRegionOps pl190_ops = {
221 .read = pl190_read,
222 .write = pl190_write,
223 .endianness = DEVICE_NATIVE_ENDIAN,
224};
225
226static void pl190_reset(DeviceState *d)
227{
228 PL190State *s = PL190(d);
229 int i;
230
231 for (i = 0; i < 16; i++) {
232 s->vect_addr[i] = 0;
233 s->vect_control[i] = 0;
234 }
235 s->vect_addr[16] = 0;
236 s->prio_mask[17] = 0xffffffff;
237 s->priority = PL190_NUM_PRIO;
238 pl190_update_vectors(s);
239}
240
241static void pl190_init(Object *obj)
242{
243 DeviceState *dev = DEVICE(obj);
244 PL190State *s = PL190(obj);
245 SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
246
247 memory_region_init_io(&s->iomem, obj, &pl190_ops, s, "pl190", 0x1000);
248 sysbus_init_mmio(sbd, &s->iomem);
249 qdev_init_gpio_in(dev, pl190_set_irq, 32);
250 sysbus_init_irq(sbd, &s->irq);
251 sysbus_init_irq(sbd, &s->fiq);
252}
253
254static const VMStateDescription vmstate_pl190 = {
255 .name = "pl190",
256 .version_id = 1,
257 .minimum_version_id = 1,
258 .fields = (VMStateField[]) {
259 VMSTATE_UINT32(level, PL190State),
260 VMSTATE_UINT32(soft_level, PL190State),
261 VMSTATE_UINT32(irq_enable, PL190State),
262 VMSTATE_UINT32(fiq_select, PL190State),
263 VMSTATE_UINT8_ARRAY(vect_control, PL190State, 16),
264 VMSTATE_UINT32_ARRAY(vect_addr, PL190State, PL190_NUM_PRIO),
265 VMSTATE_UINT32_ARRAY(prio_mask, PL190State, PL190_NUM_PRIO+1),
266 VMSTATE_INT32(protected, PL190State),
267 VMSTATE_INT32(priority, PL190State),
268 VMSTATE_INT32_ARRAY(prev_prio, PL190State, PL190_NUM_PRIO),
269 VMSTATE_END_OF_LIST()
270 }
271};
272
273static void pl190_class_init(ObjectClass *klass, void *data)
274{
275 DeviceClass *dc = DEVICE_CLASS(klass);
276
277 dc->reset = pl190_reset;
278 dc->vmsd = &vmstate_pl190;
279}
280
281static const TypeInfo pl190_info = {
282 .name = TYPE_PL190,
283 .parent = TYPE_SYS_BUS_DEVICE,
284 .instance_size = sizeof(PL190State),
285 .instance_init = pl190_init,
286 .class_init = pl190_class_init,
287};
288
289static void pl190_register_types(void)
290{
291 type_register_static(&pl190_info);
292}
293
294type_init(pl190_register_types)
295